xref: /OK3568_Linux_fs/u-boot/include/dt-bindings/pinctrl/stm32f746-pinfunc.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun #ifndef _DT_BINDINGS_STM32F746_PINFUNC_H
2*4882a593Smuzhiyun #define _DT_BINDINGS_STM32F746_PINFUNC_H
3*4882a593Smuzhiyun 
4*4882a593Smuzhiyun #define STM32F746_PA0_FUNC_GPIO 0x0
5*4882a593Smuzhiyun #define STM32F746_PA0_FUNC_TIM2_CH1_TIM2_ETR 0x2
6*4882a593Smuzhiyun #define STM32F746_PA0_FUNC_TIM5_CH1 0x3
7*4882a593Smuzhiyun #define STM32F746_PA0_FUNC_TIM8_ETR 0x4
8*4882a593Smuzhiyun #define STM32F746_PA0_FUNC_USART2_CTS 0x8
9*4882a593Smuzhiyun #define STM32F746_PA0_FUNC_UART4_TX 0x9
10*4882a593Smuzhiyun #define STM32F746_PA0_FUNC_SAI2_SD_B 0xb
11*4882a593Smuzhiyun #define STM32F746_PA0_FUNC_ETH_MII_CRS 0xc
12*4882a593Smuzhiyun #define STM32F746_PA0_FUNC_EVENTOUT 0x10
13*4882a593Smuzhiyun #define STM32F746_PA0_FUNC_ANALOG 0x11
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #define STM32F746_PA1_FUNC_GPIO 0x100
16*4882a593Smuzhiyun #define STM32F746_PA1_FUNC_TIM2_CH2 0x102
17*4882a593Smuzhiyun #define STM32F746_PA1_FUNC_TIM5_CH2 0x103
18*4882a593Smuzhiyun #define STM32F746_PA1_FUNC_USART2_RTS 0x108
19*4882a593Smuzhiyun #define STM32F746_PA1_FUNC_UART4_RX 0x109
20*4882a593Smuzhiyun #define STM32F746_PA1_FUNC_QUADSPI_BK1_IO3 0x10a
21*4882a593Smuzhiyun #define STM32F746_PA1_FUNC_SAI2_MCLK_B 0x10b
22*4882a593Smuzhiyun #define STM32F746_PA1_FUNC_ETH_MII_RX_CLK_ETH_RMII_REF_CLK 0x10c
23*4882a593Smuzhiyun #define STM32F746_PA1_FUNC_LCD_R2 0x10f
24*4882a593Smuzhiyun #define STM32F746_PA1_FUNC_EVENTOUT 0x110
25*4882a593Smuzhiyun #define STM32F746_PA1_FUNC_ANALOG 0x111
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #define STM32F746_PA2_FUNC_GPIO 0x200
28*4882a593Smuzhiyun #define STM32F746_PA2_FUNC_TIM2_CH3 0x202
29*4882a593Smuzhiyun #define STM32F746_PA2_FUNC_TIM5_CH3 0x203
30*4882a593Smuzhiyun #define STM32F746_PA2_FUNC_TIM9_CH1 0x204
31*4882a593Smuzhiyun #define STM32F746_PA2_FUNC_USART2_TX 0x208
32*4882a593Smuzhiyun #define STM32F746_PA2_FUNC_SAI2_SCK_B 0x209
33*4882a593Smuzhiyun #define STM32F746_PA2_FUNC_ETH_MDIO 0x20c
34*4882a593Smuzhiyun #define STM32F746_PA2_FUNC_LCD_R1 0x20f
35*4882a593Smuzhiyun #define STM32F746_PA2_FUNC_EVENTOUT 0x210
36*4882a593Smuzhiyun #define STM32F746_PA2_FUNC_ANALOG 0x211
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #define STM32F746_PA3_FUNC_GPIO 0x300
39*4882a593Smuzhiyun #define STM32F746_PA3_FUNC_TIM2_CH4 0x302
40*4882a593Smuzhiyun #define STM32F746_PA3_FUNC_TIM5_CH4 0x303
41*4882a593Smuzhiyun #define STM32F746_PA3_FUNC_TIM9_CH2 0x304
42*4882a593Smuzhiyun #define STM32F746_PA3_FUNC_USART2_RX 0x308
43*4882a593Smuzhiyun #define STM32F746_PA3_FUNC_OTG_HS_ULPI_D0 0x30b
44*4882a593Smuzhiyun #define STM32F746_PA3_FUNC_ETH_MII_COL 0x30c
45*4882a593Smuzhiyun #define STM32F746_PA3_FUNC_LCD_B5 0x30f
46*4882a593Smuzhiyun #define STM32F746_PA3_FUNC_EVENTOUT 0x310
47*4882a593Smuzhiyun #define STM32F746_PA3_FUNC_ANALOG 0x311
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun #define STM32F746_PA4_FUNC_GPIO 0x400
50*4882a593Smuzhiyun #define STM32F746_PA4_FUNC_SPI1_NSS_I2S1_WS 0x406
51*4882a593Smuzhiyun #define STM32F746_PA4_FUNC_SPI3_NSS_I2S3_WS 0x407
52*4882a593Smuzhiyun #define STM32F746_PA4_FUNC_USART2_CK 0x408
53*4882a593Smuzhiyun #define STM32F746_PA4_FUNC_OTG_HS_SOF 0x40d
54*4882a593Smuzhiyun #define STM32F746_PA4_FUNC_DCMI_HSYNC 0x40e
55*4882a593Smuzhiyun #define STM32F746_PA4_FUNC_LCD_VSYNC 0x40f
56*4882a593Smuzhiyun #define STM32F746_PA4_FUNC_EVENTOUT 0x410
57*4882a593Smuzhiyun #define STM32F746_PA4_FUNC_ANALOG 0x411
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun #define STM32F746_PA5_FUNC_GPIO 0x500
60*4882a593Smuzhiyun #define STM32F746_PA5_FUNC_TIM2_CH1_TIM2_ETR 0x502
61*4882a593Smuzhiyun #define STM32F746_PA5_FUNC_TIM8_CH1N 0x504
62*4882a593Smuzhiyun #define STM32F746_PA5_FUNC_SPI1_SCK_I2S1_CK 0x506
63*4882a593Smuzhiyun #define STM32F746_PA5_FUNC_OTG_HS_ULPI_CK 0x50b
64*4882a593Smuzhiyun #define STM32F746_PA5_FUNC_LCD_R4 0x50f
65*4882a593Smuzhiyun #define STM32F746_PA5_FUNC_EVENTOUT 0x510
66*4882a593Smuzhiyun #define STM32F746_PA5_FUNC_ANALOG 0x511
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun #define STM32F746_PA6_FUNC_GPIO 0x600
69*4882a593Smuzhiyun #define STM32F746_PA6_FUNC_TIM1_BKIN 0x602
70*4882a593Smuzhiyun #define STM32F746_PA6_FUNC_TIM3_CH1 0x603
71*4882a593Smuzhiyun #define STM32F746_PA6_FUNC_TIM8_BKIN 0x604
72*4882a593Smuzhiyun #define STM32F746_PA6_FUNC_SPI1_MISO 0x606
73*4882a593Smuzhiyun #define STM32F746_PA6_FUNC_TIM13_CH1 0x60a
74*4882a593Smuzhiyun #define STM32F746_PA6_FUNC_DCMI_PIXCLK 0x60e
75*4882a593Smuzhiyun #define STM32F746_PA6_FUNC_LCD_G2 0x60f
76*4882a593Smuzhiyun #define STM32F746_PA6_FUNC_EVENTOUT 0x610
77*4882a593Smuzhiyun #define STM32F746_PA6_FUNC_ANALOG 0x611
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun #define STM32F746_PA7_FUNC_GPIO 0x700
80*4882a593Smuzhiyun #define STM32F746_PA7_FUNC_TIM1_CH1N 0x702
81*4882a593Smuzhiyun #define STM32F746_PA7_FUNC_TIM3_CH2 0x703
82*4882a593Smuzhiyun #define STM32F746_PA7_FUNC_TIM8_CH1N 0x704
83*4882a593Smuzhiyun #define STM32F746_PA7_FUNC_SPI1_MOSI_I2S1_SD 0x706
84*4882a593Smuzhiyun #define STM32F746_PA7_FUNC_TIM14_CH1 0x70a
85*4882a593Smuzhiyun #define STM32F746_PA7_FUNC_ETH_MII_RX_DV_ETH_RMII_CRS_DV 0x70c
86*4882a593Smuzhiyun #define STM32F746_PA7_FUNC_FMC_SDNWE 0x70d
87*4882a593Smuzhiyun #define STM32F746_PA7_FUNC_EVENTOUT 0x710
88*4882a593Smuzhiyun #define STM32F746_PA7_FUNC_ANALOG 0x711
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun #define STM32F746_PA8_FUNC_GPIO 0x800
91*4882a593Smuzhiyun #define STM32F746_PA8_FUNC_MCO1 0x801
92*4882a593Smuzhiyun #define STM32F746_PA8_FUNC_TIM1_CH1 0x802
93*4882a593Smuzhiyun #define STM32F746_PA8_FUNC_TIM8_BKIN2 0x804
94*4882a593Smuzhiyun #define STM32F746_PA8_FUNC_I2C3_SCL 0x805
95*4882a593Smuzhiyun #define STM32F746_PA8_FUNC_USART1_CK 0x808
96*4882a593Smuzhiyun #define STM32F746_PA8_FUNC_OTG_FS_SOF 0x80b
97*4882a593Smuzhiyun #define STM32F746_PA8_FUNC_LCD_R6 0x80f
98*4882a593Smuzhiyun #define STM32F746_PA8_FUNC_EVENTOUT 0x810
99*4882a593Smuzhiyun #define STM32F746_PA8_FUNC_ANALOG 0x811
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun #define STM32F746_PA9_FUNC_GPIO 0x900
102*4882a593Smuzhiyun #define STM32F746_PA9_FUNC_TIM1_CH2 0x902
103*4882a593Smuzhiyun #define STM32F746_PA9_FUNC_I2C3_SMBA 0x905
104*4882a593Smuzhiyun #define STM32F746_PA9_FUNC_SPI2_SCK_I2S2_CK 0x906
105*4882a593Smuzhiyun #define STM32F746_PA9_FUNC_USART1_TX 0x908
106*4882a593Smuzhiyun #define STM32F746_PA9_FUNC_DCMI_D0 0x90e
107*4882a593Smuzhiyun #define STM32F746_PA9_FUNC_EVENTOUT 0x910
108*4882a593Smuzhiyun #define STM32F746_PA9_FUNC_ANALOG 0x911
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun #define STM32F746_PA10_FUNC_GPIO 0xa00
111*4882a593Smuzhiyun #define STM32F746_PA10_FUNC_TIM1_CH3 0xa02
112*4882a593Smuzhiyun #define STM32F746_PA10_FUNC_USART1_RX 0xa08
113*4882a593Smuzhiyun #define STM32F746_PA10_FUNC_OTG_FS_ID 0xa0b
114*4882a593Smuzhiyun #define STM32F746_PA10_FUNC_DCMI_D1 0xa0e
115*4882a593Smuzhiyun #define STM32F746_PA10_FUNC_EVENTOUT 0xa10
116*4882a593Smuzhiyun #define STM32F746_PA10_FUNC_ANALOG 0xa11
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun #define STM32F746_PA11_FUNC_GPIO 0xb00
119*4882a593Smuzhiyun #define STM32F746_PA11_FUNC_TIM1_CH4 0xb02
120*4882a593Smuzhiyun #define STM32F746_PA11_FUNC_USART1_CTS 0xb08
121*4882a593Smuzhiyun #define STM32F746_PA11_FUNC_CAN1_RX 0xb0a
122*4882a593Smuzhiyun #define STM32F746_PA11_FUNC_OTG_FS_DM 0xb0b
123*4882a593Smuzhiyun #define STM32F746_PA11_FUNC_LCD_R4 0xb0f
124*4882a593Smuzhiyun #define STM32F746_PA11_FUNC_EVENTOUT 0xb10
125*4882a593Smuzhiyun #define STM32F746_PA11_FUNC_ANALOG 0xb11
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun #define STM32F746_PA12_FUNC_GPIO 0xc00
128*4882a593Smuzhiyun #define STM32F746_PA12_FUNC_TIM1_ETR 0xc02
129*4882a593Smuzhiyun #define STM32F746_PA12_FUNC_USART1_RTS 0xc08
130*4882a593Smuzhiyun #define STM32F746_PA12_FUNC_SAI2_FS_B 0xc09
131*4882a593Smuzhiyun #define STM32F746_PA12_FUNC_CAN1_TX 0xc0a
132*4882a593Smuzhiyun #define STM32F746_PA12_FUNC_OTG_FS_DP 0xc0b
133*4882a593Smuzhiyun #define STM32F746_PA12_FUNC_LCD_R5 0xc0f
134*4882a593Smuzhiyun #define STM32F746_PA12_FUNC_EVENTOUT 0xc10
135*4882a593Smuzhiyun #define STM32F746_PA12_FUNC_ANALOG 0xc11
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun #define STM32F746_PA13_FUNC_GPIO 0xd00
138*4882a593Smuzhiyun #define STM32F746_PA13_FUNC_JTMS_SWDIO 0xd01
139*4882a593Smuzhiyun #define STM32F746_PA13_FUNC_EVENTOUT 0xd10
140*4882a593Smuzhiyun #define STM32F746_PA13_FUNC_ANALOG 0xd11
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun #define STM32F746_PA14_FUNC_GPIO 0xe00
143*4882a593Smuzhiyun #define STM32F746_PA14_FUNC_JTCK_SWCLK 0xe01
144*4882a593Smuzhiyun #define STM32F746_PA14_FUNC_EVENTOUT 0xe10
145*4882a593Smuzhiyun #define STM32F746_PA14_FUNC_ANALOG 0xe11
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun #define STM32F746_PA15_FUNC_GPIO 0xf00
148*4882a593Smuzhiyun #define STM32F746_PA15_FUNC_JTDI 0xf01
149*4882a593Smuzhiyun #define STM32F746_PA15_FUNC_TIM2_CH1_TIM2_ETR 0xf02
150*4882a593Smuzhiyun #define STM32F746_PA15_FUNC_HDMI_CEC 0xf05
151*4882a593Smuzhiyun #define STM32F746_PA15_FUNC_SPI1_NSS_I2S1_WS 0xf06
152*4882a593Smuzhiyun #define STM32F746_PA15_FUNC_SPI3_NSS_I2S3_WS 0xf07
153*4882a593Smuzhiyun #define STM32F746_PA15_FUNC_UART4_RTS 0xf09
154*4882a593Smuzhiyun #define STM32F746_PA15_FUNC_EVENTOUT 0xf10
155*4882a593Smuzhiyun #define STM32F746_PA15_FUNC_ANALOG 0xf11
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun #define STM32F746_PB0_FUNC_GPIO 0x1000
159*4882a593Smuzhiyun #define STM32F746_PB0_FUNC_TIM1_CH2N 0x1002
160*4882a593Smuzhiyun #define STM32F746_PB0_FUNC_TIM3_CH3 0x1003
161*4882a593Smuzhiyun #define STM32F746_PB0_FUNC_TIM8_CH2N 0x1004
162*4882a593Smuzhiyun #define STM32F746_PB0_FUNC_UART4_CTS 0x1009
163*4882a593Smuzhiyun #define STM32F746_PB0_FUNC_LCD_R3 0x100a
164*4882a593Smuzhiyun #define STM32F746_PB0_FUNC_OTG_HS_ULPI_D1 0x100b
165*4882a593Smuzhiyun #define STM32F746_PB0_FUNC_ETH_MII_RXD2 0x100c
166*4882a593Smuzhiyun #define STM32F746_PB0_FUNC_EVENTOUT 0x1010
167*4882a593Smuzhiyun #define STM32F746_PB0_FUNC_ANALOG 0x1011
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun #define STM32F746_PB1_FUNC_GPIO 0x1100
170*4882a593Smuzhiyun #define STM32F746_PB1_FUNC_TIM1_CH3N 0x1102
171*4882a593Smuzhiyun #define STM32F746_PB1_FUNC_TIM3_CH4 0x1103
172*4882a593Smuzhiyun #define STM32F746_PB1_FUNC_TIM8_CH3N 0x1104
173*4882a593Smuzhiyun #define STM32F746_PB1_FUNC_LCD_R6 0x110a
174*4882a593Smuzhiyun #define STM32F746_PB1_FUNC_OTG_HS_ULPI_D2 0x110b
175*4882a593Smuzhiyun #define STM32F746_PB1_FUNC_ETH_MII_RXD3 0x110c
176*4882a593Smuzhiyun #define STM32F746_PB1_FUNC_EVENTOUT 0x1110
177*4882a593Smuzhiyun #define STM32F746_PB1_FUNC_ANALOG 0x1111
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun #define STM32F746_PB2_FUNC_GPIO 0x1200
180*4882a593Smuzhiyun #define STM32F746_PB2_FUNC_SAI1_SD_A 0x1207
181*4882a593Smuzhiyun #define STM32F746_PB2_FUNC_SPI3_MOSI_I2S3_SD 0x1208
182*4882a593Smuzhiyun #define STM32F746_PB2_FUNC_QUADSPI_CLK 0x120a
183*4882a593Smuzhiyun #define STM32F746_PB2_FUNC_EVENTOUT 0x1210
184*4882a593Smuzhiyun #define STM32F746_PB2_FUNC_ANALOG 0x1211
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun #define STM32F746_PB3_FUNC_GPIO 0x1300
187*4882a593Smuzhiyun #define STM32F746_PB3_FUNC_JTDO_TRACESWO 0x1301
188*4882a593Smuzhiyun #define STM32F746_PB3_FUNC_TIM2_CH2 0x1302
189*4882a593Smuzhiyun #define STM32F746_PB3_FUNC_SPI1_SCK_I2S1_CK 0x1306
190*4882a593Smuzhiyun #define STM32F746_PB3_FUNC_SPI3_SCK_I2S3_CK 0x1307
191*4882a593Smuzhiyun #define STM32F746_PB3_FUNC_EVENTOUT 0x1310
192*4882a593Smuzhiyun #define STM32F746_PB3_FUNC_ANALOG 0x1311
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun #define STM32F746_PB4_FUNC_GPIO 0x1400
195*4882a593Smuzhiyun #define STM32F746_PB4_FUNC_NJTRST 0x1401
196*4882a593Smuzhiyun #define STM32F746_PB4_FUNC_TIM3_CH1 0x1403
197*4882a593Smuzhiyun #define STM32F746_PB4_FUNC_SPI1_MISO 0x1406
198*4882a593Smuzhiyun #define STM32F746_PB4_FUNC_SPI3_MISO 0x1407
199*4882a593Smuzhiyun #define STM32F746_PB4_FUNC_SPI2_NSS_I2S2_WS 0x1408
200*4882a593Smuzhiyun #define STM32F746_PB4_FUNC_EVENTOUT 0x1410
201*4882a593Smuzhiyun #define STM32F746_PB4_FUNC_ANALOG 0x1411
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun #define STM32F746_PB5_FUNC_GPIO 0x1500
204*4882a593Smuzhiyun #define STM32F746_PB5_FUNC_TIM3_CH2 0x1503
205*4882a593Smuzhiyun #define STM32F746_PB5_FUNC_I2C1_SMBA 0x1505
206*4882a593Smuzhiyun #define STM32F746_PB5_FUNC_SPI1_MOSI_I2S1_SD 0x1506
207*4882a593Smuzhiyun #define STM32F746_PB5_FUNC_SPI3_MOSI_I2S3_SD 0x1507
208*4882a593Smuzhiyun #define STM32F746_PB5_FUNC_CAN2_RX 0x150a
209*4882a593Smuzhiyun #define STM32F746_PB5_FUNC_OTG_HS_ULPI_D7 0x150b
210*4882a593Smuzhiyun #define STM32F746_PB5_FUNC_ETH_PPS_OUT 0x150c
211*4882a593Smuzhiyun #define STM32F746_PB5_FUNC_FMC_SDCKE1 0x150d
212*4882a593Smuzhiyun #define STM32F746_PB5_FUNC_DCMI_D10 0x150e
213*4882a593Smuzhiyun #define STM32F746_PB5_FUNC_EVENTOUT 0x1510
214*4882a593Smuzhiyun #define STM32F746_PB5_FUNC_ANALOG 0x1511
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun #define STM32F746_PB6_FUNC_GPIO 0x1600
217*4882a593Smuzhiyun #define STM32F746_PB6_FUNC_TIM4_CH1 0x1603
218*4882a593Smuzhiyun #define STM32F746_PB6_FUNC_HDMI_CEC 0x1604
219*4882a593Smuzhiyun #define STM32F746_PB6_FUNC_I2C1_SCL 0x1605
220*4882a593Smuzhiyun #define STM32F746_PB6_FUNC_USART1_TX 0x1608
221*4882a593Smuzhiyun #define STM32F746_PB6_FUNC_CAN2_TX 0x160a
222*4882a593Smuzhiyun #define STM32F746_PB6_FUNC_QUADSPI_BK1_NCS 0x160b
223*4882a593Smuzhiyun #define STM32F746_PB6_FUNC_FMC_SDNE1 0x160d
224*4882a593Smuzhiyun #define STM32F746_PB6_FUNC_DCMI_D5 0x160e
225*4882a593Smuzhiyun #define STM32F746_PB6_FUNC_EVENTOUT 0x1610
226*4882a593Smuzhiyun #define STM32F746_PB6_FUNC_ANALOG 0x1611
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun #define STM32F746_PB7_FUNC_GPIO 0x1700
229*4882a593Smuzhiyun #define STM32F746_PB7_FUNC_TIM4_CH2 0x1703
230*4882a593Smuzhiyun #define STM32F746_PB7_FUNC_I2C1_SDA 0x1705
231*4882a593Smuzhiyun #define STM32F746_PB7_FUNC_USART1_RX 0x1708
232*4882a593Smuzhiyun #define STM32F746_PB7_FUNC_FMC_NL 0x170d
233*4882a593Smuzhiyun #define STM32F746_PB7_FUNC_DCMI_VSYNC 0x170e
234*4882a593Smuzhiyun #define STM32F746_PB7_FUNC_EVENTOUT 0x1710
235*4882a593Smuzhiyun #define STM32F746_PB7_FUNC_ANALOG 0x1711
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun #define STM32F746_PB8_FUNC_GPIO 0x1800
238*4882a593Smuzhiyun #define STM32F746_PB8_FUNC_TIM4_CH3 0x1803
239*4882a593Smuzhiyun #define STM32F746_PB8_FUNC_TIM10_CH1 0x1804
240*4882a593Smuzhiyun #define STM32F746_PB8_FUNC_I2C1_SCL 0x1805
241*4882a593Smuzhiyun #define STM32F746_PB8_FUNC_CAN1_RX 0x180a
242*4882a593Smuzhiyun #define STM32F746_PB8_FUNC_ETH_MII_TXD3 0x180c
243*4882a593Smuzhiyun #define STM32F746_PB8_FUNC_SDMMC1_D4 0x180d
244*4882a593Smuzhiyun #define STM32F746_PB8_FUNC_DCMI_D6 0x180e
245*4882a593Smuzhiyun #define STM32F746_PB8_FUNC_LCD_B6 0x180f
246*4882a593Smuzhiyun #define STM32F746_PB8_FUNC_EVENTOUT 0x1810
247*4882a593Smuzhiyun #define STM32F746_PB8_FUNC_ANALOG 0x1811
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun #define STM32F746_PB9_FUNC_GPIO 0x1900
250*4882a593Smuzhiyun #define STM32F746_PB9_FUNC_TIM4_CH4 0x1903
251*4882a593Smuzhiyun #define STM32F746_PB9_FUNC_TIM11_CH1 0x1904
252*4882a593Smuzhiyun #define STM32F746_PB9_FUNC_I2C1_SDA 0x1905
253*4882a593Smuzhiyun #define STM32F746_PB9_FUNC_SPI2_NSS_I2S2_WS 0x1906
254*4882a593Smuzhiyun #define STM32F746_PB9_FUNC_CAN1_TX 0x190a
255*4882a593Smuzhiyun #define STM32F746_PB9_FUNC_SDMMC1_D5 0x190d
256*4882a593Smuzhiyun #define STM32F746_PB9_FUNC_DCMI_D7 0x190e
257*4882a593Smuzhiyun #define STM32F746_PB9_FUNC_LCD_B7 0x190f
258*4882a593Smuzhiyun #define STM32F746_PB9_FUNC_EVENTOUT 0x1910
259*4882a593Smuzhiyun #define STM32F746_PB9_FUNC_ANALOG 0x1911
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun #define STM32F746_PB10_FUNC_GPIO 0x1a00
262*4882a593Smuzhiyun #define STM32F746_PB10_FUNC_TIM2_CH3 0x1a02
263*4882a593Smuzhiyun #define STM32F746_PB10_FUNC_I2C2_SCL 0x1a05
264*4882a593Smuzhiyun #define STM32F746_PB10_FUNC_SPI2_SCK_I2S2_CK 0x1a06
265*4882a593Smuzhiyun #define STM32F746_PB10_FUNC_USART3_TX 0x1a08
266*4882a593Smuzhiyun #define STM32F746_PB10_FUNC_OTG_HS_ULPI_D3 0x1a0b
267*4882a593Smuzhiyun #define STM32F746_PB10_FUNC_ETH_MII_RX_ER 0x1a0c
268*4882a593Smuzhiyun #define STM32F746_PB10_FUNC_LCD_G4 0x1a0f
269*4882a593Smuzhiyun #define STM32F746_PB10_FUNC_EVENTOUT 0x1a10
270*4882a593Smuzhiyun #define STM32F746_PB10_FUNC_ANALOG 0x1a11
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun #define STM32F746_PB11_FUNC_GPIO 0x1b00
273*4882a593Smuzhiyun #define STM32F746_PB11_FUNC_TIM2_CH4 0x1b02
274*4882a593Smuzhiyun #define STM32F746_PB11_FUNC_I2C2_SDA 0x1b05
275*4882a593Smuzhiyun #define STM32F746_PB11_FUNC_USART3_RX 0x1b08
276*4882a593Smuzhiyun #define STM32F746_PB11_FUNC_OTG_HS_ULPI_D4 0x1b0b
277*4882a593Smuzhiyun #define STM32F746_PB11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN 0x1b0c
278*4882a593Smuzhiyun #define STM32F746_PB11_FUNC_LCD_G5 0x1b0f
279*4882a593Smuzhiyun #define STM32F746_PB11_FUNC_EVENTOUT 0x1b10
280*4882a593Smuzhiyun #define STM32F746_PB11_FUNC_ANALOG 0x1b11
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun #define STM32F746_PB12_FUNC_GPIO 0x1c00
283*4882a593Smuzhiyun #define STM32F746_PB12_FUNC_TIM1_BKIN 0x1c02
284*4882a593Smuzhiyun #define STM32F746_PB12_FUNC_I2C2_SMBA 0x1c05
285*4882a593Smuzhiyun #define STM32F746_PB12_FUNC_SPI2_NSS_I2S2_WS 0x1c06
286*4882a593Smuzhiyun #define STM32F746_PB12_FUNC_USART3_CK 0x1c08
287*4882a593Smuzhiyun #define STM32F746_PB12_FUNC_CAN2_RX 0x1c0a
288*4882a593Smuzhiyun #define STM32F746_PB12_FUNC_OTG_HS_ULPI_D5 0x1c0b
289*4882a593Smuzhiyun #define STM32F746_PB12_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0 0x1c0c
290*4882a593Smuzhiyun #define STM32F746_PB12_FUNC_OTG_HS_ID 0x1c0d
291*4882a593Smuzhiyun #define STM32F746_PB12_FUNC_EVENTOUT 0x1c10
292*4882a593Smuzhiyun #define STM32F746_PB12_FUNC_ANALOG 0x1c11
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun #define STM32F746_PB13_FUNC_GPIO 0x1d00
295*4882a593Smuzhiyun #define STM32F746_PB13_FUNC_TIM1_CH1N 0x1d02
296*4882a593Smuzhiyun #define STM32F746_PB13_FUNC_SPI2_SCK_I2S2_CK 0x1d06
297*4882a593Smuzhiyun #define STM32F746_PB13_FUNC_USART3_CTS 0x1d08
298*4882a593Smuzhiyun #define STM32F746_PB13_FUNC_CAN2_TX 0x1d0a
299*4882a593Smuzhiyun #define STM32F746_PB13_FUNC_OTG_HS_ULPI_D6 0x1d0b
300*4882a593Smuzhiyun #define STM32F746_PB13_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1 0x1d0c
301*4882a593Smuzhiyun #define STM32F746_PB13_FUNC_EVENTOUT 0x1d10
302*4882a593Smuzhiyun #define STM32F746_PB13_FUNC_ANALOG 0x1d11
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun #define STM32F746_PB14_FUNC_GPIO 0x1e00
305*4882a593Smuzhiyun #define STM32F746_PB14_FUNC_TIM1_CH2N 0x1e02
306*4882a593Smuzhiyun #define STM32F746_PB14_FUNC_TIM8_CH2N 0x1e04
307*4882a593Smuzhiyun #define STM32F746_PB14_FUNC_SPI2_MISO 0x1e06
308*4882a593Smuzhiyun #define STM32F746_PB14_FUNC_USART3_RTS 0x1e08
309*4882a593Smuzhiyun #define STM32F746_PB14_FUNC_TIM12_CH1 0x1e0a
310*4882a593Smuzhiyun #define STM32F746_PB14_FUNC_OTG_HS_DM 0x1e0d
311*4882a593Smuzhiyun #define STM32F746_PB14_FUNC_EVENTOUT 0x1e10
312*4882a593Smuzhiyun #define STM32F746_PB14_FUNC_ANALOG 0x1e11
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun #define STM32F746_PB15_FUNC_GPIO 0x1f00
315*4882a593Smuzhiyun #define STM32F746_PB15_FUNC_RTC_REFIN 0x1f01
316*4882a593Smuzhiyun #define STM32F746_PB15_FUNC_TIM1_CH3N 0x1f02
317*4882a593Smuzhiyun #define STM32F746_PB15_FUNC_TIM8_CH3N 0x1f04
318*4882a593Smuzhiyun #define STM32F746_PB15_FUNC_SPI2_MOSI_I2S2_SD 0x1f06
319*4882a593Smuzhiyun #define STM32F746_PB15_FUNC_TIM12_CH2 0x1f0a
320*4882a593Smuzhiyun #define STM32F746_PB15_FUNC_OTG_HS_DP 0x1f0d
321*4882a593Smuzhiyun #define STM32F746_PB15_FUNC_EVENTOUT 0x1f10
322*4882a593Smuzhiyun #define STM32F746_PB15_FUNC_ANALOG 0x1f11
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun #define STM32F746_PC0_FUNC_GPIO 0x2000
326*4882a593Smuzhiyun #define STM32F746_PC0_FUNC_SAI2_FS_B 0x2009
327*4882a593Smuzhiyun #define STM32F746_PC0_FUNC_OTG_HS_ULPI_STP 0x200b
328*4882a593Smuzhiyun #define STM32F746_PC0_FUNC_FMC_SDNWE 0x200d
329*4882a593Smuzhiyun #define STM32F746_PC0_FUNC_LCD_R5 0x200f
330*4882a593Smuzhiyun #define STM32F746_PC0_FUNC_EVENTOUT 0x2010
331*4882a593Smuzhiyun #define STM32F746_PC0_FUNC_ANALOG 0x2011
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun #define STM32F746_PC1_FUNC_GPIO 0x2100
334*4882a593Smuzhiyun #define STM32F746_PC1_FUNC_TRACED0 0x2101
335*4882a593Smuzhiyun #define STM32F746_PC1_FUNC_SPI2_MOSI_I2S2_SD 0x2106
336*4882a593Smuzhiyun #define STM32F746_PC1_FUNC_SAI1_SD_A 0x2107
337*4882a593Smuzhiyun #define STM32F746_PC1_FUNC_ETH_MDC 0x210c
338*4882a593Smuzhiyun #define STM32F746_PC1_FUNC_EVENTOUT 0x2110
339*4882a593Smuzhiyun #define STM32F746_PC1_FUNC_ANALOG 0x2111
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun #define STM32F746_PC2_FUNC_GPIO 0x2200
342*4882a593Smuzhiyun #define STM32F746_PC2_FUNC_SPI2_MISO 0x2206
343*4882a593Smuzhiyun #define STM32F746_PC2_FUNC_OTG_HS_ULPI_DIR 0x220b
344*4882a593Smuzhiyun #define STM32F746_PC2_FUNC_ETH_MII_TXD2 0x220c
345*4882a593Smuzhiyun #define STM32F746_PC2_FUNC_FMC_SDNE0 0x220d
346*4882a593Smuzhiyun #define STM32F746_PC2_FUNC_EVENTOUT 0x2210
347*4882a593Smuzhiyun #define STM32F746_PC2_FUNC_ANALOG 0x2211
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun #define STM32F746_PC3_FUNC_GPIO 0x2300
350*4882a593Smuzhiyun #define STM32F746_PC3_FUNC_SPI2_MOSI_I2S2_SD 0x2306
351*4882a593Smuzhiyun #define STM32F746_PC3_FUNC_OTG_HS_ULPI_NXT 0x230b
352*4882a593Smuzhiyun #define STM32F746_PC3_FUNC_ETH_MII_TX_CLK 0x230c
353*4882a593Smuzhiyun #define STM32F746_PC3_FUNC_FMC_SDCKE0 0x230d
354*4882a593Smuzhiyun #define STM32F746_PC3_FUNC_EVENTOUT 0x2310
355*4882a593Smuzhiyun #define STM32F746_PC3_FUNC_ANALOG 0x2311
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun #define STM32F746_PC4_FUNC_GPIO 0x2400
358*4882a593Smuzhiyun #define STM32F746_PC4_FUNC_I2S1_MCK 0x2406
359*4882a593Smuzhiyun #define STM32F746_PC4_FUNC_SPDIFRX_IN2 0x2409
360*4882a593Smuzhiyun #define STM32F746_PC4_FUNC_ETH_MII_RXD0_ETH_RMII_RXD0 0x240c
361*4882a593Smuzhiyun #define STM32F746_PC4_FUNC_FMC_SDNE0 0x240d
362*4882a593Smuzhiyun #define STM32F746_PC4_FUNC_EVENTOUT 0x2410
363*4882a593Smuzhiyun #define STM32F746_PC4_FUNC_ANALOG 0x2411
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun #define STM32F746_PC5_FUNC_GPIO 0x2500
366*4882a593Smuzhiyun #define STM32F746_PC5_FUNC_SPDIFRX_IN3 0x2509
367*4882a593Smuzhiyun #define STM32F746_PC5_FUNC_ETH_MII_RXD1_ETH_RMII_RXD1 0x250c
368*4882a593Smuzhiyun #define STM32F746_PC5_FUNC_FMC_SDCKE0 0x250d
369*4882a593Smuzhiyun #define STM32F746_PC5_FUNC_EVENTOUT 0x2510
370*4882a593Smuzhiyun #define STM32F746_PC5_FUNC_ANALOG 0x2511
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun #define STM32F746_PC6_FUNC_GPIO 0x2600
373*4882a593Smuzhiyun #define STM32F746_PC6_FUNC_TIM3_CH1 0x2603
374*4882a593Smuzhiyun #define STM32F746_PC6_FUNC_TIM8_CH1 0x2604
375*4882a593Smuzhiyun #define STM32F746_PC6_FUNC_I2S2_MCK 0x2606
376*4882a593Smuzhiyun #define STM32F746_PC6_FUNC_USART6_TX 0x2609
377*4882a593Smuzhiyun #define STM32F746_PC6_FUNC_SDMMC1_D6 0x260d
378*4882a593Smuzhiyun #define STM32F746_PC6_FUNC_DCMI_D0 0x260e
379*4882a593Smuzhiyun #define STM32F746_PC6_FUNC_LCD_HSYNC 0x260f
380*4882a593Smuzhiyun #define STM32F746_PC6_FUNC_EVENTOUT 0x2610
381*4882a593Smuzhiyun #define STM32F746_PC6_FUNC_ANALOG 0x2611
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun #define STM32F746_PC7_FUNC_GPIO 0x2700
384*4882a593Smuzhiyun #define STM32F746_PC7_FUNC_TIM3_CH2 0x2703
385*4882a593Smuzhiyun #define STM32F746_PC7_FUNC_TIM8_CH2 0x2704
386*4882a593Smuzhiyun #define STM32F746_PC7_FUNC_I2S3_MCK 0x2707
387*4882a593Smuzhiyun #define STM32F746_PC7_FUNC_USART6_RX 0x2709
388*4882a593Smuzhiyun #define STM32F746_PC7_FUNC_SDMMC1_D7 0x270d
389*4882a593Smuzhiyun #define STM32F746_PC7_FUNC_DCMI_D1 0x270e
390*4882a593Smuzhiyun #define STM32F746_PC7_FUNC_LCD_G6 0x270f
391*4882a593Smuzhiyun #define STM32F746_PC7_FUNC_EVENTOUT 0x2710
392*4882a593Smuzhiyun #define STM32F746_PC7_FUNC_ANALOG 0x2711
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun #define STM32F746_PC8_FUNC_GPIO 0x2800
395*4882a593Smuzhiyun #define STM32F746_PC8_FUNC_TRACED1 0x2801
396*4882a593Smuzhiyun #define STM32F746_PC8_FUNC_TIM3_CH3 0x2803
397*4882a593Smuzhiyun #define STM32F746_PC8_FUNC_TIM8_CH3 0x2804
398*4882a593Smuzhiyun #define STM32F746_PC8_FUNC_UART5_RTS 0x2808
399*4882a593Smuzhiyun #define STM32F746_PC8_FUNC_USART6_CK 0x2809
400*4882a593Smuzhiyun #define STM32F746_PC8_FUNC_SDMMC1_D0 0x280d
401*4882a593Smuzhiyun #define STM32F746_PC8_FUNC_DCMI_D2 0x280e
402*4882a593Smuzhiyun #define STM32F746_PC8_FUNC_EVENTOUT 0x2810
403*4882a593Smuzhiyun #define STM32F746_PC8_FUNC_ANALOG 0x2811
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun #define STM32F746_PC9_FUNC_GPIO 0x2900
406*4882a593Smuzhiyun #define STM32F746_PC9_FUNC_MCO2 0x2901
407*4882a593Smuzhiyun #define STM32F746_PC9_FUNC_TIM3_CH4 0x2903
408*4882a593Smuzhiyun #define STM32F746_PC9_FUNC_TIM8_CH4 0x2904
409*4882a593Smuzhiyun #define STM32F746_PC9_FUNC_I2C3_SDA 0x2905
410*4882a593Smuzhiyun #define STM32F746_PC9_FUNC_I2S_CKIN 0x2906
411*4882a593Smuzhiyun #define STM32F746_PC9_FUNC_UART5_CTS 0x2908
412*4882a593Smuzhiyun #define STM32F746_PC9_FUNC_QUADSPI_BK1_IO0 0x290a
413*4882a593Smuzhiyun #define STM32F746_PC9_FUNC_SDMMC1_D1 0x290d
414*4882a593Smuzhiyun #define STM32F746_PC9_FUNC_DCMI_D3 0x290e
415*4882a593Smuzhiyun #define STM32F746_PC9_FUNC_EVENTOUT 0x2910
416*4882a593Smuzhiyun #define STM32F746_PC9_FUNC_ANALOG 0x2911
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun #define STM32F746_PC10_FUNC_GPIO 0x2a00
419*4882a593Smuzhiyun #define STM32F746_PC10_FUNC_SPI3_SCK_I2S3_CK 0x2a07
420*4882a593Smuzhiyun #define STM32F746_PC10_FUNC_USART3_TX 0x2a08
421*4882a593Smuzhiyun #define STM32F746_PC10_FUNC_UART4_TX 0x2a09
422*4882a593Smuzhiyun #define STM32F746_PC10_FUNC_QUADSPI_BK1_IO1 0x2a0a
423*4882a593Smuzhiyun #define STM32F746_PC10_FUNC_SDMMC1_D2 0x2a0d
424*4882a593Smuzhiyun #define STM32F746_PC10_FUNC_DCMI_D8 0x2a0e
425*4882a593Smuzhiyun #define STM32F746_PC10_FUNC_LCD_R2 0x2a0f
426*4882a593Smuzhiyun #define STM32F746_PC10_FUNC_EVENTOUT 0x2a10
427*4882a593Smuzhiyun #define STM32F746_PC10_FUNC_ANALOG 0x2a11
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun #define STM32F746_PC11_FUNC_GPIO 0x2b00
430*4882a593Smuzhiyun #define STM32F746_PC11_FUNC_SPI3_MISO 0x2b07
431*4882a593Smuzhiyun #define STM32F746_PC11_FUNC_USART3_RX 0x2b08
432*4882a593Smuzhiyun #define STM32F746_PC11_FUNC_UART4_RX 0x2b09
433*4882a593Smuzhiyun #define STM32F746_PC11_FUNC_QUADSPI_BK2_NCS 0x2b0a
434*4882a593Smuzhiyun #define STM32F746_PC11_FUNC_SDMMC1_D3 0x2b0d
435*4882a593Smuzhiyun #define STM32F746_PC11_FUNC_DCMI_D4 0x2b0e
436*4882a593Smuzhiyun #define STM32F746_PC11_FUNC_EVENTOUT 0x2b10
437*4882a593Smuzhiyun #define STM32F746_PC11_FUNC_ANALOG 0x2b11
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun #define STM32F746_PC12_FUNC_GPIO 0x2c00
440*4882a593Smuzhiyun #define STM32F746_PC12_FUNC_TRACED3 0x2c01
441*4882a593Smuzhiyun #define STM32F746_PC12_FUNC_SPI3_MOSI_I2S3_SD 0x2c07
442*4882a593Smuzhiyun #define STM32F746_PC12_FUNC_USART3_CK 0x2c08
443*4882a593Smuzhiyun #define STM32F746_PC12_FUNC_UART5_TX 0x2c09
444*4882a593Smuzhiyun #define STM32F746_PC12_FUNC_SDMMC1_CK 0x2c0d
445*4882a593Smuzhiyun #define STM32F746_PC12_FUNC_DCMI_D9 0x2c0e
446*4882a593Smuzhiyun #define STM32F746_PC12_FUNC_EVENTOUT 0x2c10
447*4882a593Smuzhiyun #define STM32F746_PC12_FUNC_ANALOG 0x2c11
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun #define STM32F746_PC13_FUNC_GPIO 0x2d00
450*4882a593Smuzhiyun #define STM32F746_PC13_FUNC_EVENTOUT 0x2d10
451*4882a593Smuzhiyun #define STM32F746_PC13_FUNC_ANALOG 0x2d11
452*4882a593Smuzhiyun 
453*4882a593Smuzhiyun #define STM32F746_PC14_FUNC_GPIO 0x2e00
454*4882a593Smuzhiyun #define STM32F746_PC14_FUNC_EVENTOUT 0x2e10
455*4882a593Smuzhiyun #define STM32F746_PC14_FUNC_ANALOG 0x2e11
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun #define STM32F746_PC15_FUNC_GPIO 0x2f00
458*4882a593Smuzhiyun #define STM32F746_PC15_FUNC_EVENTOUT 0x2f10
459*4882a593Smuzhiyun #define STM32F746_PC15_FUNC_ANALOG 0x2f11
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 
462*4882a593Smuzhiyun #define STM32F746_PD0_FUNC_GPIO 0x3000
463*4882a593Smuzhiyun #define STM32F746_PD0_FUNC_CAN1_RX 0x300a
464*4882a593Smuzhiyun #define STM32F746_PD0_FUNC_FMC_D2 0x300d
465*4882a593Smuzhiyun #define STM32F746_PD0_FUNC_EVENTOUT 0x3010
466*4882a593Smuzhiyun #define STM32F746_PD0_FUNC_ANALOG 0x3011
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun #define STM32F746_PD1_FUNC_GPIO 0x3100
469*4882a593Smuzhiyun #define STM32F746_PD1_FUNC_CAN1_TX 0x310a
470*4882a593Smuzhiyun #define STM32F746_PD1_FUNC_FMC_D3 0x310d
471*4882a593Smuzhiyun #define STM32F746_PD1_FUNC_EVENTOUT 0x3110
472*4882a593Smuzhiyun #define STM32F746_PD1_FUNC_ANALOG 0x3111
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun #define STM32F746_PD2_FUNC_GPIO 0x3200
475*4882a593Smuzhiyun #define STM32F746_PD2_FUNC_TRACED2 0x3201
476*4882a593Smuzhiyun #define STM32F746_PD2_FUNC_TIM3_ETR 0x3203
477*4882a593Smuzhiyun #define STM32F746_PD2_FUNC_UART5_RX 0x3209
478*4882a593Smuzhiyun #define STM32F746_PD2_FUNC_SDMMC1_CMD 0x320d
479*4882a593Smuzhiyun #define STM32F746_PD2_FUNC_DCMI_D11 0x320e
480*4882a593Smuzhiyun #define STM32F746_PD2_FUNC_EVENTOUT 0x3210
481*4882a593Smuzhiyun #define STM32F746_PD2_FUNC_ANALOG 0x3211
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun #define STM32F746_PD3_FUNC_GPIO 0x3300
484*4882a593Smuzhiyun #define STM32F746_PD3_FUNC_SPI2_SCK_I2S2_CK 0x3306
485*4882a593Smuzhiyun #define STM32F746_PD3_FUNC_USART2_CTS 0x3308
486*4882a593Smuzhiyun #define STM32F746_PD3_FUNC_FMC_CLK 0x330d
487*4882a593Smuzhiyun #define STM32F746_PD3_FUNC_DCMI_D5 0x330e
488*4882a593Smuzhiyun #define STM32F746_PD3_FUNC_LCD_G7 0x330f
489*4882a593Smuzhiyun #define STM32F746_PD3_FUNC_EVENTOUT 0x3310
490*4882a593Smuzhiyun #define STM32F746_PD3_FUNC_ANALOG 0x3311
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun #define STM32F746_PD4_FUNC_GPIO 0x3400
493*4882a593Smuzhiyun #define STM32F746_PD4_FUNC_USART2_RTS 0x3408
494*4882a593Smuzhiyun #define STM32F746_PD4_FUNC_FMC_NOE 0x340d
495*4882a593Smuzhiyun #define STM32F746_PD4_FUNC_EVENTOUT 0x3410
496*4882a593Smuzhiyun #define STM32F746_PD4_FUNC_ANALOG 0x3411
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun #define STM32F746_PD5_FUNC_GPIO 0x3500
499*4882a593Smuzhiyun #define STM32F746_PD5_FUNC_USART2_TX 0x3508
500*4882a593Smuzhiyun #define STM32F746_PD5_FUNC_FMC_NWE 0x350d
501*4882a593Smuzhiyun #define STM32F746_PD5_FUNC_EVENTOUT 0x3510
502*4882a593Smuzhiyun #define STM32F746_PD5_FUNC_ANALOG 0x3511
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun #define STM32F746_PD6_FUNC_GPIO 0x3600
505*4882a593Smuzhiyun #define STM32F746_PD6_FUNC_SPI3_MOSI_I2S3_SD 0x3606
506*4882a593Smuzhiyun #define STM32F746_PD6_FUNC_SAI1_SD_A 0x3607
507*4882a593Smuzhiyun #define STM32F746_PD6_FUNC_USART2_RX 0x3608
508*4882a593Smuzhiyun #define STM32F746_PD6_FUNC_FMC_NWAIT 0x360d
509*4882a593Smuzhiyun #define STM32F746_PD6_FUNC_DCMI_D10 0x360e
510*4882a593Smuzhiyun #define STM32F746_PD6_FUNC_LCD_B2 0x360f
511*4882a593Smuzhiyun #define STM32F746_PD6_FUNC_EVENTOUT 0x3610
512*4882a593Smuzhiyun #define STM32F746_PD6_FUNC_ANALOG 0x3611
513*4882a593Smuzhiyun 
514*4882a593Smuzhiyun #define STM32F746_PD7_FUNC_GPIO 0x3700
515*4882a593Smuzhiyun #define STM32F746_PD7_FUNC_USART2_CK 0x3708
516*4882a593Smuzhiyun #define STM32F746_PD7_FUNC_SPDIFRX_IN0 0x3709
517*4882a593Smuzhiyun #define STM32F746_PD7_FUNC_FMC_NE1 0x370d
518*4882a593Smuzhiyun #define STM32F746_PD7_FUNC_EVENTOUT 0x3710
519*4882a593Smuzhiyun #define STM32F746_PD7_FUNC_ANALOG 0x3711
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun #define STM32F746_PD8_FUNC_GPIO 0x3800
522*4882a593Smuzhiyun #define STM32F746_PD8_FUNC_USART3_TX 0x3808
523*4882a593Smuzhiyun #define STM32F746_PD8_FUNC_SPDIFRX_IN1 0x3809
524*4882a593Smuzhiyun #define STM32F746_PD8_FUNC_FMC_D13 0x380d
525*4882a593Smuzhiyun #define STM32F746_PD8_FUNC_EVENTOUT 0x3810
526*4882a593Smuzhiyun #define STM32F746_PD8_FUNC_ANALOG 0x3811
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun #define STM32F746_PD9_FUNC_GPIO 0x3900
529*4882a593Smuzhiyun #define STM32F746_PD9_FUNC_USART3_RX 0x3908
530*4882a593Smuzhiyun #define STM32F746_PD9_FUNC_FMC_D14 0x390d
531*4882a593Smuzhiyun #define STM32F746_PD9_FUNC_EVENTOUT 0x3910
532*4882a593Smuzhiyun #define STM32F746_PD9_FUNC_ANALOG 0x3911
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun #define STM32F746_PD10_FUNC_GPIO 0x3a00
535*4882a593Smuzhiyun #define STM32F746_PD10_FUNC_USART3_CK 0x3a08
536*4882a593Smuzhiyun #define STM32F746_PD10_FUNC_FMC_D15 0x3a0d
537*4882a593Smuzhiyun #define STM32F746_PD10_FUNC_LCD_B3 0x3a0f
538*4882a593Smuzhiyun #define STM32F746_PD10_FUNC_EVENTOUT 0x3a10
539*4882a593Smuzhiyun #define STM32F746_PD10_FUNC_ANALOG 0x3a11
540*4882a593Smuzhiyun 
541*4882a593Smuzhiyun #define STM32F746_PD11_FUNC_GPIO 0x3b00
542*4882a593Smuzhiyun #define STM32F746_PD11_FUNC_I2C4_SMBA 0x3b05
543*4882a593Smuzhiyun #define STM32F746_PD11_FUNC_USART3_CTS 0x3b08
544*4882a593Smuzhiyun #define STM32F746_PD11_FUNC_QUADSPI_BK1_IO0 0x3b0a
545*4882a593Smuzhiyun #define STM32F746_PD11_FUNC_SAI2_SD_A 0x3b0b
546*4882a593Smuzhiyun #define STM32F746_PD11_FUNC_FMC_A16_FMC_CLE 0x3b0d
547*4882a593Smuzhiyun #define STM32F746_PD11_FUNC_EVENTOUT 0x3b10
548*4882a593Smuzhiyun #define STM32F746_PD11_FUNC_ANALOG 0x3b11
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun #define STM32F746_PD12_FUNC_GPIO 0x3c00
551*4882a593Smuzhiyun #define STM32F746_PD12_FUNC_TIM4_CH1 0x3c03
552*4882a593Smuzhiyun #define STM32F746_PD12_FUNC_LPTIM1_IN1 0x3c04
553*4882a593Smuzhiyun #define STM32F746_PD12_FUNC_I2C4_SCL 0x3c05
554*4882a593Smuzhiyun #define STM32F746_PD12_FUNC_USART3_RTS 0x3c08
555*4882a593Smuzhiyun #define STM32F746_PD12_FUNC_QUADSPI_BK1_IO1 0x3c0a
556*4882a593Smuzhiyun #define STM32F746_PD12_FUNC_SAI2_FS_A 0x3c0b
557*4882a593Smuzhiyun #define STM32F746_PD12_FUNC_FMC_A17_FMC_ALE 0x3c0d
558*4882a593Smuzhiyun #define STM32F746_PD12_FUNC_EVENTOUT 0x3c10
559*4882a593Smuzhiyun #define STM32F746_PD12_FUNC_ANALOG 0x3c11
560*4882a593Smuzhiyun 
561*4882a593Smuzhiyun #define STM32F746_PD13_FUNC_GPIO 0x3d00
562*4882a593Smuzhiyun #define STM32F746_PD13_FUNC_TIM4_CH2 0x3d03
563*4882a593Smuzhiyun #define STM32F746_PD13_FUNC_LPTIM1_OUT 0x3d04
564*4882a593Smuzhiyun #define STM32F746_PD13_FUNC_I2C4_SDA 0x3d05
565*4882a593Smuzhiyun #define STM32F746_PD13_FUNC_QUADSPI_BK1_IO3 0x3d0a
566*4882a593Smuzhiyun #define STM32F746_PD13_FUNC_SAI2_SCK_A 0x3d0b
567*4882a593Smuzhiyun #define STM32F746_PD13_FUNC_FMC_A18 0x3d0d
568*4882a593Smuzhiyun #define STM32F746_PD13_FUNC_EVENTOUT 0x3d10
569*4882a593Smuzhiyun #define STM32F746_PD13_FUNC_ANALOG 0x3d11
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun #define STM32F746_PD14_FUNC_GPIO 0x3e00
572*4882a593Smuzhiyun #define STM32F746_PD14_FUNC_TIM4_CH3 0x3e03
573*4882a593Smuzhiyun #define STM32F746_PD14_FUNC_UART8_CTS 0x3e09
574*4882a593Smuzhiyun #define STM32F746_PD14_FUNC_FMC_D0 0x3e0d
575*4882a593Smuzhiyun #define STM32F746_PD14_FUNC_EVENTOUT 0x3e10
576*4882a593Smuzhiyun #define STM32F746_PD14_FUNC_ANALOG 0x3e11
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun #define STM32F746_PD15_FUNC_GPIO 0x3f00
579*4882a593Smuzhiyun #define STM32F746_PD15_FUNC_TIM4_CH4 0x3f03
580*4882a593Smuzhiyun #define STM32F746_PD15_FUNC_UART8_RTS 0x3f09
581*4882a593Smuzhiyun #define STM32F746_PD15_FUNC_FMC_D1 0x3f0d
582*4882a593Smuzhiyun #define STM32F746_PD15_FUNC_EVENTOUT 0x3f10
583*4882a593Smuzhiyun #define STM32F746_PD15_FUNC_ANALOG 0x3f11
584*4882a593Smuzhiyun 
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun #define STM32F746_PE0_FUNC_GPIO 0x4000
587*4882a593Smuzhiyun #define STM32F746_PE0_FUNC_TIM4_ETR 0x4003
588*4882a593Smuzhiyun #define STM32F746_PE0_FUNC_LPTIM1_ETR 0x4004
589*4882a593Smuzhiyun #define STM32F746_PE0_FUNC_UART8_RX 0x4009
590*4882a593Smuzhiyun #define STM32F746_PE0_FUNC_SAI2_MCLK_A 0x400b
591*4882a593Smuzhiyun #define STM32F746_PE0_FUNC_FMC_NBL0 0x400d
592*4882a593Smuzhiyun #define STM32F746_PE0_FUNC_DCMI_D2 0x400e
593*4882a593Smuzhiyun #define STM32F746_PE0_FUNC_EVENTOUT 0x4010
594*4882a593Smuzhiyun #define STM32F746_PE0_FUNC_ANALOG 0x4011
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun #define STM32F746_PE1_FUNC_GPIO 0x4100
597*4882a593Smuzhiyun #define STM32F746_PE1_FUNC_LPTIM1_IN2 0x4104
598*4882a593Smuzhiyun #define STM32F746_PE1_FUNC_UART8_TX 0x4109
599*4882a593Smuzhiyun #define STM32F746_PE1_FUNC_FMC_NBL1 0x410d
600*4882a593Smuzhiyun #define STM32F746_PE1_FUNC_DCMI_D3 0x410e
601*4882a593Smuzhiyun #define STM32F746_PE1_FUNC_EVENTOUT 0x4110
602*4882a593Smuzhiyun #define STM32F746_PE1_FUNC_ANALOG 0x4111
603*4882a593Smuzhiyun 
604*4882a593Smuzhiyun #define STM32F746_PE2_FUNC_GPIO 0x4200
605*4882a593Smuzhiyun #define STM32F746_PE2_FUNC_TRACECLK 0x4201
606*4882a593Smuzhiyun #define STM32F746_PE2_FUNC_SPI4_SCK 0x4206
607*4882a593Smuzhiyun #define STM32F746_PE2_FUNC_SAI1_MCLK_A 0x4207
608*4882a593Smuzhiyun #define STM32F746_PE2_FUNC_QUADSPI_BK1_IO2 0x420a
609*4882a593Smuzhiyun #define STM32F746_PE2_FUNC_ETH_MII_TXD3 0x420c
610*4882a593Smuzhiyun #define STM32F746_PE2_FUNC_FMC_A23 0x420d
611*4882a593Smuzhiyun #define STM32F746_PE2_FUNC_EVENTOUT 0x4210
612*4882a593Smuzhiyun #define STM32F746_PE2_FUNC_ANALOG 0x4211
613*4882a593Smuzhiyun 
614*4882a593Smuzhiyun #define STM32F746_PE3_FUNC_GPIO 0x4300
615*4882a593Smuzhiyun #define STM32F746_PE3_FUNC_TRACED0 0x4301
616*4882a593Smuzhiyun #define STM32F746_PE3_FUNC_SAI1_SD_B 0x4307
617*4882a593Smuzhiyun #define STM32F746_PE3_FUNC_FMC_A19 0x430d
618*4882a593Smuzhiyun #define STM32F746_PE3_FUNC_EVENTOUT 0x4310
619*4882a593Smuzhiyun #define STM32F746_PE3_FUNC_ANALOG 0x4311
620*4882a593Smuzhiyun 
621*4882a593Smuzhiyun #define STM32F746_PE4_FUNC_GPIO 0x4400
622*4882a593Smuzhiyun #define STM32F746_PE4_FUNC_TRACED1 0x4401
623*4882a593Smuzhiyun #define STM32F746_PE4_FUNC_SPI4_NSS 0x4406
624*4882a593Smuzhiyun #define STM32F746_PE4_FUNC_SAI1_FS_A 0x4407
625*4882a593Smuzhiyun #define STM32F746_PE4_FUNC_FMC_A20 0x440d
626*4882a593Smuzhiyun #define STM32F746_PE4_FUNC_DCMI_D4 0x440e
627*4882a593Smuzhiyun #define STM32F746_PE4_FUNC_LCD_B0 0x440f
628*4882a593Smuzhiyun #define STM32F746_PE4_FUNC_EVENTOUT 0x4410
629*4882a593Smuzhiyun #define STM32F746_PE4_FUNC_ANALOG 0x4411
630*4882a593Smuzhiyun 
631*4882a593Smuzhiyun #define STM32F746_PE5_FUNC_GPIO 0x4500
632*4882a593Smuzhiyun #define STM32F746_PE5_FUNC_TRACED2 0x4501
633*4882a593Smuzhiyun #define STM32F746_PE5_FUNC_TIM9_CH1 0x4504
634*4882a593Smuzhiyun #define STM32F746_PE5_FUNC_SPI4_MISO 0x4506
635*4882a593Smuzhiyun #define STM32F746_PE5_FUNC_SAI1_SCK_A 0x4507
636*4882a593Smuzhiyun #define STM32F746_PE5_FUNC_FMC_A21 0x450d
637*4882a593Smuzhiyun #define STM32F746_PE5_FUNC_DCMI_D6 0x450e
638*4882a593Smuzhiyun #define STM32F746_PE5_FUNC_LCD_G0 0x450f
639*4882a593Smuzhiyun #define STM32F746_PE5_FUNC_EVENTOUT 0x4510
640*4882a593Smuzhiyun #define STM32F746_PE5_FUNC_ANALOG 0x4511
641*4882a593Smuzhiyun 
642*4882a593Smuzhiyun #define STM32F746_PE6_FUNC_GPIO 0x4600
643*4882a593Smuzhiyun #define STM32F746_PE6_FUNC_TRACED3 0x4601
644*4882a593Smuzhiyun #define STM32F746_PE6_FUNC_TIM1_BKIN2 0x4602
645*4882a593Smuzhiyun #define STM32F746_PE6_FUNC_TIM9_CH2 0x4604
646*4882a593Smuzhiyun #define STM32F746_PE6_FUNC_SPI4_MOSI 0x4606
647*4882a593Smuzhiyun #define STM32F746_PE6_FUNC_SAI1_SD_A 0x4607
648*4882a593Smuzhiyun #define STM32F746_PE6_FUNC_SAI2_MCLK_B 0x460b
649*4882a593Smuzhiyun #define STM32F746_PE6_FUNC_FMC_A22 0x460d
650*4882a593Smuzhiyun #define STM32F746_PE6_FUNC_DCMI_D7 0x460e
651*4882a593Smuzhiyun #define STM32F746_PE6_FUNC_LCD_G1 0x460f
652*4882a593Smuzhiyun #define STM32F746_PE6_FUNC_EVENTOUT 0x4610
653*4882a593Smuzhiyun #define STM32F746_PE6_FUNC_ANALOG 0x4611
654*4882a593Smuzhiyun 
655*4882a593Smuzhiyun #define STM32F746_PE7_FUNC_GPIO 0x4700
656*4882a593Smuzhiyun #define STM32F746_PE7_FUNC_TIM1_ETR 0x4702
657*4882a593Smuzhiyun #define STM32F746_PE7_FUNC_UART7_RX 0x4709
658*4882a593Smuzhiyun #define STM32F746_PE7_FUNC_QUADSPI_BK2_IO0 0x470b
659*4882a593Smuzhiyun #define STM32F746_PE7_FUNC_FMC_D4 0x470d
660*4882a593Smuzhiyun #define STM32F746_PE7_FUNC_EVENTOUT 0x4710
661*4882a593Smuzhiyun #define STM32F746_PE7_FUNC_ANALOG 0x4711
662*4882a593Smuzhiyun 
663*4882a593Smuzhiyun #define STM32F746_PE8_FUNC_GPIO 0x4800
664*4882a593Smuzhiyun #define STM32F746_PE8_FUNC_TIM1_CH1N 0x4802
665*4882a593Smuzhiyun #define STM32F746_PE8_FUNC_UART7_TX 0x4809
666*4882a593Smuzhiyun #define STM32F746_PE8_FUNC_QUADSPI_BK2_IO1 0x480b
667*4882a593Smuzhiyun #define STM32F746_PE8_FUNC_FMC_D5 0x480d
668*4882a593Smuzhiyun #define STM32F746_PE8_FUNC_EVENTOUT 0x4810
669*4882a593Smuzhiyun #define STM32F746_PE8_FUNC_ANALOG 0x4811
670*4882a593Smuzhiyun 
671*4882a593Smuzhiyun #define STM32F746_PE9_FUNC_GPIO 0x4900
672*4882a593Smuzhiyun #define STM32F746_PE9_FUNC_TIM1_CH1 0x4902
673*4882a593Smuzhiyun #define STM32F746_PE9_FUNC_UART7_RTS 0x4909
674*4882a593Smuzhiyun #define STM32F746_PE9_FUNC_QUADSPI_BK2_IO2 0x490b
675*4882a593Smuzhiyun #define STM32F746_PE9_FUNC_FMC_D6 0x490d
676*4882a593Smuzhiyun #define STM32F746_PE9_FUNC_EVENTOUT 0x4910
677*4882a593Smuzhiyun #define STM32F746_PE9_FUNC_ANALOG 0x4911
678*4882a593Smuzhiyun 
679*4882a593Smuzhiyun #define STM32F746_PE10_FUNC_GPIO 0x4a00
680*4882a593Smuzhiyun #define STM32F746_PE10_FUNC_TIM1_CH2N 0x4a02
681*4882a593Smuzhiyun #define STM32F746_PE10_FUNC_UART7_CTS 0x4a09
682*4882a593Smuzhiyun #define STM32F746_PE10_FUNC_QUADSPI_BK2_IO3 0x4a0b
683*4882a593Smuzhiyun #define STM32F746_PE10_FUNC_FMC_D7 0x4a0d
684*4882a593Smuzhiyun #define STM32F746_PE10_FUNC_EVENTOUT 0x4a10
685*4882a593Smuzhiyun #define STM32F746_PE10_FUNC_ANALOG 0x4a11
686*4882a593Smuzhiyun 
687*4882a593Smuzhiyun #define STM32F746_PE11_FUNC_GPIO 0x4b00
688*4882a593Smuzhiyun #define STM32F746_PE11_FUNC_TIM1_CH2 0x4b02
689*4882a593Smuzhiyun #define STM32F746_PE11_FUNC_SPI4_NSS 0x4b06
690*4882a593Smuzhiyun #define STM32F746_PE11_FUNC_SAI2_SD_B 0x4b0b
691*4882a593Smuzhiyun #define STM32F746_PE11_FUNC_FMC_D8 0x4b0d
692*4882a593Smuzhiyun #define STM32F746_PE11_FUNC_LCD_G3 0x4b0f
693*4882a593Smuzhiyun #define STM32F746_PE11_FUNC_EVENTOUT 0x4b10
694*4882a593Smuzhiyun #define STM32F746_PE11_FUNC_ANALOG 0x4b11
695*4882a593Smuzhiyun 
696*4882a593Smuzhiyun #define STM32F746_PE12_FUNC_GPIO 0x4c00
697*4882a593Smuzhiyun #define STM32F746_PE12_FUNC_TIM1_CH3N 0x4c02
698*4882a593Smuzhiyun #define STM32F746_PE12_FUNC_SPI4_SCK 0x4c06
699*4882a593Smuzhiyun #define STM32F746_PE12_FUNC_SAI2_SCK_B 0x4c0b
700*4882a593Smuzhiyun #define STM32F746_PE12_FUNC_FMC_D9 0x4c0d
701*4882a593Smuzhiyun #define STM32F746_PE12_FUNC_LCD_B4 0x4c0f
702*4882a593Smuzhiyun #define STM32F746_PE12_FUNC_EVENTOUT 0x4c10
703*4882a593Smuzhiyun #define STM32F746_PE12_FUNC_ANALOG 0x4c11
704*4882a593Smuzhiyun 
705*4882a593Smuzhiyun #define STM32F746_PE13_FUNC_GPIO 0x4d00
706*4882a593Smuzhiyun #define STM32F746_PE13_FUNC_TIM1_CH3 0x4d02
707*4882a593Smuzhiyun #define STM32F746_PE13_FUNC_SPI4_MISO 0x4d06
708*4882a593Smuzhiyun #define STM32F746_PE13_FUNC_SAI2_FS_B 0x4d0b
709*4882a593Smuzhiyun #define STM32F746_PE13_FUNC_FMC_D10 0x4d0d
710*4882a593Smuzhiyun #define STM32F746_PE13_FUNC_LCD_DE 0x4d0f
711*4882a593Smuzhiyun #define STM32F746_PE13_FUNC_EVENTOUT 0x4d10
712*4882a593Smuzhiyun #define STM32F746_PE13_FUNC_ANALOG 0x4d11
713*4882a593Smuzhiyun 
714*4882a593Smuzhiyun #define STM32F746_PE14_FUNC_GPIO 0x4e00
715*4882a593Smuzhiyun #define STM32F746_PE14_FUNC_TIM1_CH4 0x4e02
716*4882a593Smuzhiyun #define STM32F746_PE14_FUNC_SPI4_MOSI 0x4e06
717*4882a593Smuzhiyun #define STM32F746_PE14_FUNC_SAI2_MCLK_B 0x4e0b
718*4882a593Smuzhiyun #define STM32F746_PE14_FUNC_FMC_D11 0x4e0d
719*4882a593Smuzhiyun #define STM32F746_PE14_FUNC_LCD_CLK 0x4e0f
720*4882a593Smuzhiyun #define STM32F746_PE14_FUNC_EVENTOUT 0x4e10
721*4882a593Smuzhiyun #define STM32F746_PE14_FUNC_ANALOG 0x4e11
722*4882a593Smuzhiyun 
723*4882a593Smuzhiyun #define STM32F746_PE15_FUNC_GPIO 0x4f00
724*4882a593Smuzhiyun #define STM32F746_PE15_FUNC_TIM1_BKIN 0x4f02
725*4882a593Smuzhiyun #define STM32F746_PE15_FUNC_FMC_D12 0x4f0d
726*4882a593Smuzhiyun #define STM32F746_PE15_FUNC_LCD_R7 0x4f0f
727*4882a593Smuzhiyun #define STM32F746_PE15_FUNC_EVENTOUT 0x4f10
728*4882a593Smuzhiyun #define STM32F746_PE15_FUNC_ANALOG 0x4f11
729*4882a593Smuzhiyun 
730*4882a593Smuzhiyun 
731*4882a593Smuzhiyun #define STM32F746_PF0_FUNC_GPIO 0x5000
732*4882a593Smuzhiyun #define STM32F746_PF0_FUNC_I2C2_SDA 0x5005
733*4882a593Smuzhiyun #define STM32F746_PF0_FUNC_FMC_A0 0x500d
734*4882a593Smuzhiyun #define STM32F746_PF0_FUNC_EVENTOUT 0x5010
735*4882a593Smuzhiyun #define STM32F746_PF0_FUNC_ANALOG 0x5011
736*4882a593Smuzhiyun 
737*4882a593Smuzhiyun #define STM32F746_PF1_FUNC_GPIO 0x5100
738*4882a593Smuzhiyun #define STM32F746_PF1_FUNC_I2C2_SCL 0x5105
739*4882a593Smuzhiyun #define STM32F746_PF1_FUNC_FMC_A1 0x510d
740*4882a593Smuzhiyun #define STM32F746_PF1_FUNC_EVENTOUT 0x5110
741*4882a593Smuzhiyun #define STM32F746_PF1_FUNC_ANALOG 0x5111
742*4882a593Smuzhiyun 
743*4882a593Smuzhiyun #define STM32F746_PF2_FUNC_GPIO 0x5200
744*4882a593Smuzhiyun #define STM32F746_PF2_FUNC_I2C2_SMBA 0x5205
745*4882a593Smuzhiyun #define STM32F746_PF2_FUNC_FMC_A2 0x520d
746*4882a593Smuzhiyun #define STM32F746_PF2_FUNC_EVENTOUT 0x5210
747*4882a593Smuzhiyun #define STM32F746_PF2_FUNC_ANALOG 0x5211
748*4882a593Smuzhiyun 
749*4882a593Smuzhiyun #define STM32F746_PF3_FUNC_GPIO 0x5300
750*4882a593Smuzhiyun #define STM32F746_PF3_FUNC_FMC_A3 0x530d
751*4882a593Smuzhiyun #define STM32F746_PF3_FUNC_EVENTOUT 0x5310
752*4882a593Smuzhiyun #define STM32F746_PF3_FUNC_ANALOG 0x5311
753*4882a593Smuzhiyun 
754*4882a593Smuzhiyun #define STM32F746_PF4_FUNC_GPIO 0x5400
755*4882a593Smuzhiyun #define STM32F746_PF4_FUNC_FMC_A4 0x540d
756*4882a593Smuzhiyun #define STM32F746_PF4_FUNC_EVENTOUT 0x5410
757*4882a593Smuzhiyun #define STM32F746_PF4_FUNC_ANALOG 0x5411
758*4882a593Smuzhiyun 
759*4882a593Smuzhiyun #define STM32F746_PF5_FUNC_GPIO 0x5500
760*4882a593Smuzhiyun #define STM32F746_PF5_FUNC_FMC_A5 0x550d
761*4882a593Smuzhiyun #define STM32F746_PF5_FUNC_EVENTOUT 0x5510
762*4882a593Smuzhiyun #define STM32F746_PF5_FUNC_ANALOG 0x5511
763*4882a593Smuzhiyun 
764*4882a593Smuzhiyun #define STM32F746_PF6_FUNC_GPIO 0x5600
765*4882a593Smuzhiyun #define STM32F746_PF6_FUNC_TIM10_CH1 0x5604
766*4882a593Smuzhiyun #define STM32F746_PF6_FUNC_SPI5_NSS 0x5606
767*4882a593Smuzhiyun #define STM32F746_PF6_FUNC_SAI1_SD_B 0x5607
768*4882a593Smuzhiyun #define STM32F746_PF6_FUNC_UART7_RX 0x5609
769*4882a593Smuzhiyun #define STM32F746_PF6_FUNC_QUADSPI_BK1_IO3 0x560a
770*4882a593Smuzhiyun #define STM32F746_PF6_FUNC_EVENTOUT 0x5610
771*4882a593Smuzhiyun #define STM32F746_PF6_FUNC_ANALOG 0x5611
772*4882a593Smuzhiyun 
773*4882a593Smuzhiyun #define STM32F746_PF7_FUNC_GPIO 0x5700
774*4882a593Smuzhiyun #define STM32F746_PF7_FUNC_TIM11_CH1 0x5704
775*4882a593Smuzhiyun #define STM32F746_PF7_FUNC_SPI5_SCK 0x5706
776*4882a593Smuzhiyun #define STM32F746_PF7_FUNC_SAI1_MCLK_B 0x5707
777*4882a593Smuzhiyun #define STM32F746_PF7_FUNC_UART7_TX 0x5709
778*4882a593Smuzhiyun #define STM32F746_PF7_FUNC_QUADSPI_BK1_IO2 0x570a
779*4882a593Smuzhiyun #define STM32F746_PF7_FUNC_EVENTOUT 0x5710
780*4882a593Smuzhiyun #define STM32F746_PF7_FUNC_ANALOG 0x5711
781*4882a593Smuzhiyun 
782*4882a593Smuzhiyun #define STM32F746_PF8_FUNC_GPIO 0x5800
783*4882a593Smuzhiyun #define STM32F746_PF8_FUNC_SPI5_MISO 0x5806
784*4882a593Smuzhiyun #define STM32F746_PF8_FUNC_SAI1_SCK_B 0x5807
785*4882a593Smuzhiyun #define STM32F746_PF8_FUNC_UART7_RTS 0x5809
786*4882a593Smuzhiyun #define STM32F746_PF8_FUNC_TIM13_CH1 0x580a
787*4882a593Smuzhiyun #define STM32F746_PF8_FUNC_QUADSPI_BK1_IO0 0x580b
788*4882a593Smuzhiyun #define STM32F746_PF8_FUNC_EVENTOUT 0x5810
789*4882a593Smuzhiyun #define STM32F746_PF8_FUNC_ANALOG 0x5811
790*4882a593Smuzhiyun 
791*4882a593Smuzhiyun #define STM32F746_PF9_FUNC_GPIO 0x5900
792*4882a593Smuzhiyun #define STM32F746_PF9_FUNC_SPI5_MOSI 0x5906
793*4882a593Smuzhiyun #define STM32F746_PF9_FUNC_SAI1_FS_B 0x5907
794*4882a593Smuzhiyun #define STM32F746_PF9_FUNC_UART7_CTS 0x5909
795*4882a593Smuzhiyun #define STM32F746_PF9_FUNC_TIM14_CH1 0x590a
796*4882a593Smuzhiyun #define STM32F746_PF9_FUNC_QUADSPI_BK1_IO1 0x590b
797*4882a593Smuzhiyun #define STM32F746_PF9_FUNC_EVENTOUT 0x5910
798*4882a593Smuzhiyun #define STM32F746_PF9_FUNC_ANALOG 0x5911
799*4882a593Smuzhiyun 
800*4882a593Smuzhiyun #define STM32F746_PF10_FUNC_GPIO 0x5a00
801*4882a593Smuzhiyun #define STM32F746_PF10_FUNC_DCMI_D11 0x5a0e
802*4882a593Smuzhiyun #define STM32F746_PF10_FUNC_LCD_DE 0x5a0f
803*4882a593Smuzhiyun #define STM32F746_PF10_FUNC_EVENTOUT 0x5a10
804*4882a593Smuzhiyun #define STM32F746_PF10_FUNC_ANALOG 0x5a11
805*4882a593Smuzhiyun 
806*4882a593Smuzhiyun #define STM32F746_PF11_FUNC_GPIO 0x5b00
807*4882a593Smuzhiyun #define STM32F746_PF11_FUNC_SPI5_MOSI 0x5b06
808*4882a593Smuzhiyun #define STM32F746_PF11_FUNC_SAI2_SD_B 0x5b0b
809*4882a593Smuzhiyun #define STM32F746_PF11_FUNC_FMC_SDNRAS 0x5b0d
810*4882a593Smuzhiyun #define STM32F746_PF11_FUNC_DCMI_D12 0x5b0e
811*4882a593Smuzhiyun #define STM32F746_PF11_FUNC_EVENTOUT 0x5b10
812*4882a593Smuzhiyun #define STM32F746_PF11_FUNC_ANALOG 0x5b11
813*4882a593Smuzhiyun 
814*4882a593Smuzhiyun #define STM32F746_PF12_FUNC_GPIO 0x5c00
815*4882a593Smuzhiyun #define STM32F746_PF12_FUNC_FMC_A6 0x5c0d
816*4882a593Smuzhiyun #define STM32F746_PF12_FUNC_EVENTOUT 0x5c10
817*4882a593Smuzhiyun #define STM32F746_PF12_FUNC_ANALOG 0x5c11
818*4882a593Smuzhiyun 
819*4882a593Smuzhiyun #define STM32F746_PF13_FUNC_GPIO 0x5d00
820*4882a593Smuzhiyun #define STM32F746_PF13_FUNC_I2C4_SMBA 0x5d05
821*4882a593Smuzhiyun #define STM32F746_PF13_FUNC_FMC_A7 0x5d0d
822*4882a593Smuzhiyun #define STM32F746_PF13_FUNC_EVENTOUT 0x5d10
823*4882a593Smuzhiyun #define STM32F746_PF13_FUNC_ANALOG 0x5d11
824*4882a593Smuzhiyun 
825*4882a593Smuzhiyun #define STM32F746_PF14_FUNC_GPIO 0x5e00
826*4882a593Smuzhiyun #define STM32F746_PF14_FUNC_I2C4_SCL 0x5e05
827*4882a593Smuzhiyun #define STM32F746_PF14_FUNC_FMC_A8 0x5e0d
828*4882a593Smuzhiyun #define STM32F746_PF14_FUNC_EVENTOUT 0x5e10
829*4882a593Smuzhiyun #define STM32F746_PF14_FUNC_ANALOG 0x5e11
830*4882a593Smuzhiyun 
831*4882a593Smuzhiyun #define STM32F746_PF15_FUNC_GPIO 0x5f00
832*4882a593Smuzhiyun #define STM32F746_PF15_FUNC_I2C4_SDA 0x5f05
833*4882a593Smuzhiyun #define STM32F746_PF15_FUNC_FMC_A9 0x5f0d
834*4882a593Smuzhiyun #define STM32F746_PF15_FUNC_EVENTOUT 0x5f10
835*4882a593Smuzhiyun #define STM32F746_PF15_FUNC_ANALOG 0x5f11
836*4882a593Smuzhiyun 
837*4882a593Smuzhiyun 
838*4882a593Smuzhiyun #define STM32F746_PG0_FUNC_GPIO 0x6000
839*4882a593Smuzhiyun #define STM32F746_PG0_FUNC_FMC_A10 0x600d
840*4882a593Smuzhiyun #define STM32F746_PG0_FUNC_EVENTOUT 0x6010
841*4882a593Smuzhiyun #define STM32F746_PG0_FUNC_ANALOG 0x6011
842*4882a593Smuzhiyun 
843*4882a593Smuzhiyun #define STM32F746_PG1_FUNC_GPIO 0x6100
844*4882a593Smuzhiyun #define STM32F746_PG1_FUNC_FMC_A11 0x610d
845*4882a593Smuzhiyun #define STM32F746_PG1_FUNC_EVENTOUT 0x6110
846*4882a593Smuzhiyun #define STM32F746_PG1_FUNC_ANALOG 0x6111
847*4882a593Smuzhiyun 
848*4882a593Smuzhiyun #define STM32F746_PG2_FUNC_GPIO 0x6200
849*4882a593Smuzhiyun #define STM32F746_PG2_FUNC_FMC_A12 0x620d
850*4882a593Smuzhiyun #define STM32F746_PG2_FUNC_EVENTOUT 0x6210
851*4882a593Smuzhiyun #define STM32F746_PG2_FUNC_ANALOG 0x6211
852*4882a593Smuzhiyun 
853*4882a593Smuzhiyun #define STM32F746_PG3_FUNC_GPIO 0x6300
854*4882a593Smuzhiyun #define STM32F746_PG3_FUNC_FMC_A13 0x630d
855*4882a593Smuzhiyun #define STM32F746_PG3_FUNC_EVENTOUT 0x6310
856*4882a593Smuzhiyun #define STM32F746_PG3_FUNC_ANALOG 0x6311
857*4882a593Smuzhiyun 
858*4882a593Smuzhiyun #define STM32F746_PG4_FUNC_GPIO 0x6400
859*4882a593Smuzhiyun #define STM32F746_PG4_FUNC_FMC_A14_FMC_BA0 0x640d
860*4882a593Smuzhiyun #define STM32F746_PG4_FUNC_EVENTOUT 0x6410
861*4882a593Smuzhiyun #define STM32F746_PG4_FUNC_ANALOG 0x6411
862*4882a593Smuzhiyun 
863*4882a593Smuzhiyun #define STM32F746_PG5_FUNC_GPIO 0x6500
864*4882a593Smuzhiyun #define STM32F746_PG5_FUNC_FMC_A15_FMC_BA1 0x650d
865*4882a593Smuzhiyun #define STM32F746_PG5_FUNC_EVENTOUT 0x6510
866*4882a593Smuzhiyun #define STM32F746_PG5_FUNC_ANALOG 0x6511
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun #define STM32F746_PG6_FUNC_GPIO 0x6600
869*4882a593Smuzhiyun #define STM32F746_PG6_FUNC_DCMI_D12 0x660e
870*4882a593Smuzhiyun #define STM32F746_PG6_FUNC_LCD_R7 0x660f
871*4882a593Smuzhiyun #define STM32F746_PG6_FUNC_EVENTOUT 0x6610
872*4882a593Smuzhiyun #define STM32F746_PG6_FUNC_ANALOG 0x6611
873*4882a593Smuzhiyun 
874*4882a593Smuzhiyun #define STM32F746_PG7_FUNC_GPIO 0x6700
875*4882a593Smuzhiyun #define STM32F746_PG7_FUNC_USART6_CK 0x6709
876*4882a593Smuzhiyun #define STM32F746_PG7_FUNC_FMC_INT 0x670d
877*4882a593Smuzhiyun #define STM32F746_PG7_FUNC_DCMI_D13 0x670e
878*4882a593Smuzhiyun #define STM32F746_PG7_FUNC_LCD_CLK 0x670f
879*4882a593Smuzhiyun #define STM32F746_PG7_FUNC_EVENTOUT 0x6710
880*4882a593Smuzhiyun #define STM32F746_PG7_FUNC_ANALOG 0x6711
881*4882a593Smuzhiyun 
882*4882a593Smuzhiyun #define STM32F746_PG8_FUNC_GPIO 0x6800
883*4882a593Smuzhiyun #define STM32F746_PG8_FUNC_SPI6_NSS 0x6806
884*4882a593Smuzhiyun #define STM32F746_PG8_FUNC_SPDIFRX_IN2 0x6808
885*4882a593Smuzhiyun #define STM32F746_PG8_FUNC_USART6_RTS 0x6809
886*4882a593Smuzhiyun #define STM32F746_PG8_FUNC_ETH_PPS_OUT 0x680c
887*4882a593Smuzhiyun #define STM32F746_PG8_FUNC_FMC_SDCLK 0x680d
888*4882a593Smuzhiyun #define STM32F746_PG8_FUNC_EVENTOUT 0x6810
889*4882a593Smuzhiyun #define STM32F746_PG8_FUNC_ANALOG 0x6811
890*4882a593Smuzhiyun 
891*4882a593Smuzhiyun #define STM32F746_PG9_FUNC_GPIO 0x6900
892*4882a593Smuzhiyun #define STM32F746_PG9_FUNC_SPDIFRX_IN3 0x6908
893*4882a593Smuzhiyun #define STM32F746_PG9_FUNC_USART6_RX 0x6909
894*4882a593Smuzhiyun #define STM32F746_PG9_FUNC_QUADSPI_BK2_IO2 0x690a
895*4882a593Smuzhiyun #define STM32F746_PG9_FUNC_SAI2_FS_B 0x690b
896*4882a593Smuzhiyun #define STM32F746_PG9_FUNC_FMC_NE2_FMC_NCE 0x690d
897*4882a593Smuzhiyun #define STM32F746_PG9_FUNC_DCMI_VSYNC 0x690e
898*4882a593Smuzhiyun #define STM32F746_PG9_FUNC_EVENTOUT 0x6910
899*4882a593Smuzhiyun #define STM32F746_PG9_FUNC_ANALOG 0x6911
900*4882a593Smuzhiyun 
901*4882a593Smuzhiyun #define STM32F746_PG10_FUNC_GPIO 0x6a00
902*4882a593Smuzhiyun #define STM32F746_PG10_FUNC_LCD_G3 0x6a0a
903*4882a593Smuzhiyun #define STM32F746_PG10_FUNC_SAI2_SD_B 0x6a0b
904*4882a593Smuzhiyun #define STM32F746_PG10_FUNC_FMC_NE3 0x6a0d
905*4882a593Smuzhiyun #define STM32F746_PG10_FUNC_DCMI_D2 0x6a0e
906*4882a593Smuzhiyun #define STM32F746_PG10_FUNC_LCD_B2 0x6a0f
907*4882a593Smuzhiyun #define STM32F746_PG10_FUNC_EVENTOUT 0x6a10
908*4882a593Smuzhiyun #define STM32F746_PG10_FUNC_ANALOG 0x6a11
909*4882a593Smuzhiyun 
910*4882a593Smuzhiyun #define STM32F746_PG11_FUNC_GPIO 0x6b00
911*4882a593Smuzhiyun #define STM32F746_PG11_FUNC_SPDIFRX_IN0 0x6b08
912*4882a593Smuzhiyun #define STM32F746_PG11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN 0x6b0c
913*4882a593Smuzhiyun #define STM32F746_PG11_FUNC_DCMI_D3 0x6b0e
914*4882a593Smuzhiyun #define STM32F746_PG11_FUNC_LCD_B3 0x6b0f
915*4882a593Smuzhiyun #define STM32F746_PG11_FUNC_EVENTOUT 0x6b10
916*4882a593Smuzhiyun #define STM32F746_PG11_FUNC_ANALOG 0x6b11
917*4882a593Smuzhiyun 
918*4882a593Smuzhiyun #define STM32F746_PG12_FUNC_GPIO 0x6c00
919*4882a593Smuzhiyun #define STM32F746_PG12_FUNC_LPTIM1_IN1 0x6c04
920*4882a593Smuzhiyun #define STM32F746_PG12_FUNC_SPI6_MISO 0x6c06
921*4882a593Smuzhiyun #define STM32F746_PG12_FUNC_SPDIFRX_IN1 0x6c08
922*4882a593Smuzhiyun #define STM32F746_PG12_FUNC_USART6_RTS 0x6c09
923*4882a593Smuzhiyun #define STM32F746_PG12_FUNC_LCD_B4 0x6c0a
924*4882a593Smuzhiyun #define STM32F746_PG12_FUNC_FMC_NE4 0x6c0d
925*4882a593Smuzhiyun #define STM32F746_PG12_FUNC_LCD_B1 0x6c0f
926*4882a593Smuzhiyun #define STM32F746_PG12_FUNC_EVENTOUT 0x6c10
927*4882a593Smuzhiyun #define STM32F746_PG12_FUNC_ANALOG 0x6c11
928*4882a593Smuzhiyun 
929*4882a593Smuzhiyun #define STM32F746_PG13_FUNC_GPIO 0x6d00
930*4882a593Smuzhiyun #define STM32F746_PG13_FUNC_TRACED0 0x6d01
931*4882a593Smuzhiyun #define STM32F746_PG13_FUNC_LPTIM1_OUT 0x6d04
932*4882a593Smuzhiyun #define STM32F746_PG13_FUNC_SPI6_SCK 0x6d06
933*4882a593Smuzhiyun #define STM32F746_PG13_FUNC_USART6_CTS 0x6d09
934*4882a593Smuzhiyun #define STM32F746_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0 0x6d0c
935*4882a593Smuzhiyun #define STM32F746_PG13_FUNC_FMC_A24 0x6d0d
936*4882a593Smuzhiyun #define STM32F746_PG13_FUNC_LCD_R0 0x6d0f
937*4882a593Smuzhiyun #define STM32F746_PG13_FUNC_EVENTOUT 0x6d10
938*4882a593Smuzhiyun #define STM32F746_PG13_FUNC_ANALOG 0x6d11
939*4882a593Smuzhiyun 
940*4882a593Smuzhiyun #define STM32F746_PG14_FUNC_GPIO 0x6e00
941*4882a593Smuzhiyun #define STM32F746_PG14_FUNC_TRACED1 0x6e01
942*4882a593Smuzhiyun #define STM32F746_PG14_FUNC_LPTIM1_ETR 0x6e04
943*4882a593Smuzhiyun #define STM32F746_PG14_FUNC_SPI6_MOSI 0x6e06
944*4882a593Smuzhiyun #define STM32F746_PG14_FUNC_USART6_TX 0x6e09
945*4882a593Smuzhiyun #define STM32F746_PG14_FUNC_QUADSPI_BK2_IO3 0x6e0a
946*4882a593Smuzhiyun #define STM32F746_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1 0x6e0c
947*4882a593Smuzhiyun #define STM32F746_PG14_FUNC_FMC_A25 0x6e0d
948*4882a593Smuzhiyun #define STM32F746_PG14_FUNC_LCD_B0 0x6e0f
949*4882a593Smuzhiyun #define STM32F746_PG14_FUNC_EVENTOUT 0x6e10
950*4882a593Smuzhiyun #define STM32F746_PG14_FUNC_ANALOG 0x6e11
951*4882a593Smuzhiyun 
952*4882a593Smuzhiyun #define STM32F746_PG15_FUNC_GPIO 0x6f00
953*4882a593Smuzhiyun #define STM32F746_PG15_FUNC_USART6_CTS 0x6f09
954*4882a593Smuzhiyun #define STM32F746_PG15_FUNC_FMC_SDNCAS 0x6f0d
955*4882a593Smuzhiyun #define STM32F746_PG15_FUNC_DCMI_D13 0x6f0e
956*4882a593Smuzhiyun #define STM32F746_PG15_FUNC_EVENTOUT 0x6f10
957*4882a593Smuzhiyun #define STM32F746_PG15_FUNC_ANALOG 0x6f11
958*4882a593Smuzhiyun 
959*4882a593Smuzhiyun 
960*4882a593Smuzhiyun #define STM32F746_PH0_FUNC_GPIO 0x7000
961*4882a593Smuzhiyun #define STM32F746_PH0_FUNC_EVENTOUT 0x7010
962*4882a593Smuzhiyun #define STM32F746_PH0_FUNC_ANALOG 0x7011
963*4882a593Smuzhiyun 
964*4882a593Smuzhiyun #define STM32F746_PH1_FUNC_GPIO 0x7100
965*4882a593Smuzhiyun #define STM32F746_PH1_FUNC_EVENTOUT 0x7110
966*4882a593Smuzhiyun #define STM32F746_PH1_FUNC_ANALOG 0x7111
967*4882a593Smuzhiyun 
968*4882a593Smuzhiyun #define STM32F746_PH2_FUNC_GPIO 0x7200
969*4882a593Smuzhiyun #define STM32F746_PH2_FUNC_LPTIM1_IN2 0x7204
970*4882a593Smuzhiyun #define STM32F746_PH2_FUNC_QUADSPI_BK2_IO0 0x720a
971*4882a593Smuzhiyun #define STM32F746_PH2_FUNC_SAI2_SCK_B 0x720b
972*4882a593Smuzhiyun #define STM32F746_PH2_FUNC_ETH_MII_CRS 0x720c
973*4882a593Smuzhiyun #define STM32F746_PH2_FUNC_FMC_SDCKE0 0x720d
974*4882a593Smuzhiyun #define STM32F746_PH2_FUNC_LCD_R0 0x720f
975*4882a593Smuzhiyun #define STM32F746_PH2_FUNC_EVENTOUT 0x7210
976*4882a593Smuzhiyun #define STM32F746_PH2_FUNC_ANALOG 0x7211
977*4882a593Smuzhiyun 
978*4882a593Smuzhiyun #define STM32F746_PH3_FUNC_GPIO 0x7300
979*4882a593Smuzhiyun #define STM32F746_PH3_FUNC_QUADSPI_BK2_IO1 0x730a
980*4882a593Smuzhiyun #define STM32F746_PH3_FUNC_SAI2_MCLK_B 0x730b
981*4882a593Smuzhiyun #define STM32F746_PH3_FUNC_ETH_MII_COL 0x730c
982*4882a593Smuzhiyun #define STM32F746_PH3_FUNC_FMC_SDNE0 0x730d
983*4882a593Smuzhiyun #define STM32F746_PH3_FUNC_LCD_R1 0x730f
984*4882a593Smuzhiyun #define STM32F746_PH3_FUNC_EVENTOUT 0x7310
985*4882a593Smuzhiyun #define STM32F746_PH3_FUNC_ANALOG 0x7311
986*4882a593Smuzhiyun 
987*4882a593Smuzhiyun #define STM32F746_PH4_FUNC_GPIO 0x7400
988*4882a593Smuzhiyun #define STM32F746_PH4_FUNC_I2C2_SCL 0x7405
989*4882a593Smuzhiyun #define STM32F746_PH4_FUNC_OTG_HS_ULPI_NXT 0x740b
990*4882a593Smuzhiyun #define STM32F746_PH4_FUNC_EVENTOUT 0x7410
991*4882a593Smuzhiyun #define STM32F746_PH4_FUNC_ANALOG 0x7411
992*4882a593Smuzhiyun 
993*4882a593Smuzhiyun #define STM32F746_PH5_FUNC_GPIO 0x7500
994*4882a593Smuzhiyun #define STM32F746_PH5_FUNC_I2C2_SDA 0x7505
995*4882a593Smuzhiyun #define STM32F746_PH5_FUNC_SPI5_NSS 0x7506
996*4882a593Smuzhiyun #define STM32F746_PH5_FUNC_FMC_SDNWE 0x750d
997*4882a593Smuzhiyun #define STM32F746_PH5_FUNC_EVENTOUT 0x7510
998*4882a593Smuzhiyun #define STM32F746_PH5_FUNC_ANALOG 0x7511
999*4882a593Smuzhiyun 
1000*4882a593Smuzhiyun #define STM32F746_PH6_FUNC_GPIO 0x7600
1001*4882a593Smuzhiyun #define STM32F746_PH6_FUNC_I2C2_SMBA 0x7605
1002*4882a593Smuzhiyun #define STM32F746_PH6_FUNC_SPI5_SCK 0x7606
1003*4882a593Smuzhiyun #define STM32F746_PH6_FUNC_TIM12_CH1 0x760a
1004*4882a593Smuzhiyun #define STM32F746_PH6_FUNC_ETH_MII_RXD2 0x760c
1005*4882a593Smuzhiyun #define STM32F746_PH6_FUNC_FMC_SDNE1 0x760d
1006*4882a593Smuzhiyun #define STM32F746_PH6_FUNC_DCMI_D8 0x760e
1007*4882a593Smuzhiyun #define STM32F746_PH6_FUNC_EVENTOUT 0x7610
1008*4882a593Smuzhiyun #define STM32F746_PH6_FUNC_ANALOG 0x7611
1009*4882a593Smuzhiyun 
1010*4882a593Smuzhiyun #define STM32F746_PH7_FUNC_GPIO 0x7700
1011*4882a593Smuzhiyun #define STM32F746_PH7_FUNC_I2C3_SCL 0x7705
1012*4882a593Smuzhiyun #define STM32F746_PH7_FUNC_SPI5_MISO 0x7706
1013*4882a593Smuzhiyun #define STM32F746_PH7_FUNC_ETH_MII_RXD3 0x770c
1014*4882a593Smuzhiyun #define STM32F746_PH7_FUNC_FMC_SDCKE1 0x770d
1015*4882a593Smuzhiyun #define STM32F746_PH7_FUNC_DCMI_D9 0x770e
1016*4882a593Smuzhiyun #define STM32F746_PH7_FUNC_EVENTOUT 0x7710
1017*4882a593Smuzhiyun #define STM32F746_PH7_FUNC_ANALOG 0x7711
1018*4882a593Smuzhiyun 
1019*4882a593Smuzhiyun #define STM32F746_PH8_FUNC_GPIO 0x7800
1020*4882a593Smuzhiyun #define STM32F746_PH8_FUNC_I2C3_SDA 0x7805
1021*4882a593Smuzhiyun #define STM32F746_PH8_FUNC_FMC_D16 0x780d
1022*4882a593Smuzhiyun #define STM32F746_PH8_FUNC_DCMI_HSYNC 0x780e
1023*4882a593Smuzhiyun #define STM32F746_PH8_FUNC_LCD_R2 0x780f
1024*4882a593Smuzhiyun #define STM32F746_PH8_FUNC_EVENTOUT 0x7810
1025*4882a593Smuzhiyun #define STM32F746_PH8_FUNC_ANALOG 0x7811
1026*4882a593Smuzhiyun 
1027*4882a593Smuzhiyun #define STM32F746_PH9_FUNC_GPIO 0x7900
1028*4882a593Smuzhiyun #define STM32F746_PH9_FUNC_I2C3_SMBA 0x7905
1029*4882a593Smuzhiyun #define STM32F746_PH9_FUNC_TIM12_CH2 0x790a
1030*4882a593Smuzhiyun #define STM32F746_PH9_FUNC_FMC_D17 0x790d
1031*4882a593Smuzhiyun #define STM32F746_PH9_FUNC_DCMI_D0 0x790e
1032*4882a593Smuzhiyun #define STM32F746_PH9_FUNC_LCD_R3 0x790f
1033*4882a593Smuzhiyun #define STM32F746_PH9_FUNC_EVENTOUT 0x7910
1034*4882a593Smuzhiyun #define STM32F746_PH9_FUNC_ANALOG 0x7911
1035*4882a593Smuzhiyun 
1036*4882a593Smuzhiyun #define STM32F746_PH10_FUNC_GPIO 0x7a00
1037*4882a593Smuzhiyun #define STM32F746_PH10_FUNC_TIM5_CH1 0x7a03
1038*4882a593Smuzhiyun #define STM32F746_PH10_FUNC_I2C4_SMBA 0x7a05
1039*4882a593Smuzhiyun #define STM32F746_PH10_FUNC_FMC_D18 0x7a0d
1040*4882a593Smuzhiyun #define STM32F746_PH10_FUNC_DCMI_D1 0x7a0e
1041*4882a593Smuzhiyun #define STM32F746_PH10_FUNC_LCD_R4 0x7a0f
1042*4882a593Smuzhiyun #define STM32F746_PH10_FUNC_EVENTOUT 0x7a10
1043*4882a593Smuzhiyun #define STM32F746_PH10_FUNC_ANALOG 0x7a11
1044*4882a593Smuzhiyun 
1045*4882a593Smuzhiyun #define STM32F746_PH11_FUNC_GPIO 0x7b00
1046*4882a593Smuzhiyun #define STM32F746_PH11_FUNC_TIM5_CH2 0x7b03
1047*4882a593Smuzhiyun #define STM32F746_PH11_FUNC_I2C4_SCL 0x7b05
1048*4882a593Smuzhiyun #define STM32F746_PH11_FUNC_FMC_D19 0x7b0d
1049*4882a593Smuzhiyun #define STM32F746_PH11_FUNC_DCMI_D2 0x7b0e
1050*4882a593Smuzhiyun #define STM32F746_PH11_FUNC_LCD_R5 0x7b0f
1051*4882a593Smuzhiyun #define STM32F746_PH11_FUNC_EVENTOUT 0x7b10
1052*4882a593Smuzhiyun #define STM32F746_PH11_FUNC_ANALOG 0x7b11
1053*4882a593Smuzhiyun 
1054*4882a593Smuzhiyun #define STM32F746_PH12_FUNC_GPIO 0x7c00
1055*4882a593Smuzhiyun #define STM32F746_PH12_FUNC_TIM5_CH3 0x7c03
1056*4882a593Smuzhiyun #define STM32F746_PH12_FUNC_I2C4_SDA 0x7c05
1057*4882a593Smuzhiyun #define STM32F746_PH12_FUNC_FMC_D20 0x7c0d
1058*4882a593Smuzhiyun #define STM32F746_PH12_FUNC_DCMI_D3 0x7c0e
1059*4882a593Smuzhiyun #define STM32F746_PH12_FUNC_LCD_R6 0x7c0f
1060*4882a593Smuzhiyun #define STM32F746_PH12_FUNC_EVENTOUT 0x7c10
1061*4882a593Smuzhiyun #define STM32F746_PH12_FUNC_ANALOG 0x7c11
1062*4882a593Smuzhiyun 
1063*4882a593Smuzhiyun #define STM32F746_PH13_FUNC_GPIO 0x7d00
1064*4882a593Smuzhiyun #define STM32F746_PH13_FUNC_TIM8_CH1N 0x7d04
1065*4882a593Smuzhiyun #define STM32F746_PH13_FUNC_CAN1_TX 0x7d0a
1066*4882a593Smuzhiyun #define STM32F746_PH13_FUNC_FMC_D21 0x7d0d
1067*4882a593Smuzhiyun #define STM32F746_PH13_FUNC_LCD_G2 0x7d0f
1068*4882a593Smuzhiyun #define STM32F746_PH13_FUNC_EVENTOUT 0x7d10
1069*4882a593Smuzhiyun #define STM32F746_PH13_FUNC_ANALOG 0x7d11
1070*4882a593Smuzhiyun 
1071*4882a593Smuzhiyun #define STM32F746_PH14_FUNC_GPIO 0x7e00
1072*4882a593Smuzhiyun #define STM32F746_PH14_FUNC_TIM8_CH2N 0x7e04
1073*4882a593Smuzhiyun #define STM32F746_PH14_FUNC_FMC_D22 0x7e0d
1074*4882a593Smuzhiyun #define STM32F746_PH14_FUNC_DCMI_D4 0x7e0e
1075*4882a593Smuzhiyun #define STM32F746_PH14_FUNC_LCD_G3 0x7e0f
1076*4882a593Smuzhiyun #define STM32F746_PH14_FUNC_EVENTOUT 0x7e10
1077*4882a593Smuzhiyun #define STM32F746_PH14_FUNC_ANALOG 0x7e11
1078*4882a593Smuzhiyun 
1079*4882a593Smuzhiyun #define STM32F746_PH15_FUNC_GPIO 0x7f00
1080*4882a593Smuzhiyun #define STM32F746_PH15_FUNC_TIM8_CH3N 0x7f04
1081*4882a593Smuzhiyun #define STM32F746_PH15_FUNC_FMC_D23 0x7f0d
1082*4882a593Smuzhiyun #define STM32F746_PH15_FUNC_DCMI_D11 0x7f0e
1083*4882a593Smuzhiyun #define STM32F746_PH15_FUNC_LCD_G4 0x7f0f
1084*4882a593Smuzhiyun #define STM32F746_PH15_FUNC_EVENTOUT 0x7f10
1085*4882a593Smuzhiyun #define STM32F746_PH15_FUNC_ANALOG 0x7f11
1086*4882a593Smuzhiyun 
1087*4882a593Smuzhiyun 
1088*4882a593Smuzhiyun #define STM32F746_PI0_FUNC_GPIO 0x8000
1089*4882a593Smuzhiyun #define STM32F746_PI0_FUNC_TIM5_CH4 0x8003
1090*4882a593Smuzhiyun #define STM32F746_PI0_FUNC_SPI2_NSS_I2S2_WS 0x8006
1091*4882a593Smuzhiyun #define STM32F746_PI0_FUNC_FMC_D24 0x800d
1092*4882a593Smuzhiyun #define STM32F746_PI0_FUNC_DCMI_D13 0x800e
1093*4882a593Smuzhiyun #define STM32F746_PI0_FUNC_LCD_G5 0x800f
1094*4882a593Smuzhiyun #define STM32F746_PI0_FUNC_EVENTOUT 0x8010
1095*4882a593Smuzhiyun #define STM32F746_PI0_FUNC_ANALOG 0x8011
1096*4882a593Smuzhiyun 
1097*4882a593Smuzhiyun #define STM32F746_PI1_FUNC_GPIO 0x8100
1098*4882a593Smuzhiyun #define STM32F746_PI1_FUNC_TIM8_BKIN2 0x8104
1099*4882a593Smuzhiyun #define STM32F746_PI1_FUNC_SPI2_SCK_I2S2_CK 0x8106
1100*4882a593Smuzhiyun #define STM32F746_PI1_FUNC_FMC_D25 0x810d
1101*4882a593Smuzhiyun #define STM32F746_PI1_FUNC_DCMI_D8 0x810e
1102*4882a593Smuzhiyun #define STM32F746_PI1_FUNC_LCD_G6 0x810f
1103*4882a593Smuzhiyun #define STM32F746_PI1_FUNC_EVENTOUT 0x8110
1104*4882a593Smuzhiyun #define STM32F746_PI1_FUNC_ANALOG 0x8111
1105*4882a593Smuzhiyun 
1106*4882a593Smuzhiyun #define STM32F746_PI2_FUNC_GPIO 0x8200
1107*4882a593Smuzhiyun #define STM32F746_PI2_FUNC_TIM8_CH4 0x8204
1108*4882a593Smuzhiyun #define STM32F746_PI2_FUNC_SPI2_MISO 0x8206
1109*4882a593Smuzhiyun #define STM32F746_PI2_FUNC_FMC_D26 0x820d
1110*4882a593Smuzhiyun #define STM32F746_PI2_FUNC_DCMI_D9 0x820e
1111*4882a593Smuzhiyun #define STM32F746_PI2_FUNC_LCD_G7 0x820f
1112*4882a593Smuzhiyun #define STM32F746_PI2_FUNC_EVENTOUT 0x8210
1113*4882a593Smuzhiyun #define STM32F746_PI2_FUNC_ANALOG 0x8211
1114*4882a593Smuzhiyun 
1115*4882a593Smuzhiyun #define STM32F746_PI3_FUNC_GPIO 0x8300
1116*4882a593Smuzhiyun #define STM32F746_PI3_FUNC_TIM8_ETR 0x8304
1117*4882a593Smuzhiyun #define STM32F746_PI3_FUNC_SPI2_MOSI_I2S2_SD 0x8306
1118*4882a593Smuzhiyun #define STM32F746_PI3_FUNC_FMC_D27 0x830d
1119*4882a593Smuzhiyun #define STM32F746_PI3_FUNC_DCMI_D10 0x830e
1120*4882a593Smuzhiyun #define STM32F746_PI3_FUNC_EVENTOUT 0x8310
1121*4882a593Smuzhiyun #define STM32F746_PI3_FUNC_ANALOG 0x8311
1122*4882a593Smuzhiyun 
1123*4882a593Smuzhiyun #define STM32F746_PI4_FUNC_GPIO 0x8400
1124*4882a593Smuzhiyun #define STM32F746_PI4_FUNC_TIM8_BKIN 0x8404
1125*4882a593Smuzhiyun #define STM32F746_PI4_FUNC_SAI2_MCLK_A 0x840b
1126*4882a593Smuzhiyun #define STM32F746_PI4_FUNC_FMC_NBL2 0x840d
1127*4882a593Smuzhiyun #define STM32F746_PI4_FUNC_DCMI_D5 0x840e
1128*4882a593Smuzhiyun #define STM32F746_PI4_FUNC_LCD_B4 0x840f
1129*4882a593Smuzhiyun #define STM32F746_PI4_FUNC_EVENTOUT 0x8410
1130*4882a593Smuzhiyun #define STM32F746_PI4_FUNC_ANALOG 0x8411
1131*4882a593Smuzhiyun 
1132*4882a593Smuzhiyun #define STM32F746_PI5_FUNC_GPIO 0x8500
1133*4882a593Smuzhiyun #define STM32F746_PI5_FUNC_TIM8_CH1 0x8504
1134*4882a593Smuzhiyun #define STM32F746_PI5_FUNC_SAI2_SCK_A 0x850b
1135*4882a593Smuzhiyun #define STM32F746_PI5_FUNC_FMC_NBL3 0x850d
1136*4882a593Smuzhiyun #define STM32F746_PI5_FUNC_DCMI_VSYNC 0x850e
1137*4882a593Smuzhiyun #define STM32F746_PI5_FUNC_LCD_B5 0x850f
1138*4882a593Smuzhiyun #define STM32F746_PI5_FUNC_EVENTOUT 0x8510
1139*4882a593Smuzhiyun #define STM32F746_PI5_FUNC_ANALOG 0x8511
1140*4882a593Smuzhiyun 
1141*4882a593Smuzhiyun #define STM32F746_PI6_FUNC_GPIO 0x8600
1142*4882a593Smuzhiyun #define STM32F746_PI6_FUNC_TIM8_CH2 0x8604
1143*4882a593Smuzhiyun #define STM32F746_PI6_FUNC_SAI2_SD_A 0x860b
1144*4882a593Smuzhiyun #define STM32F746_PI6_FUNC_FMC_D28 0x860d
1145*4882a593Smuzhiyun #define STM32F746_PI6_FUNC_DCMI_D6 0x860e
1146*4882a593Smuzhiyun #define STM32F746_PI6_FUNC_LCD_B6 0x860f
1147*4882a593Smuzhiyun #define STM32F746_PI6_FUNC_EVENTOUT 0x8610
1148*4882a593Smuzhiyun #define STM32F746_PI6_FUNC_ANALOG 0x8611
1149*4882a593Smuzhiyun 
1150*4882a593Smuzhiyun #define STM32F746_PI7_FUNC_GPIO 0x8700
1151*4882a593Smuzhiyun #define STM32F746_PI7_FUNC_TIM8_CH3 0x8704
1152*4882a593Smuzhiyun #define STM32F746_PI7_FUNC_SAI2_FS_A 0x870b
1153*4882a593Smuzhiyun #define STM32F746_PI7_FUNC_FMC_D29 0x870d
1154*4882a593Smuzhiyun #define STM32F746_PI7_FUNC_DCMI_D7 0x870e
1155*4882a593Smuzhiyun #define STM32F746_PI7_FUNC_LCD_B7 0x870f
1156*4882a593Smuzhiyun #define STM32F746_PI7_FUNC_EVENTOUT 0x8710
1157*4882a593Smuzhiyun #define STM32F746_PI7_FUNC_ANALOG 0x8711
1158*4882a593Smuzhiyun 
1159*4882a593Smuzhiyun #define STM32F746_PI8_FUNC_GPIO 0x8800
1160*4882a593Smuzhiyun #define STM32F746_PI8_FUNC_EVENTOUT 0x8810
1161*4882a593Smuzhiyun #define STM32F746_PI8_FUNC_ANALOG 0x8811
1162*4882a593Smuzhiyun 
1163*4882a593Smuzhiyun #define STM32F746_PI9_FUNC_GPIO 0x8900
1164*4882a593Smuzhiyun #define STM32F746_PI9_FUNC_CAN1_RX 0x890a
1165*4882a593Smuzhiyun #define STM32F746_PI9_FUNC_FMC_D30 0x890d
1166*4882a593Smuzhiyun #define STM32F746_PI9_FUNC_LCD_VSYNC 0x890f
1167*4882a593Smuzhiyun #define STM32F746_PI9_FUNC_EVENTOUT 0x8910
1168*4882a593Smuzhiyun #define STM32F746_PI9_FUNC_ANALOG 0x8911
1169*4882a593Smuzhiyun 
1170*4882a593Smuzhiyun #define STM32F746_PI10_FUNC_GPIO 0x8a00
1171*4882a593Smuzhiyun #define STM32F746_PI10_FUNC_ETH_MII_RX_ER 0x8a0c
1172*4882a593Smuzhiyun #define STM32F746_PI10_FUNC_FMC_D31 0x8a0d
1173*4882a593Smuzhiyun #define STM32F746_PI10_FUNC_LCD_HSYNC 0x8a0f
1174*4882a593Smuzhiyun #define STM32F746_PI10_FUNC_EVENTOUT 0x8a10
1175*4882a593Smuzhiyun #define STM32F746_PI10_FUNC_ANALOG 0x8a11
1176*4882a593Smuzhiyun 
1177*4882a593Smuzhiyun #define STM32F746_PI11_FUNC_GPIO 0x8b00
1178*4882a593Smuzhiyun #define STM32F746_PI11_FUNC_OTG_HS_ULPI_DIR 0x8b0b
1179*4882a593Smuzhiyun #define STM32F746_PI11_FUNC_EVENTOUT 0x8b10
1180*4882a593Smuzhiyun #define STM32F746_PI11_FUNC_ANALOG 0x8b11
1181*4882a593Smuzhiyun 
1182*4882a593Smuzhiyun #define STM32F746_PI12_FUNC_GPIO 0x8c00
1183*4882a593Smuzhiyun #define STM32F746_PI12_FUNC_LCD_HSYNC 0x8c0f
1184*4882a593Smuzhiyun #define STM32F746_PI12_FUNC_EVENTOUT 0x8c10
1185*4882a593Smuzhiyun #define STM32F746_PI12_FUNC_ANALOG 0x8c11
1186*4882a593Smuzhiyun 
1187*4882a593Smuzhiyun #define STM32F746_PI13_FUNC_GPIO 0x8d00
1188*4882a593Smuzhiyun #define STM32F746_PI13_FUNC_LCD_VSYNC 0x8d0f
1189*4882a593Smuzhiyun #define STM32F746_PI13_FUNC_EVENTOUT 0x8d10
1190*4882a593Smuzhiyun #define STM32F746_PI13_FUNC_ANALOG 0x8d11
1191*4882a593Smuzhiyun 
1192*4882a593Smuzhiyun #define STM32F746_PI14_FUNC_GPIO 0x8e00
1193*4882a593Smuzhiyun #define STM32F746_PI14_FUNC_LCD_CLK 0x8e0f
1194*4882a593Smuzhiyun #define STM32F746_PI14_FUNC_EVENTOUT 0x8e10
1195*4882a593Smuzhiyun #define STM32F746_PI14_FUNC_ANALOG 0x8e11
1196*4882a593Smuzhiyun 
1197*4882a593Smuzhiyun #define STM32F746_PI15_FUNC_GPIO 0x8f00
1198*4882a593Smuzhiyun #define STM32F746_PI15_FUNC_LCD_R0 0x8f0f
1199*4882a593Smuzhiyun #define STM32F746_PI15_FUNC_EVENTOUT 0x8f10
1200*4882a593Smuzhiyun #define STM32F746_PI15_FUNC_ANALOG 0x8f11
1201*4882a593Smuzhiyun 
1202*4882a593Smuzhiyun 
1203*4882a593Smuzhiyun #define STM32F746_PJ0_FUNC_GPIO 0x9000
1204*4882a593Smuzhiyun #define STM32F746_PJ0_FUNC_LCD_R1 0x900f
1205*4882a593Smuzhiyun #define STM32F746_PJ0_FUNC_EVENTOUT 0x9010
1206*4882a593Smuzhiyun #define STM32F746_PJ0_FUNC_ANALOG 0x9011
1207*4882a593Smuzhiyun 
1208*4882a593Smuzhiyun #define STM32F746_PJ1_FUNC_GPIO 0x9100
1209*4882a593Smuzhiyun #define STM32F746_PJ1_FUNC_LCD_R2 0x910f
1210*4882a593Smuzhiyun #define STM32F746_PJ1_FUNC_EVENTOUT 0x9110
1211*4882a593Smuzhiyun #define STM32F746_PJ1_FUNC_ANALOG 0x9111
1212*4882a593Smuzhiyun 
1213*4882a593Smuzhiyun #define STM32F746_PJ2_FUNC_GPIO 0x9200
1214*4882a593Smuzhiyun #define STM32F746_PJ2_FUNC_LCD_R3 0x920f
1215*4882a593Smuzhiyun #define STM32F746_PJ2_FUNC_EVENTOUT 0x9210
1216*4882a593Smuzhiyun #define STM32F746_PJ2_FUNC_ANALOG 0x9211
1217*4882a593Smuzhiyun 
1218*4882a593Smuzhiyun #define STM32F746_PJ3_FUNC_GPIO 0x9300
1219*4882a593Smuzhiyun #define STM32F746_PJ3_FUNC_LCD_R4 0x930f
1220*4882a593Smuzhiyun #define STM32F746_PJ3_FUNC_EVENTOUT 0x9310
1221*4882a593Smuzhiyun #define STM32F746_PJ3_FUNC_ANALOG 0x9311
1222*4882a593Smuzhiyun 
1223*4882a593Smuzhiyun #define STM32F746_PJ4_FUNC_GPIO 0x9400
1224*4882a593Smuzhiyun #define STM32F746_PJ4_FUNC_LCD_R5 0x940f
1225*4882a593Smuzhiyun #define STM32F746_PJ4_FUNC_EVENTOUT 0x9410
1226*4882a593Smuzhiyun #define STM32F746_PJ4_FUNC_ANALOG 0x9411
1227*4882a593Smuzhiyun 
1228*4882a593Smuzhiyun #define STM32F746_PJ5_FUNC_GPIO 0x9500
1229*4882a593Smuzhiyun #define STM32F746_PJ5_FUNC_LCD_R6 0x950f
1230*4882a593Smuzhiyun #define STM32F746_PJ5_FUNC_EVENTOUT 0x9510
1231*4882a593Smuzhiyun #define STM32F746_PJ5_FUNC_ANALOG 0x9511
1232*4882a593Smuzhiyun 
1233*4882a593Smuzhiyun #define STM32F746_PJ6_FUNC_GPIO 0x9600
1234*4882a593Smuzhiyun #define STM32F746_PJ6_FUNC_LCD_R7 0x960f
1235*4882a593Smuzhiyun #define STM32F746_PJ6_FUNC_EVENTOUT 0x9610
1236*4882a593Smuzhiyun #define STM32F746_PJ6_FUNC_ANALOG 0x9611
1237*4882a593Smuzhiyun 
1238*4882a593Smuzhiyun #define STM32F746_PJ7_FUNC_GPIO 0x9700
1239*4882a593Smuzhiyun #define STM32F746_PJ7_FUNC_LCD_G0 0x970f
1240*4882a593Smuzhiyun #define STM32F746_PJ7_FUNC_EVENTOUT 0x9710
1241*4882a593Smuzhiyun #define STM32F746_PJ7_FUNC_ANALOG 0x9711
1242*4882a593Smuzhiyun 
1243*4882a593Smuzhiyun #define STM32F746_PJ8_FUNC_GPIO 0x9800
1244*4882a593Smuzhiyun #define STM32F746_PJ8_FUNC_LCD_G1 0x980f
1245*4882a593Smuzhiyun #define STM32F746_PJ8_FUNC_EVENTOUT 0x9810
1246*4882a593Smuzhiyun #define STM32F746_PJ8_FUNC_ANALOG 0x9811
1247*4882a593Smuzhiyun 
1248*4882a593Smuzhiyun #define STM32F746_PJ9_FUNC_GPIO 0x9900
1249*4882a593Smuzhiyun #define STM32F746_PJ9_FUNC_LCD_G2 0x990f
1250*4882a593Smuzhiyun #define STM32F746_PJ9_FUNC_EVENTOUT 0x9910
1251*4882a593Smuzhiyun #define STM32F746_PJ9_FUNC_ANALOG 0x9911
1252*4882a593Smuzhiyun 
1253*4882a593Smuzhiyun #define STM32F746_PJ10_FUNC_GPIO 0x9a00
1254*4882a593Smuzhiyun #define STM32F746_PJ10_FUNC_LCD_G3 0x9a0f
1255*4882a593Smuzhiyun #define STM32F746_PJ10_FUNC_EVENTOUT 0x9a10
1256*4882a593Smuzhiyun #define STM32F746_PJ10_FUNC_ANALOG 0x9a11
1257*4882a593Smuzhiyun 
1258*4882a593Smuzhiyun #define STM32F746_PJ11_FUNC_GPIO 0x9b00
1259*4882a593Smuzhiyun #define STM32F746_PJ11_FUNC_LCD_G4 0x9b0f
1260*4882a593Smuzhiyun #define STM32F746_PJ11_FUNC_EVENTOUT 0x9b10
1261*4882a593Smuzhiyun #define STM32F746_PJ11_FUNC_ANALOG 0x9b11
1262*4882a593Smuzhiyun 
1263*4882a593Smuzhiyun #define STM32F746_PJ12_FUNC_GPIO 0x9c00
1264*4882a593Smuzhiyun #define STM32F746_PJ12_FUNC_LCD_B0 0x9c0f
1265*4882a593Smuzhiyun #define STM32F746_PJ12_FUNC_EVENTOUT 0x9c10
1266*4882a593Smuzhiyun #define STM32F746_PJ12_FUNC_ANALOG 0x9c11
1267*4882a593Smuzhiyun 
1268*4882a593Smuzhiyun #define STM32F746_PJ13_FUNC_GPIO 0x9d00
1269*4882a593Smuzhiyun #define STM32F746_PJ13_FUNC_LCD_B1 0x9d0f
1270*4882a593Smuzhiyun #define STM32F746_PJ13_FUNC_EVENTOUT 0x9d10
1271*4882a593Smuzhiyun #define STM32F746_PJ13_FUNC_ANALOG 0x9d11
1272*4882a593Smuzhiyun 
1273*4882a593Smuzhiyun #define STM32F746_PJ14_FUNC_GPIO 0x9e00
1274*4882a593Smuzhiyun #define STM32F746_PJ14_FUNC_LCD_B2 0x9e0f
1275*4882a593Smuzhiyun #define STM32F746_PJ14_FUNC_EVENTOUT 0x9e10
1276*4882a593Smuzhiyun #define STM32F746_PJ14_FUNC_ANALOG 0x9e11
1277*4882a593Smuzhiyun 
1278*4882a593Smuzhiyun #define STM32F746_PJ15_FUNC_GPIO 0x9f00
1279*4882a593Smuzhiyun #define STM32F746_PJ15_FUNC_LCD_B3 0x9f0f
1280*4882a593Smuzhiyun #define STM32F746_PJ15_FUNC_EVENTOUT 0x9f10
1281*4882a593Smuzhiyun #define STM32F746_PJ15_FUNC_ANALOG 0x9f11
1282*4882a593Smuzhiyun 
1283*4882a593Smuzhiyun 
1284*4882a593Smuzhiyun #define STM32F746_PK0_FUNC_GPIO 0xa000
1285*4882a593Smuzhiyun #define STM32F746_PK0_FUNC_LCD_G5 0xa00f
1286*4882a593Smuzhiyun #define STM32F746_PK0_FUNC_EVENTOUT 0xa010
1287*4882a593Smuzhiyun #define STM32F746_PK0_FUNC_ANALOG 0xa011
1288*4882a593Smuzhiyun 
1289*4882a593Smuzhiyun #define STM32F746_PK1_FUNC_GPIO 0xa100
1290*4882a593Smuzhiyun #define STM32F746_PK1_FUNC_LCD_G6 0xa10f
1291*4882a593Smuzhiyun #define STM32F746_PK1_FUNC_EVENTOUT 0xa110
1292*4882a593Smuzhiyun #define STM32F746_PK1_FUNC_ANALOG 0xa111
1293*4882a593Smuzhiyun 
1294*4882a593Smuzhiyun #define STM32F746_PK2_FUNC_GPIO 0xa200
1295*4882a593Smuzhiyun #define STM32F746_PK2_FUNC_LCD_G7 0xa20f
1296*4882a593Smuzhiyun #define STM32F746_PK2_FUNC_EVENTOUT 0xa210
1297*4882a593Smuzhiyun #define STM32F746_PK2_FUNC_ANALOG 0xa211
1298*4882a593Smuzhiyun 
1299*4882a593Smuzhiyun #define STM32F746_PK3_FUNC_GPIO 0xa300
1300*4882a593Smuzhiyun #define STM32F746_PK3_FUNC_LCD_B4 0xa30f
1301*4882a593Smuzhiyun #define STM32F746_PK3_FUNC_EVENTOUT 0xa310
1302*4882a593Smuzhiyun #define STM32F746_PK3_FUNC_ANALOG 0xa311
1303*4882a593Smuzhiyun 
1304*4882a593Smuzhiyun #define STM32F746_PK4_FUNC_GPIO 0xa400
1305*4882a593Smuzhiyun #define STM32F746_PK4_FUNC_LCD_B5 0xa40f
1306*4882a593Smuzhiyun #define STM32F746_PK4_FUNC_EVENTOUT 0xa410
1307*4882a593Smuzhiyun #define STM32F746_PK4_FUNC_ANALOG 0xa411
1308*4882a593Smuzhiyun 
1309*4882a593Smuzhiyun #define STM32F746_PK5_FUNC_GPIO 0xa500
1310*4882a593Smuzhiyun #define STM32F746_PK5_FUNC_LCD_B6 0xa50f
1311*4882a593Smuzhiyun #define STM32F746_PK5_FUNC_EVENTOUT 0xa510
1312*4882a593Smuzhiyun #define STM32F746_PK5_FUNC_ANALOG 0xa511
1313*4882a593Smuzhiyun 
1314*4882a593Smuzhiyun #define STM32F746_PK6_FUNC_GPIO 0xa600
1315*4882a593Smuzhiyun #define STM32F746_PK6_FUNC_LCD_B7 0xa60f
1316*4882a593Smuzhiyun #define STM32F746_PK6_FUNC_EVENTOUT 0xa610
1317*4882a593Smuzhiyun #define STM32F746_PK6_FUNC_ANALOG 0xa611
1318*4882a593Smuzhiyun 
1319*4882a593Smuzhiyun #define STM32F746_PK7_FUNC_GPIO 0xa700
1320*4882a593Smuzhiyun #define STM32F746_PK7_FUNC_LCD_DE 0xa70f
1321*4882a593Smuzhiyun #define STM32F746_PK7_FUNC_EVENTOUT 0xa710
1322*4882a593Smuzhiyun #define STM32F746_PK7_FUNC_ANALOG 0xa711
1323*4882a593Smuzhiyun 
1324*4882a593Smuzhiyun #endif /* _DT_BINDINGS_STM32F746_PINFUNC_H */
1325