| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/bus/ |
| H A D | qcom,ebi2.txt | 24 CS0 GPIO134 0x1a800000-0x1b000000 (8MB)
25 CS1 GPIO39 (A) / GPIO123 (B) 0x1b000000-0x1b800000 (8MB)
26 CS2 GPIO40 (A) / GPIO124 (B) 0x1b800000-0x1c000000 (8MB)
27 CS3 GPIO133 0x1d000000-0x25000000 (128 MB)
28 CS4 GPIO132 0x1c800000-0x1d000000 (8MB)
29 CS5 GPIO131 0x1c000000-0x1c800000 (8MB)
58 ranges = <0 0x0 0x1a800000 0x00800000>,
59 <1 0x0 0x1b000000 0x00800000>,
60 <2 0x0 0x1b800000 0x00800000>,
61 <3 0x0 0x1d000000 0x08000000>,
[all …]
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| /OK3568_Linux_fs/u-boot/arch/mips/mach-ath79/include/mach/ |
| H A D | ar71xx_regs.h | 23 #define AR71XX_APB_BASE 0x18000000
24 #define AR71XX_GE0_BASE 0x19000000
25 #define AR71XX_GE0_SIZE 0x10000
26 #define AR71XX_GE1_BASE 0x1a000000
27 #define AR71XX_GE1_SIZE 0x10000
28 #define AR71XX_EHCI_BASE 0x1b000000
29 #define AR71XX_EHCI_SIZE 0x1000
30 #define AR71XX_OHCI_BASE 0x1c000000
31 #define AR71XX_OHCI_SIZE 0x1000
32 #define AR71XX_SPI_BASE 0x1f000000
[all …]
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| /OK3568_Linux_fs/kernel/arch/mips/include/asm/mach-ath79/ |
| H A D | ar71xx_regs.h | 19 #define AR71XX_APB_BASE 0x18000000
20 #define AR71XX_GE0_BASE 0x19000000
21 #define AR71XX_GE0_SIZE 0x10000
22 #define AR71XX_GE1_BASE 0x1a000000
23 #define AR71XX_GE1_SIZE 0x10000
24 #define AR71XX_EHCI_BASE 0x1b000000
25 #define AR71XX_EHCI_SIZE 0x1000
26 #define AR71XX_OHCI_BASE 0x1c000000
27 #define AR71XX_OHCI_SIZE 0x1000
28 #define AR71XX_SPI_BASE 0x1f000000
[all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/mediatek/ |
| H A D | mediatek,ipesys.txt | 20 reg = <0 0x1b000000 0 0x1000>;
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| H A D | mediatek,ethsys.txt | 24 reg = <0 0x1b000000 0 0x1000>;
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| /OK3568_Linux_fs/u-boot/arch/mips/include/asm/ |
| H A D | malta.h | 11 #define MALTA_GT_BASE 0x1be00000
12 #define MALTA_GT_PCIIO_BASE 0x18000000
13 #define MALTA_GT_UART0_BASE (MALTA_GT_PCIIO_BASE + 0x3f8)
15 #define MALTA_MSC01_BIU_BASE 0x1bc80000
16 #define MALTA_MSC01_PCI_BASE 0x1bd00000
17 #define MALTA_MSC01_PBC_BASE 0x1bd40000
18 #define MALTA_MSC01_IP1_BASE 0x1bc00000
19 #define MALTA_MSC01_IP1_SIZE 0x00400000
20 #define MALTA_MSC01_IP2_BASE1 0x10000000
21 #define MALTA_MSC01_IP2_SIZE1 0x08000000
[all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/dma/ |
| H A D | apm-xgene-dma.txt | 27 clocks = <&socplldiv2 0>;
28 reg = <0x0 0x1f27c000 0x0 0x1000>;
36 reg = <0x0 0x1f270000 0x0 0x10000>,
37 <0x0 0x1f200000 0x0 0x10000>,
38 <0x0 0x1b000000 0x0 0x400000>,
39 <0x0 0x1054a000 0x0 0x100>;
40 interrupts = <0x0 0x82 0x4>,
41 <0x0 0xb8 0x4>,
42 <0x0 0xb9 0x4>,
43 <0x0 0xba 0x4>,
[all …]
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| /OK3568_Linux_fs/kernel/arch/arm/configs/ |
| H A D | lpc18xx_defconfig | 23 CONFIG_DRAM_BASE=0x28000000
24 CONFIG_DRAM_SIZE=0x02000000
25 CONFIG_FLASH_MEM_BASE=0x1b000000
26 CONFIG_FLASH_SIZE=0x00080000
27 CONFIG_ZBOOT_ROM_TEXT=0x0
28 CONFIG_ZBOOT_ROM_BSS=0x0
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | ingenic,nemc.yaml | 14 pattern: "^memory-controller@[0-9a-f]+$"
40 ".*@[0-9]+$":
91 reg = <0x13410000 0x10000>;
94 ranges = <1 0 0x1b000000 0x1000000>,
95 <2 0 0x1a000000 0x1000000>,
96 <3 0 0x19000000 0x1000000>,
97 <4 0 0x18000000 0x1000000>,
98 <5 0 0x17000000 0x1000000>,
99 <6 0 0x16000000 0x1000000>;
108 pinctrl-0 = <&pins_nemc_cs6>;
[all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mtd/ |
| H A D | ingenic,nand.yaml | 61 reg = <0x13410000 0x10000>;
64 ranges = <1 0 0x1b000000 0x1000000>,
65 <2 0 0x1a000000 0x1000000>,
66 <3 0 0x19000000 0x1000000>,
67 <4 0 0x18000000 0x1000000>,
68 <5 0 0x17000000 0x1000000>,
69 <6 0 0x16000000 0x1000000>;
75 reg = <1 0 0x1000000>;
78 #size-cells = <0>;
89 pinctrl-0 = <&pins_nemc>;
[all …]
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| /OK3568_Linux_fs/kernel/arch/arc/boot/dts/ |
| H A D | axc001.dtsi | 23 ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
26 #clock-cells = <0>;
32 #clock-cells = <0>;
49 reg = < 0x2000 0x80 >;
51 #size-cells = <0>;
53 ictl_intc: gpio-controller@0 {
58 reg = <0>;
68 reg = <0x5000 0x100>;
97 reg = < 0x0 0xe0012000 0x0 0x200 >;
106 reg = <0x0 0x80000000 0x0 0x1b000000>; /* (512 - 32) MiB */
[all …]
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| /OK3568_Linux_fs/kernel/arch/mips/alchemy/devboards/ |
| H A D | db1000.c | 50 return 0; in db1000_board_setup()
57 if ((slot < 12) || (slot > 13) || pin == 0) in db1500_map_pci_irq()
60 return (pin == 1) ? AU1500_PCI_INTA : 0xff; in db1500_map_pci_irq()
75 [0] = {
77 .end = AU1500_PCI_PHYS_ADDR + 0xfff,
89 .id = 0,
100 [0] = {
102 .end = AU1100_LCD_PHYS_ADDR + 0x800 - 1,
114 .id = 0,
124 [0] = {
[all …]
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| /OK3568_Linux_fs/kernel/arch/mips/boot/dts/qca/ |
| H A D | ar9331.dtsi | 12 #size-cells = <0>;
14 cpu@0 {
18 reg = <0>;
34 #clock-cells = <0>;
57 reg = <0x18000000 0x100>;
64 reg = <0x18020000 0x14>;
76 reg = <0x18040000 0x34>;
92 reg = <0x18050000 0x100>;
102 reg = <0x18060010 0x8>;
113 reg = <0x1806001c 0x4>;
[all …]
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| /OK3568_Linux_fs/u-boot/drivers/soc/keystone/ |
| H A D | keystone_serdes.c | 14 #define SERDES_CMU_REGS(x) (0x0000 + (0x0c00 * (x)))
15 #define SERDES_LANE_REGS(x) (0x0200 + (0x200 * (x)))
16 #define SERDES_COMLANE_REGS 0x0a00
17 #define SERDES_WIZ_REGS 0x1fc0
19 #define SERDES_CMU_REG_000(x) (SERDES_CMU_REGS(x) + 0x000)
20 #define SERDES_CMU_REG_010(x) (SERDES_CMU_REGS(x) + 0x010)
21 #define SERDES_COMLANE_REG_000 (SERDES_COMLANE_REGS + 0x000)
22 #define SERDES_LANE_REG_000(x) (SERDES_LANE_REGS(x) + 0x000)
23 #define SERDES_LANE_REG_028(x) (SERDES_LANE_REGS(x) + 0x028)
24 #define SERDES_LANE_CTL_STATUS_REG(x) (SERDES_WIZ_REGS + 0x0020 + (4 * (x)))
[all …]
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| /OK3568_Linux_fs/kernel/arch/arm/mach-integrator/ |
| H A D | hardware.h | 14 #define IO_BASE 0xF0000000 // VA of IO
15 #define IO_SIZE 0x0B000000 // How much?
20 #define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE)
30 #define INTEGRATOR_BOOT_ROM_LO 0x00000000
31 #define INTEGRATOR_BOOT_ROM_HI 0x20000000
45 #define INTEGRATOR_SSRAM_BASE 0x00000000
46 #define INTEGRATOR_SSRAM_ALIAS_BASE 0x10800000
49 #define INTEGRATOR_FLASH_BASE 0x24000000
52 #define INTEGRATOR_MBRD_SSRAM_BASE 0x28000000
58 #define INTEGRATOR_SDRAM_BASE 0x00040000
[all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/apm/ |
| H A D | apm-storm.dtsi | 16 #size-cells = <0>;
18 cpu@0 {
21 reg = <0x0 0x000>;
23 cpu-release-addr = <0x1 0x0000fff8>;
29 reg = <0x0 0x001>;
31 cpu-release-addr = <0x1 0x0000fff8>;
37 reg = <0x0 0x100>;
39 cpu-release-addr = <0x1 0x0000fff8>;
45 reg = <0x0 0x101>;
47 cpu-release-addr = <0x1 0x0000fff8>;
[all …]
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| /OK3568_Linux_fs/u-boot/arch/x86/dts/microcode/ |
| H A D | m12306a9_0000001b.dtsi | 37 intel,update-revision = <0x1b>;
38 intel,date-code = <0x5292014>;
39 intel,processor-signature = <0x306a9>;
40 intel,checksum = <0x579ae07a>;
42 intel,processor-flags = <0x12>;
46 0x01000000 0x1b000000 0x14202905 0xa9060300
47 0x7ae09a57 0x01000000 0x12000000 0xd02f0000
48 0x00300000 0x00000000 0x00000000 0x00000000
49 0x00000000 0xa1000000 0x01000200 0x1b000000
50 0x00000000 0x00000000 0x16051420 0x610b0000
[all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/include/asm/ |
| H A D | insn.h | 22 * 0 0 - - Unallocated
23 * 1 0 0 - Data processing, immediate
24 * 1 0 1 - Branch, exception generation and system instructions
25 * - 1 - 0 Loads and stores
26 * - 1 0 1 Data processing - register
27 * 0 1 1 1 Data processing - SIMD and floating point
42 AARCH64_INSN_HINT_NOP = 0x0 << 5,
43 AARCH64_INSN_HINT_YIELD = 0x1 << 5,
44 AARCH64_INSN_HINT_WFE = 0x2 << 5,
45 AARCH64_INSN_HINT_WFI = 0x3 << 5,
[all …]
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| /OK3568_Linux_fs/kernel/arch/mips/boot/dts/ingenic/ |
| H A D | jz4780.dtsi | 13 #size-cells = <0>;
15 cpu0: cpu@0 {
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
18 reg = <0>;
26 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
35 #address-cells = <0>;
43 reg = <0x10001000 0x50>;
54 #clock-cells = <0>;
59 #clock-cells = <0>;
65 reg = <0x10000000 0x100>;
[all …]
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| /OK3568_Linux_fs/kernel/arch/mips/sni/ |
| H A D | rm200.c | 37 MEMPORT(0x160003f8, RM200_I8259A_IRQ_BASE + 4),
38 MEMPORT(0x160002f8, RM200_I8259A_IRQ_BASE + 3),
52 .start = 0x1cd41ffc,
53 .end = 0x1cd41fff,
66 .start = 0x18000000,
67 .end = 0x180fffff,
71 .start = 0x1b000000,
72 .end = 0x1b000004,
76 .start = 0x1ff00000,
77 .end = 0x1ff00020,
[all …]
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | mt7629.dtsi | 24 #size-cells = <0>;
27 cpu0: cpu@0 {
30 reg = <0x0>;
38 reg = <0x1>;
51 clk20m: oscillator-0 {
53 #clock-cells = <0>;
60 #clock-cells = <0>;
83 reg = <0x10000000 0x1000>;
89 reg = <0x10002000 0x1000>;
97 reg = <0x10006000 0x1000>;
[all …]
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| H A D | qcom-msm8660.dtsi | 18 #size-cells = <0>;
20 cpu@0 {
24 reg = <0>;
44 reg = <0x0 0x0>;
49 interrupts = <1 9 0x304>;
55 #clock-cells = <0>;
61 #clock-cells = <0>;
67 #clock-cells = <0>;
79 io-channels = <&xoadc 0x00 0x01>, /* Battery */
80 <&xoadc 0x00 0x02>, /* DC in (charger) */
[all …]
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| H A D | mt2701.dtsi | 25 #size-cells = <0>;
28 cpu@0 {
31 reg = <0x0>;
36 reg = <0x1>;
41 reg = <0x2>;
46 reg = <0x3>;
57 reg = <0 0x80002000 0 0x1000>;
64 #clock-cells = <0>;
70 #clock-cells = <0>;
73 clk26m: oscillator@0 {
[all …]
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| /OK3568_Linux_fs/kernel/drivers/net/usb/ |
| H A D | lan78xx.h | 9 #define USB_VENDOR_REQUEST_WRITE_REGISTER 0xA0
10 #define USB_VENDOR_REQUEST_READ_REGISTER 0xA1
11 #define USB_VENDOR_REQUEST_GET_STATS 0xA2
32 #define TX_CMD_A_IGE_ (0x20000000)
33 #define TX_CMD_A_ICE_ (0x10000000)
34 #define TX_CMD_A_LSO_ (0x08000000)
35 #define TX_CMD_A_IPE_ (0x04000000)
36 #define TX_CMD_A_TPE_ (0x02000000)
37 #define TX_CMD_A_IVTG_ (0x01000000)
38 #define TX_CMD_A_RVTG_ (0x00800000)
[all …]
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| /OK3568_Linux_fs/kernel/arch/mips/boot/dts/img/ |
| H A D | pistachio.dtsi | 23 #size-cells = <0>;
25 cpu0: cpu@0 {
28 reg = <0>;
46 reg = <0x18100000 0x200>;
56 pinctrl-0 = <&i2c0_pins>;
59 #size-cells = <0>;
64 reg = <0x18100200 0x200>;
74 pinctrl-0 = <&i2c1_pins>;
77 #size-cells = <0>;
82 reg = <0x18100400 0x200>;
[all …]
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