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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pci/
H A Dversatile.yaml38 - const: 0x1800
39 - const: 0
40 - const: 0
58 reg = <0x10001000 0x1000>,
59 <0x41000000 0x10000>,
60 <0x42000000 0x100000>;
61 bus-range = <0 0xff>;
67 <0x01000000 0 0x00000000 0x43000000 0 0x00010000>, /* downstream I/O */
68 <0x02000000 0 0x50000000 0x50000000 0 0x10000000>, /* non-prefetchable memory */
69 <0x42000000 0 0x60000000 0x60000000 0 0x10000000>; /* prefetchable memory */
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dversatile-pb.dts11 clear-mask = <0xffffffff>;
16 valid-mask = <0x7fe003ff>;
21 reg = <0x101e6000 0x1000>;
33 reg = <0x101e7000 0x1000>;
46 reg = <0x10001000 0x1000
47 0x41000000 0x10000
48 0x42000000 0x100000>;
49 bus-range = <0 0xff>;
54 ranges = <0x01000000 0 0x00000000 0x43000000 0 0x00010000 /* downstream I/O */
55 0x02000000 0 0x50000000 0x50000000 0 0x10000000 /* non-prefetchable memory */
[all …]
H A Dibm-power9-dual.dtsi5 cfam@0,0 {
6 reg = <0 0>;
9 chip-id = <0>;
13 reg = <0x1000 0x400>;
18 reg = <0x1800 0x400>;
20 #size-cells = <0>;
22 cfam0_i2c0: i2c-bus@0 {
23 reg = <0>;
85 reg = <0x2400 0x400>;
87 #size-cells = <0>;
[all …]
/OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/
H A Dmpc7448hpc2.dts29 #size-cells =<0>;
31 PowerPC,7448@0 {
33 reg = <0x0>;
36 d-cache-size = <0x8000>; // L1, 32K bytes
37 i-cache-size = <0x8000>; // L1, 32K bytes
38 timebase-frequency = <0>; // 33 MHz, from uboot
39 clock-frequency = <0>; // From U-Boot
40 bus-frequency = <0>; // From U-Boot
46 reg = <0x0 0x20000000 // DDR2 512M at 0
54 ranges = <0x0 0xc0000000 0x10000>;
[all …]
H A Dholly.dts23 #size-cells =<0>;
24 PowerPC,750CL@0 {
26 reg = <0x00000000>;
39 memory@0 {
41 reg = <0x00000000 0x20000000>;
49 ranges = <0x00000000 0xc0000000 0x00010000>;
50 reg = <0xc0000000 0x00010000>;
56 interrupts = <0xe 0x2>;
57 reg = <0x00007000 0x00000400>;
62 reg = <0x00006000 0x00000050>;
[all …]
H A Dhotfoot.dts18 dcr-parent = <&{/cpus/cpu@0}>;
29 #size-cells = <0>;
31 cpu@0 {
34 reg = <0x00000000>;
35 clock-frequency = <0>; /* Filled in by zImage */
36 timebase-frequency = <0>; /* Filled in by zImage */
37 i-cache-line-size = <0x20>;
38 d-cache-line-size = <0x20>;
39 i-cache-size = <0x4000>;
40 d-cache-size = <0x4000>;
[all …]
/OK3568_Linux_fs/kernel/drivers/bus/
H A Domap_l3_smx.h14 #define L3_COMPONENT 0x000
15 #define L3_CORE 0x018
16 #define L3_AGENT_CONTROL 0x020
17 #define L3_AGENT_STATUS 0x028
18 #define L3_ERROR_LOG 0x058
23 #define L3_ERROR_LOG_ADDR 0x060
26 #define L3_SI_CONTROL 0x020
27 #define L3_SI_FLAG_STATUS_0 0x510
31 #define L3_STATUS_0_MPUIA_BRST (shift << 0)
95 #define L3_SI_FLAG_STATUS_1 0x530
[all …]
/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/clock/
H A Drockchip,rk3399-dmc.txt22 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
25 reg = <0x0 0xffa80000 0x0 0x0800
26 0x0 0xffa80800 0x0 0x1800
27 0x0 0xffa82000 0x0 0x2000
28 0x0 0xffa84000 0x0 0x1000
29 0x0 0xffa88000 0x0 0x0800
30 0x0 0xffa88800 0x0 0x1800
31 0x0 0xffa8a000 0x0 0x2000
32 0x0 0xffa8c000 0x0 0x1000>;
37 0x2
[all …]
/OK3568_Linux_fs/kernel/include/linux/mfd/wm831x/
H A Dregulator.h14 * R16462 (0x404E) - Current Sink 1
16 #define WM831X_CS1_ENA 0x8000 /* CS1_ENA */
17 #define WM831X_CS1_ENA_MASK 0x8000 /* CS1_ENA */
20 #define WM831X_CS1_DRIVE 0x4000 /* CS1_DRIVE */
21 #define WM831X_CS1_DRIVE_MASK 0x4000 /* CS1_DRIVE */
24 #define WM831X_CS1_SLPENA 0x1000 /* CS1_SLPENA */
25 #define WM831X_CS1_SLPENA_MASK 0x1000 /* CS1_SLPENA */
28 #define WM831X_CS1_OFF_RAMP_MASK 0x0C00 /* CS1_OFF_RAMP - [11:10] */
31 #define WM831X_CS1_ON_RAMP_MASK 0x0300 /* CS1_ON_RAMP - [9:8] */
34 #define WM831X_CS1_ISEL_MASK 0x003F /* CS1_ISEL - [5:0] */
[all …]
/OK3568_Linux_fs/kernel/arch/xtensa/boot/dts/
H A Dvirt.dts14 memory@0 {
16 reg = <0x00000000 0x80000000>;
21 #size-cells = <0>;
22 cpu@0 {
24 reg = <0>;
31 #clock-cells = <0>;
40 * two cells: second cell == 0: internal irq number
43 #address-cells = <0>;
53 #interrupt-cells = <0x1>;
55 bus-range = <0x0 0x3e>;
[all …]
/OK3568_Linux_fs/kernel/arch/mips/boot/dts/loongson/
H A Dloongson64v_4core_virtio.dts12 #address-cells = <0>;
22 ranges = <0 0x1fe00000 0 0x1fe00000 0x100000
23 0 0x3ff00000 0 0x3ff00000 0x100000
24 0xefd 0xfb000000 0xefd 0xfb000000 0x10000000>;
28 reg = <0 0x3ff01400 0x64>;
37 loongson,parent_int_map = <0x00000001>, /* int0 */
38 <0xfffffffe>, /* int1 */
39 <0x00000000>, /* int2 */
40 <0x00000000>; /* int3 */
46 reg = <0 0x1fe001e0 0x8>;
[all …]
/OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/
H A Dmpc8540ads.dts29 #size-cells = <0>;
31 PowerPC,8540@0 {
33 reg = <0x0>;
36 d-cache-size = <0x8000>; // L1, 32K
37 i-cache-size = <0x8000>; // L1, 32K
38 timebase-frequency = <0>; // 33 MHz, from uboot
39 bus-frequency = <0>; // 166 MHz
40 clock-frequency = <0>; // 825 MHz, from uboot
47 reg = <0x0 0x8000000>; // 128M at 0x0
55 ranges = <0x0 0xe0000000 0x100000>;
[all …]
H A Dmpc8560ads.dts30 #size-cells = <0>;
32 PowerPC,8560@0 {
34 reg = <0x0>;
37 d-cache-size = <0x8000>; // L1, 32K
38 i-cache-size = <0x8000>; // L1, 32K
47 reg = <0x0 0x10000000>;
55 ranges = <0x0 0xe0000000 0x100000>;
58 ecm-law@0 {
60 reg = <0x0 0x1000>;
66 reg = <0x1000 0x1000>;
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/phy/
H A Dphy-mtk-tphy.txt5 controllers on MediaTek SoCs, such as, USB2.0, USB3.0, PCIe, and SATA.
23 the child's base address to 0, the physical address
72 reg = <0 0x11290000 0 0x800>;
78 reg = <0 0x11290800 0 0x100>;
85 reg = <0 0x11290800 0 0x700>;
92 reg = <0 0x11291000 0 0x100>;
113 phy-names = "usb2-0", "usb3-0";
122 shared 0x0000 SPLLC
123 0x0100 FMREG
124 u2 port0 0x0800 U2PHY_COM
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/realtek/
H A Drtd129x.dtsi8 /memreserve/ 0x0000000000000000 0x000000000001f000;
9 /memreserve/ 0x000000000001f000 0x00000000000e1000;
10 /memreserve/ 0x0000000001b00000 0x00000000004be000;
26 reg = <0x1f000 0x1000>;
30 reg = <0x1ffe000 0x4000>;
34 reg = <0x10100000 0xf00000>;
47 #clock-cells = <0>;
55 ranges = <0x00000000 0x00000000 0x0001f000>, /* boot ROM */
57 <0x80000000 0x80000000 0x80000000>;
61 reg = <0x98000000 0x200000>;
[all …]
/OK3568_Linux_fs/kernel/include/linux/mfd/madera/
H A Dregisters.h14 #define MADERA_SOFTWARE_RESET 0x00
15 #define MADERA_HARDWARE_REVISION 0x01
16 #define MADERA_CTRL_IF_CFG_1 0x08
17 #define MADERA_CTRL_IF_CFG_2 0x09
18 #define MADERA_CTRL_IF_CFG_3 0x0A
19 #define MADERA_WRITE_SEQUENCER_CTRL_0 0x16
20 #define MADERA_WRITE_SEQUENCER_CTRL_1 0x17
21 #define MADERA_WRITE_SEQUENCER_CTRL_2 0x18
22 #define MADERA_TONE_GENERATOR_1 0x20
23 #define MADERA_TONE_GENERATOR_2 0x21
[all …]
/OK3568_Linux_fs/kernel/arch/s390/include/asm/
H A Dlowcore.h21 __u8 pad_0x0000[0x0014-0x0000]; /* 0x0000 */
22 __u32 ipl_parmblock_ptr; /* 0x0014 */
23 __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */
24 __u32 ext_params; /* 0x0080 */
25 __u16 ext_cpu_addr; /* 0x0084 */
26 __u16 ext_int_code; /* 0x0086 */
27 __u16 svc_ilc; /* 0x0088 */
28 __u16 svc_code; /* 0x008a */
29 __u16 pgm_ilc; /* 0x008c */
30 __u16 pgm_code; /* 0x008e */
[all …]
/OK3568_Linux_fs/tools/linux/Firmware_Merger/
H A Dsetting-32M.ini2 #type can suppot 32 partiton types,0x0:undefined 0x1:Vendor 0x2:IDBlock ,bit3:bit31 are available
4 #Gpt_Enable 1:compact gpt,0:normal gpt
5 #Backup_Partition_Enable 0:no backup,1:backup
6 #Loader_Encrypt 0:no encrypt, 1:rc4, default:1
7 #IDB_Boot_Encrypt:0:no encrypt, 1:rc4, default:1
10 Gpt_Enable=0
13 Loader_Encrypt=0
20 PartOffset=0x40
21 PartSize=0x180
27 PartOffset=0x200
[all …]
/OK3568_Linux_fs/u-boot/configs/
H A Dchromebook_samus_defconfig2 CONFIG_SYS_MALLOC_F_LEN=0x1800
46 CONFIG_DEBUG_UART_BASE=0x3f8
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/dma/
H A Dmpc512x-dma.txt24 reg = <0x14000 0x1800>;
25 interrupts = <65 0x8>;
/OK3568_Linux_fs/kernel/arch/arm/mach-omap2/
H A Domap34xx.h17 #define L4_34XX_BASE 0x48000000
18 #define L4_WK_34XX_BASE 0x48300000
19 #define L4_PER_34XX_BASE 0x49000000
20 #define L4_EMU_34XX_BASE 0x54000000
21 #define L3_34XX_BASE 0x68000000
23 #define L4_WK_AM33XX_BASE 0x44C00000
25 #define OMAP3430_32KSYNCT_BASE 0x48320000
26 #define OMAP3430_CM_BASE 0x48004800
27 #define OMAP3430_PRM_BASE 0x48306800
28 #define OMAP343X_SMS_BASE 0x6C000000
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/i2c/
H A Di2c-fsi.txt10 - #size-cells = <0>; : Number of size cells in child nodes.
25 reg = < 0x1800 0x400 >;
27 #size-cells = <0>;
29 i2c-bus@0 {
30 reg = <0>;
/OK3568_Linux_fs/kernel/drivers/staging/fbtft/
H A Dfb_ili9320.c19 #define DEFAULT_GAMMA "07 07 6 0 0 0 5 5 4 0\n" \
20 "07 08 4 7 5 1 2 0 7 7"
25 u8 rxbuf[8] = {0, }; in read_devicecode()
27 write_reg(par, 0x0000); in read_devicecode()
39 fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "Device code: 0x%04X\n", in init_display()
41 if ((devcode != 0x0000) && (devcode != 0x9320)) in init_display()
43 "Unrecognized Device code: 0x%04X (expected 0x9320)\n", in init_display()
50 write_reg(par, 0x00E5, 0x8000); in init_display()
53 write_reg(par, 0x0000, 0x0001); in init_display()
56 write_reg(par, 0x0001, 0x0100); in init_display()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-sunxi/
H A Dboard.c49 .virt = 0x0UL,
50 .phys = 0x0UL,
51 .size = 0x40000000UL,
56 .virt = 0x40000000UL,
57 .phys = 0x40000000UL,
58 .size = 0x80000000UL,
63 0,
102 sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_A33_GPB_UART0); in gpio_init()
130 sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_GPB_UART2); in gpio_init()
141 return 0; in gpio_init()
[all …]
/OK3568_Linux_fs/kernel/drivers/mfd/
H A Dtimberdale.h23 #define TIMB_REV_MAJOR 0x00
24 #define TIMB_REV_MINOR 0x04
25 #define TIMB_HW_CONFIG 0x08
26 #define TIMB_SW_RST 0x40
29 #define TIMB_HW_CONFIG_SPI_8BIT 0x80
31 #define TIMB_HW_VER_MASK 0x0f
32 #define TIMB_HW_VER0 0x00
33 #define TIMB_HW_VER1 0x01
34 #define TIMB_HW_VER2 0x02
35 #define TIMB_HW_VER3 0x03
[all …]

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