1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Device Tree Source for IBM Holly (PPC 750CL with TSI controller) 3*4882a593Smuzhiyun * Copyright 2007, IBM Corporation 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Stephen Winiecki <stevewin@us.ibm.com> 6*4882a593Smuzhiyun * Josh Boyer <jwboyer@linux.vnet.ibm.com> 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public 9*4882a593Smuzhiyun * License version 2. This program is licensed "as is" without 10*4882a593Smuzhiyun * any warranty of any kind, whether express or implied. 11*4882a593Smuzhiyun */ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/dts-v1/; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun/ { 16*4882a593Smuzhiyun model = "41K7339"; 17*4882a593Smuzhiyun compatible = "ibm,holly"; 18*4882a593Smuzhiyun #address-cells = <1>; 19*4882a593Smuzhiyun #size-cells = <1>; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun cpus { 22*4882a593Smuzhiyun #address-cells = <1>; 23*4882a593Smuzhiyun #size-cells =<0>; 24*4882a593Smuzhiyun PowerPC,750CL@0 { 25*4882a593Smuzhiyun device_type = "cpu"; 26*4882a593Smuzhiyun reg = <0x00000000>; 27*4882a593Smuzhiyun d-cache-line-size = <32>; 28*4882a593Smuzhiyun i-cache-line-size = <32>; 29*4882a593Smuzhiyun d-cache-size = <32768>; 30*4882a593Smuzhiyun i-cache-size = <32768>; 31*4882a593Smuzhiyun d-cache-sets = <128>; 32*4882a593Smuzhiyun i-cache-sets = <128>; 33*4882a593Smuzhiyun timebase-frequency = <50000000>; 34*4882a593Smuzhiyun clock-frequency = <600000000>; 35*4882a593Smuzhiyun bus-frequency = <200000000>; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun memory@0 { 40*4882a593Smuzhiyun device_type = "memory"; 41*4882a593Smuzhiyun reg = <0x00000000 0x20000000>; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun tsi109@c0000000 { 45*4882a593Smuzhiyun device_type = "tsi-bridge"; 46*4882a593Smuzhiyun compatible = "tsi109-bridge", "tsi108-bridge"; 47*4882a593Smuzhiyun #address-cells = <1>; 48*4882a593Smuzhiyun #size-cells = <1>; 49*4882a593Smuzhiyun ranges = <0x00000000 0xc0000000 0x00010000>; 50*4882a593Smuzhiyun reg = <0xc0000000 0x00010000>; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun i2c@7000 { 53*4882a593Smuzhiyun device_type = "i2c"; 54*4882a593Smuzhiyun compatible = "tsi109-i2c", "tsi108-i2c"; 55*4882a593Smuzhiyun interrupt-parent = <&MPIC>; 56*4882a593Smuzhiyun interrupts = <0xe 0x2>; 57*4882a593Smuzhiyun reg = <0x00007000 0x00000400>; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun MDIO: mdio@6000 { 61*4882a593Smuzhiyun compatible = "tsi109-mdio", "tsi108-mdio"; 62*4882a593Smuzhiyun reg = <0x00006000 0x00000050>; 63*4882a593Smuzhiyun #address-cells = <1>; 64*4882a593Smuzhiyun #size-cells = <0>; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun PHY1: ethernet-phy@1 { 67*4882a593Smuzhiyun compatible = "bcm5461a"; 68*4882a593Smuzhiyun reg = <0x00000001>; 69*4882a593Smuzhiyun txc-rxc-delay-disable; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun PHY2: ethernet-phy@2 { 73*4882a593Smuzhiyun compatible = "bcm5461a"; 74*4882a593Smuzhiyun reg = <0x00000002>; 75*4882a593Smuzhiyun txc-rxc-delay-disable; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun ethernet@6200 { 80*4882a593Smuzhiyun device_type = "network"; 81*4882a593Smuzhiyun compatible = "tsi109-ethernet", "tsi108-ethernet"; 82*4882a593Smuzhiyun #address-cells = <1>; 83*4882a593Smuzhiyun #size-cells = <0>; 84*4882a593Smuzhiyun reg = <0x00006000 0x00000200>; 85*4882a593Smuzhiyun local-mac-address = [ 00 00 00 00 00 00 ]; 86*4882a593Smuzhiyun interrupt-parent = <&MPIC>; 87*4882a593Smuzhiyun interrupts = <0x10 0x2>; 88*4882a593Smuzhiyun mdio-handle = <&MDIO>; 89*4882a593Smuzhiyun phy-handle = <&PHY1>; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun ethernet@6600 { 93*4882a593Smuzhiyun device_type = "network"; 94*4882a593Smuzhiyun compatible = "tsi109-ethernet", "tsi108-ethernet"; 95*4882a593Smuzhiyun #address-cells = <1>; 96*4882a593Smuzhiyun #size-cells = <0>; 97*4882a593Smuzhiyun reg = <0x00006400 0x00000200>; 98*4882a593Smuzhiyun local-mac-address = [ 00 00 00 00 00 00 ]; 99*4882a593Smuzhiyun interrupt-parent = <&MPIC>; 100*4882a593Smuzhiyun interrupts = <0x11 0x2>; 101*4882a593Smuzhiyun mdio-handle = <&MDIO>; 102*4882a593Smuzhiyun phy-handle = <&PHY2>; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun serial@7808 { 106*4882a593Smuzhiyun device_type = "serial"; 107*4882a593Smuzhiyun compatible = "ns16550"; 108*4882a593Smuzhiyun reg = <0x00007808 0x00000200>; 109*4882a593Smuzhiyun virtual-reg = <0xc0007808>; 110*4882a593Smuzhiyun clock-frequency = <1067212800>; 111*4882a593Smuzhiyun current-speed = <115200>; 112*4882a593Smuzhiyun interrupt-parent = <&MPIC>; 113*4882a593Smuzhiyun interrupts = <0xc 0x2>; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun serial@7c08 { 117*4882a593Smuzhiyun device_type = "serial"; 118*4882a593Smuzhiyun compatible = "ns16550"; 119*4882a593Smuzhiyun reg = <0x00007c08 0x00000200>; 120*4882a593Smuzhiyun virtual-reg = <0xc0007c08>; 121*4882a593Smuzhiyun clock-frequency = <1067212800>; 122*4882a593Smuzhiyun current-speed = <115200>; 123*4882a593Smuzhiyun interrupt-parent = <&MPIC>; 124*4882a593Smuzhiyun interrupts = <0xd 0x2>; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun MPIC: pic@7400 { 128*4882a593Smuzhiyun device_type = "open-pic"; 129*4882a593Smuzhiyun compatible = "chrp,open-pic"; 130*4882a593Smuzhiyun interrupt-controller; 131*4882a593Smuzhiyun #interrupt-cells = <2>; 132*4882a593Smuzhiyun reg = <0x00007400 0x00000400>; 133*4882a593Smuzhiyun big-endian; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun pci@c0001000 { 138*4882a593Smuzhiyun device_type = "pci"; 139*4882a593Smuzhiyun compatible = "tsi109-pci", "tsi108-pci"; 140*4882a593Smuzhiyun #interrupt-cells = <1>; 141*4882a593Smuzhiyun #size-cells = <2>; 142*4882a593Smuzhiyun #address-cells = <3>; 143*4882a593Smuzhiyun reg = <0xc0001000 0x00001000>; 144*4882a593Smuzhiyun bus-range = <0x0 0x0>; 145*4882a593Smuzhiyun /*----------------------------------------------------+ 146*4882a593Smuzhiyun | PCI memory range. 147*4882a593Smuzhiyun | 01 denotes I/O space 148*4882a593Smuzhiyun | 02 denotes 32-bit memory space 149*4882a593Smuzhiyun +----------------------------------------------------*/ 150*4882a593Smuzhiyun ranges = <0x02000000 0x00000000 0x40000000 0x40000000 0x00000000 0x10000000 151*4882a593Smuzhiyun 0x01000000 0x00000000 0x00000000 0x7e000000 0x00000000 0x00010000>; 152*4882a593Smuzhiyun clock-frequency = <133333332>; 153*4882a593Smuzhiyun interrupt-parent = <&MPIC>; 154*4882a593Smuzhiyun interrupts = <0x17 0x2>; 155*4882a593Smuzhiyun interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 156*4882a593Smuzhiyun /*----------------------------------------------------+ 157*4882a593Smuzhiyun | The INTA, INTB, INTC, INTD are shared. 158*4882a593Smuzhiyun +----------------------------------------------------*/ 159*4882a593Smuzhiyun interrupt-map = < 160*4882a593Smuzhiyun 0x800 0x0 0x0 0x1 &RT0 0x24 0x0 161*4882a593Smuzhiyun 0x800 0x0 0x0 0x2 &RT0 0x25 0x0 162*4882a593Smuzhiyun 0x800 0x0 0x0 0x3 &RT0 0x26 0x0 163*4882a593Smuzhiyun 0x800 0x0 0x0 0x4 &RT0 0x27 0x0 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0 166*4882a593Smuzhiyun 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0 167*4882a593Smuzhiyun 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0 168*4882a593Smuzhiyun 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0 171*4882a593Smuzhiyun 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0 172*4882a593Smuzhiyun 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0 173*4882a593Smuzhiyun 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0 176*4882a593Smuzhiyun 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0 177*4882a593Smuzhiyun 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0 178*4882a593Smuzhiyun 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0 179*4882a593Smuzhiyun >; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun RT0: router@1180 { 182*4882a593Smuzhiyun device_type = "pic-router"; 183*4882a593Smuzhiyun interrupt-controller; 184*4882a593Smuzhiyun big-endian; 185*4882a593Smuzhiyun clock-frequency = <0>; 186*4882a593Smuzhiyun #address-cells = <0>; 187*4882a593Smuzhiyun #interrupt-cells = <2>; 188*4882a593Smuzhiyun interrupts = <0x17 0x2>; 189*4882a593Smuzhiyun interrupt-parent = <&MPIC>; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun }; 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun chosen { 194*4882a593Smuzhiyun stdout-path = "/tsi109@c0000000/serial@7808"; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun}; 197