1*4882a593Smuzhiyun* Freescale MPC512x and MPC8308 DMA Controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe DMA controller in Freescale MPC512x and MPC8308 SoCs can move 4*4882a593Smuzhiyunblocks of memory contents between memory and peripherals or 5*4882a593Smuzhiyunfrom memory to memory. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRefer to "Generic DMA Controller and DMA request bindings" in 8*4882a593Smuzhiyunthe dma/dma.txt file for a more detailed description of binding. 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunRequired properties: 11*4882a593Smuzhiyun- compatible: should be "fsl,mpc5121-dma" or "fsl,mpc8308-dma"; 12*4882a593Smuzhiyun- reg: should contain the DMA controller registers location and length; 13*4882a593Smuzhiyun- interrupt for the DMA controller: syntax of interrupt client node 14*4882a593Smuzhiyun is described in interrupt-controller/interrupts.txt file. 15*4882a593Smuzhiyun- #dma-cells: the length of the DMA specifier, must be <1>. 16*4882a593Smuzhiyun Each channel of this DMA controller has a peripheral request line, 17*4882a593Smuzhiyun the assignment is fixed in hardware. This one cell 18*4882a593Smuzhiyun in dmas property of a client device represents the channel number. 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunExample: 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun dma0: dma@14000 { 23*4882a593Smuzhiyun compatible = "fsl,mpc5121-dma"; 24*4882a593Smuzhiyun reg = <0x14000 0x1800>; 25*4882a593Smuzhiyun interrupts = <65 0x8>; 26*4882a593Smuzhiyun #dma-cells = <1>; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593SmuzhiyunDMA clients must use the format described in dma/dma.txt file. 30