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Searched defs:DRAM0_BASE (Results 1 – 22 of 22) sorted by relevance

/optee_os/core/arch/arm/plat-automotive_rd/
H A Dplatform_config.h18 #define DRAM0_BASE UL(0x80000000) macro
42 #define DRAM0_BASE UL(0x80000000) macro
/optee_os/core/arch/arm/plat-rpi3/
H A Dplatform_config.h68 #define DRAM0_BASE 0x00000000 macro
/optee_os/core/arch/arm/plat-rpi5/
H A Dplatform_config.h19 #define DRAM0_BASE 0x00000000 macro
/optee_os/core/arch/arm/plat-qcom/
H A Dplatform_config.h16 #define DRAM0_BASE UL(0x80000000) macro
/optee_os/core/arch/arm/plat-nuvoton/
H A Dplatform_config.h14 #define DRAM0_BASE 0x00000000 macro
/optee_os/core/arch/arm/plat-uniphier/
H A Dplatform_config.h49 #define DRAM0_BASE (CFG_DRAM0_BASE + CFG_DRAM0_RSV_SIZE) macro
/optee_os/core/arch/arm/plat-synquacer/
H A Dplatform_config.h26 #define DRAM0_BASE 0x80000000 macro
/optee_os/core/arch/arm/plat-d02/
H A Dplatform_config.h67 #define DRAM0_BASE 0x00000000 macro
/optee_os/core/arch/arm/plat-corstone1000/
H A Dplatform_config.h20 #define DRAM0_BASE 0x80000000 macro
/optee_os/core/arch/arm/plat-totalcompute/
H A Dplatform_config.h28 #define DRAM0_BASE 0x80000000 macro
/optee_os/core/arch/arm/plat-sprd/
H A Dplatform_config.h51 #define DRAM0_BASE 0x80000000 macro
/optee_os/core/arch/arm/plat-versal2/
H A Dplatform_config.h44 #define DRAM0_BASE 0 macro
/optee_os/core/arch/arm/plat-telechips/tcc805x/
H A Dplatform_config.h45 #define DRAM0_BASE U(0x20000000) macro
/optee_os/core/arch/arm/plat-zynqmp/
H A Dplatform_config.h43 #define DRAM0_BASE 0 macro
/optee_os/core/arch/arm/plat-hikey/
H A Dplatform_config.h107 #define DRAM0_BASE 0x00000000 macro
/optee_os/core/arch/arm/plat-versal/
H A Dplatform_config.h33 #define DRAM0_BASE 0 macro
/optee_os/core/arch/arm/plat-vexpress/
H A Dplatform_config.h100 #define DRAM0_BASE 0x80000000 macro
121 #define DRAM0_BASE 0x80000000 macro
/optee_os/core/arch/arm/plat-poplar/
H A Dplatform_config.h99 #define DRAM0_BASE 0x00000000 macro
/optee_os/core/arch/arm/plat-stm/
H A Dplatform_config.h202 #define DRAM0_BASE (CFG_DDR_START + CFG_STM_RSV_DRAM_STARTBYTES) macro
/optee_os/core/arch/arm/plat-ti/
H A Dplatform_config.h9 #define DRAM0_BASE 0x80000000 macro
/optee_os/core/arch/arm/plat-k3/
H A Dplatform_config.h18 #define DRAM0_BASE 0x80000000 macro
/optee_os/core/arch/arm/plat-mediatek/
H A Dplatform_config.h35 #define DRAM0_BASE 0x40000000 macro