plat-stm: fix MIN/MAX macro issue in platform_config.h

Use MIN_UNSAFE/MAX_UNSAFE macros as MAX/MIN macros fail to build
from in current platform_config.h imaplement with the error trace
below:

In f

plat-stm: fix MIN/MAX macro issue in platform_config.h

Use MIN_UNSAFE/MAX_UNSAFE macros as MAX/MIN macros fail to build
from in current platform_config.h imaplement with the error trace
below:

In file included from core/arch/arm/include/arm.h:8:0,
from core/arch/arm/include/kernel/thread.h:11,
from core/arch/arm/kernel/asm-defines.c:7:
lib/libutils/ext/include/util.h:24:16: error: missing binary operator before token "("
(__extension__({ __typeof__(a) _a = (a); \
^
core/arch/arm/plat-stm/./platform_config.h:190:25: note: in expansion of macro ‘MAX’
#define STM_SECDDR_END MAX(TZSRAM_BASE + TZSRAM_SIZE, \
^~~
core/arch/arm/plat-stm/./platform_config.h:204:6: note: in expansion of macro ‘STM_SECDDR_END’
#if (STM_SECDDR_END < 0x80000000ULL)
^~~~~~~~~~~~~~
make: *** [out/core/include/generated/.asm-defines.s] Error 1

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm: support generic RAM layout

Legacy stm platforms build env set CFG_DDR_TEETZ_RESERVED_START/_SIZE
and CFG_CORE_TZSRAM_EMUL_START/_SIZE. This change converts these into
CFG_TZxRAM_START/_SIZ

plat-stm: support generic RAM layout

Legacy stm platforms build env set CFG_DDR_TEETZ_RESERVED_START/_SIZE
and CFG_CORE_TZSRAM_EMUL_START/_SIZE. This change converts these into
CFG_TZxRAM_START/_SIZE and CFG_SHMEM_START/_SIZE from the platform
conf.mk.

Introduce stm platform specific configuration directive
CFG_STM_RSV_DRAM_STARTBYTES to carve out reserved bottom DDR from
REE main memory. Remove CFG_DDR_SECURE_BASE which is no more required.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (b2120, b2260)

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plat-stm: move some CFG_'s from platform_config.h to conf.mk

STM platform can be configured from CFG_DDR_START/_SIZE,
CFG_CORE_TZSRAM_EMUL_START and CFG_DDR_TEETZ_RESERVED_START/_SIZE.

Signed-off-b

plat-stm: move some CFG_'s from platform_config.h to conf.mk

STM platform can be configured from CFG_DDR_START/_SIZE,
CFG_CORE_TZSRAM_EMUL_START and CFG_DDR_TEETZ_RESERVED_START/_SIZE.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: remove CFG_ prefix from CFG_TEE_LOAD_ADDR

TEE_LOAD_ADDR is now local to source files. It is set to CFG_TEE_LOAD_ADDR
value if defined only for the platforms that previously allowed build
to ov

core: remove CFG_ prefix from CFG_TEE_LOAD_ADDR

TEE_LOAD_ADDR is now local to source files. It is set to CFG_TEE_LOAD_ADDR
value if defined only for the platforms that previously allowed build
to override the value. Few platform did hardcod CFG_TEE_LOAD_ADDR, this
change preserve these configurations.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: remove CFG_ prefix from CFG_SHMEM_START/_SIZE

Almost platform currently define these directives from within the
source code, through platform_config.h. These values do not need to
be configura

core: remove CFG_ prefix from CFG_SHMEM_START/_SIZE

Almost platform currently define these directives from within the
source code, through platform_config.h. These values do not need to
be configuration directive with the CFG_ prefix.

This change renames the CFG_SHMEM_xxx into TEE_SHMEM_xxx so that they
do not mess with the platform configuration directives. Yet, the old
CFG_SHMEM_START/SIZE directives can still be used by platform_config.h
to set TEE_SHMEM_START/SIZE if the platform supports it (i.e plat-stm).

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: remove CFG_ prefix from TA_RAM_START/TA_RAM_SIZE

Almost platform currently define these directives from within the
source code, through platform_config.h. These values do not need to
be config

core: remove CFG_ prefix from TA_RAM_START/TA_RAM_SIZE

Almost platform currently define these directives from within the
source code, through platform_config.h. These values do not need to
be configuration directive with the CFG_ prefix.

This change renames these macros so that they do not mess with the
platform configuration directives.

Old macro label New macro label
CFG_TA_RAM_START TA_RAM_START
CFG_TA_RAM_SIZE TA_RAM_SIZE

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: remove CFG_ prefix from TEE_RAM_START/VA_SIZE/PH_SIZE

Almost platform currently define these directives from within the
source code, through platform_config.h. These values do not need to
be c

core: remove CFG_ prefix from TEE_RAM_START/VA_SIZE/PH_SIZE

Almost platform currently define these directives from within the
source code, through platform_config.h. These values do not need to
be configuration directive with the CFG_ prefix.

This change renames these macros so that they do not mess with the
platform configuration directives.

Old macro label New macro label
CFG_TEE_RAM_START TEE_RAM_START
CFG_TEE_RAM_VA_SIZE TEE_RAM_VA_SIZE
CFG_TEE_RAM_PH_SIZE TEE_RAM_PH_SIZE

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: split SDP memory CFG_ and non-CFG_ configuration directives

This change aim at removing definition of CFG_ directive (here related
to SDP) from the platform_config.h files.

CFG_TEE_SDP_MEM_BA

core: split SDP memory CFG_ and non-CFG_ configuration directives

This change aim at removing definition of CFG_ directive (here related
to SDP) from the platform_config.h files.

CFG_TEE_SDP_MEM_BASE/_SIZE is a generic configuration directive to
register a SDP memory.

Some platforms define a SDP test memory when SDP is enable. This SDP
memory is located at the end of the TA_RAM. Introduce platform settings
TEE_SDP_TEST_MEM_BASE/_SIZE to register a SDP test buffer, independently
from the generic CFG_TEE_SDP_MEM_BASE/_SIZE.

Platforms marvel, stm, ti and vexpress updated.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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Remove 'All rights reserved' from Linaro files

The text 'All rights reserved' is useless [1]. The Free Software
Foundation's REUSE Initiative best practices document [2] does not
contain these words

Remove 'All rights reserved' from Linaro files

The text 'All rights reserved' is useless [1]. The Free Software
Foundation's REUSE Initiative best practices document [2] does not
contain these words. Therefore, we can safely remove the text from the
files that are owned by Linaro.

Generated by:
spdxify.py --linaro-only --strip-arr optee_os/

Link: [1] https://en.wikipedia.org/wiki/All_rights_reserved
Link: [2] https://reuse.software/practices/
Link: [3] https://github.com/jforissier/misc/blob/f7b56c8/spdxify.py
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>

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Remove license notice from Linaro files

Now that we have added SPDX identifiers, we can safely remove the
verbose license text from the files that are owned by Linaro.

Generated by [1]:
spdxify.p

Remove license notice from Linaro files

Now that we have added SPDX identifiers, we can safely remove the
verbose license text from the files that are owned by Linaro.

Generated by [1]:
spdxify.py --linaro-only --strip-license-text optee_os/

Link: [1] https://github.com/jforissier/misc/blob/f7b56c8/spdxify.py
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>

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Add SPDX license identifiers

Adds one SPDX-License-Identifier line [1] to each source files that
contains license text.

Generated by [2]:
spdxify.py --add-spdx optee_os/

The scancode tool [3] wa

Add SPDX license identifiers

Adds one SPDX-License-Identifier line [1] to each source files that
contains license text.

Generated by [2]:
spdxify.py --add-spdx optee_os/

The scancode tool [3] was used to double check the license matching
code in the Python script. All the licenses detected by scancode are
either detected by spdxify.py, or have no SPDX identifier, or are false
matches.

Link: [1] https://spdx.org/licenses/
Link: [2] https://github.com/jforissier/misc/blob/f7b56c8/spdxify.py
Link: [3] https://github.com/nexB/scancode-toolkit
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>

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plat-stm: support registered shm buffers

CFG_DDR_SECURE_BASE/_SIZE can be used to define the DDR range reserved
to secure side. This can be larger than the TEETZ reserved memory.
If CFG_DDR_SECURE_B

plat-stm: support registered shm buffers

CFG_DDR_SECURE_BASE/_SIZE can be used to define the DDR range reserved
to secure side. This can be larger than the TEETZ reserved memory.
If CFG_DDR_SECURE_BASE/_SIZE is defined, plat-stm registers the
non-secure external memory to support dynamic shm registering.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: deprecate platform stm-orly2

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

core: fix plat-stm iomem mapping

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

plat-stm: add a default test support for SDP

If SDP is enabled and no SDP memory is defined, a default SDP memory
area of 3Mbyte is defined between the TA_RAM and the NS_SHM. This
change allows to e

plat-stm: add a default test support for SDP

If SDP is enabled and no SDP memory is defined, a default SDP memory
area of 3Mbyte is defined between the TA_RAM and the NS_SHM. This
change allows to ease test of the SDP feature on the ST platforms.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-stm: define default configuration when pager is enable

plat-stm can optionally build with CFG_WITH_PAGER=y. Pager RAM is
defined from CFG_CORE_TZSRAM_EMUL_START and CFG_CORE_TZSRAM_EMUL_SIZE.

plat-stm: define default configuration when pager is enable

plat-stm can optionally build with CFG_WITH_PAGER=y. Pager RAM is
defined from CFG_CORE_TZSRAM_EMUL_START and CFG_CORE_TZSRAM_EMUL_SIZE.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (b2260)

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plat-stm: fix flavor 'cannes'

Fixes: 8cd89706f19c ("plat-stm: beautify platform config")

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@l

plat-stm: fix flavor 'cannes'

Fixes: 8cd89706f19c ("plat-stm: beautify platform config")

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-stm: beautify platform config

Move platform config to platfom_config.h.
Remove local system_config.mk.

Add generic SCU SAC/NSAC registers bit fields definition.
Add generic PL310 control regis

plat-stm: beautify platform config

Move platform config to platfom_config.h.
Remove local system_config.mk.

Add generic SCU SAC/NSAC registers bit fields definition.
Add generic PL310 control register enable bit fields definition.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-stm: beautify source code

Move plat_cpu_reset_late() to C-source.
Move arm_cl2_config() to C-source.
Beautify main.c and rng_support.c.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro

plat-stm: beautify source code

Move plat_cpu_reset_late() to C-source.
Move arm_cl2_config() to C-source.
Beautify main.c and rng_support.c.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-stm: introduce b2260 (96boards/cannes)

Flavored 'b2260'.
Default no GDB boot, lock pl310, specific DDR size and UART instance.

Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (b2120/

plat-stm: introduce b2260 (96boards/cannes)

Flavored 'b2260'.
Default no GDB boot, lock pl310, specific DDR size and UART instance.

Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (b2120/b2260)
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm: fix platform

fix PL310 iomem mapped unsecure.
fix rng against nonflat mapping.

Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm-b2120)
Signed-off-by: Etienne Carriere <etien

plat-stm: fix platform

fix PL310 iomem mapped unsecure.
fix rng against nonflat mapping.

Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm-b2120)
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: Add default CFG_CORE_HEAP_SIZE

Adds a CFG_CORE_HEAP_SIZE replacing the defined HEAP_SIZE in each
platform_config.h. Default value is defined in mk/config.mk as 64 kB.
This is larger than most

core: Add default CFG_CORE_HEAP_SIZE

Adds a CFG_CORE_HEAP_SIZE replacing the defined HEAP_SIZE in each
platform_config.h. Default value is defined in mk/config.mk as 64 kB.
This is larger than most of the previous values at 24 kB or just above.

Platforms with a previous heap size defined larger than 64 kB overrides
the mk/config.mk setting with a $(platform-dir)/conf.mk setting using the
previous value.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (Hikey pager)
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU v7 pager)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (FVP Aarch32 pager)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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Simplify platform testing macros

Update the main Makefile so that PLATFORM_$(PLATFORM) and
PLATFORM_FLAVOR_$(PLATFORM_FLAVOR) are set to 'y', and add these
variables to the export list for the gener

Simplify platform testing macros

Update the main Makefile so that PLATFORM_$(PLATFORM) and
PLATFORM_FLAVOR_$(PLATFORM_FLAVOR) are set to 'y', and add these
variables to the export list for the generation of conf.h.

As a result, the definition of numerical flavor identifiers in the
multiple platform_config.h files is not needed anymore, and we can also
get rid of the PLATFORM_FLAVOR_IS() test macro. Instead, replace all
occurrences of '#if PLATFORM_FLAVOR_IS(foo)' with
'#if defined(PLATFORM_FLAVOR_foo)'.

This makes it possible to test the platform and not only the flavor in
any source file, so drop the manual definition of PLATFORM_hikey.

Finally, remove the definitions of platform_$(PLATFORM) and
platform_flavor_$(PLATFORM_FLAVOR) from core/core.mk since they are not
used.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>

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core: arm: mm: introduce initial value for va

To some SoCs, we can not directly assign physical address
to virtual address. If use LPAE, it is ok to use "va = pa", but
to V7 mmu with LPAE disabled,

core: arm: mm: introduce initial value for va

To some SoCs, we can not directly assign physical address
to virtual address. If use LPAE, it is ok to use "va = pa", but
to V7 mmu with LPAE disabled, va may conflict with user ta and optee
os kernel space address(<= 64M).

1. Introuce a few macros DEVICEx_VA_ADDRESS.
2. Since we have used defined va, we can not directly panic() with
mm->va initialized. If va is not page or section aligned, then panic,
otherwise, all is ok.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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stm,vexpress: increase shared memory size from 1 to 2 MiB

This is needed to run the latest "generic driver" configuration.
When the shared memory pool is 1 MiB, xtest 7633 fails with a TA panic
due

stm,vexpress: increase shared memory size from 1 to 2 MiB

This is needed to run the latest "generic driver" configuration.
When the shared memory pool is 1 MiB, xtest 7633 fails with a TA panic
due to memory allocation error. This commit increases the size of the
shared memory pool so that the test will pass.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

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