style(intel): align the sequence in header file

This patch is to align the sequence of function in header file.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I9658aef78b06b744c6

style(intel): align the sequence in header file

This patch is to align the sequence of function in header file.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I9658aef78b06b744c6c14f95b2821daf5dbb0082

show more ...

fix(intel): remove redundant NOC header declarations

This patch is to remove redundant NOC declarations in
system manager header file. The NOC headers are shareable
across both Stratix 10 and Agilex

fix(intel): remove redundant NOC header declarations

This patch is to remove redundant NOC declarations in
system manager header file. The NOC headers are shareable
across both Stratix 10 and Agilex platforms.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I40ff55eb1d8fe280db1d099d5d1a3c2bf4b4b459

show more ...

feat(versal): add SMCCC call TF_A_PM_REGISTER_SGI

This call is used to register and reset SGI interrupt.
Before this functionality was performed using IOCTL_REGISTER_SGI
pm_ioctl EEMI call. It's not

feat(versal): add SMCCC call TF_A_PM_REGISTER_SGI

This call is used to register and reset SGI interrupt.
Before this functionality was performed using IOCTL_REGISTER_SGI
pm_ioctl EEMI call. It's not correct use of PM_IOCTL as it is
not EEMI functionality. Instead this new SMCCC call will be
handled by TF-A specific handler.

Change-Id: If2408af38b889d29a5c584e8eec5f1672eab4fb5
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>

show more ...

feat(versal): add support to reset SGI

Add "reset" parameter in pm_register_sgi() to reset
SGI number. This will be required if OS wants to reset
SGI number to default state. Caller can reset param

feat(versal): add support to reset SGI

Add "reset" parameter in pm_register_sgi() to reset
SGI number. This will be required if OS wants to reset
SGI number to default state. Caller can reset param to
1 to reset SGI in ATF.

Change-Id: If485ff275df884f74eb67671cac7fa953458afe9
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>

show more ...

feat(n1sdp): add support for nt_fw_config

This patch adds support to load nt_fw_config with the information from
plat_info sds structure which is then passed from BL2 to BL33.

Signed-off-by: sahil

feat(n1sdp): add support for nt_fw_config

This patch adds support to load nt_fw_config with the information from
plat_info sds structure which is then passed from BL2 to BL33.

Signed-off-by: sahil <sahil@arm.com>
Change-Id: I2fcf13b7bf5ab042ef830157fd9cceedbdca617a

show more ...

feat(n1sdp): enable trusted board boot on n1sdp

Move from RESET_TO_BL31 boot to a TBBR style boot on N1sdp.

Signed-off-by: sahil <sahil@arm.com>
Change-Id: I153ccb43a4a013830973c7a183825d62b372c65e

Merge changes Ie9451e35,I1815deeb,If277b2b3,Ie2ceaf24,I7996d505, ... into integration

* changes:
fix(intel): add flash dcache after return response for INTEL_SIP_SMC_MBOX_SEND_CMD
fix(intel): ex

Merge changes Ie9451e35,I1815deeb,If277b2b3,Ie2ceaf24,I7996d505, ... into integration

* changes:
fix(intel): add flash dcache after return response for INTEL_SIP_SMC_MBOX_SEND_CMD
fix(intel): extending to support large file size for SHA2/HMAC get digest and verifying
fix(intel): extending to support large file size for SHA-2 ECDSA data signing and signature verifying
fix(intel): extending to support large file size for AES encryption and decryption
feat(intel): support version 2 SiP SVC SMC function ID for mailbox commands
feat(intel): support version 2 SiP SVC SMC function ID for non-mailbox commands
fix(intel): update certificate mask for FPGA Attestation
feat(intel): update to support maximum response data size
feat(intel): support ECDSA HASH Verification
feat(intel): support ECDSA HASH Signing
feat(intel): support ECDH request
feat(intel): support ECDSA SHA-2 Data Signature Verification
feat(intel): support ECDSA SHA-2 Data Signing
feat(intel): support ECDSA Get Public Key
feat(intel): support session based SDOS encrypt and decrypt
feat(intel): support AES Crypt Service
feat(intel): support HMAC SHA-2 MAC verify request
feat(intel): support SHA-2 hash digest generation on a blob
feat(intel): support extended random number generation
feat(intel): support crypto service key operation
feat(intel): support crypto service session
feat(intel): extend attestation service to Agilex family
fix(intel): flush dcache before sending certificate to mailbox
fix(intel): introduce a generic response error code
fix(intel): allow non-secure access to FPGA Crypto Services (FCS)
feat(intel): single certificate feature enablement
feat(intel): initial commit for attestation service
fix(intel): update encryption and decryption command logic

show more ...

Merge "fix(zynqmp): define and enable ARM_XLAT_TABLES_LIB_V1" into integration

feat(sgi): enable fpregs context save and restore

This is required to prevent Nwd context corruption during StMM
execution.

Standalone MM uses OpenSSL for secure boot, which uses FP registers for
f

feat(sgi): enable fpregs context save and restore

This is required to prevent Nwd context corruption during StMM
execution.

Standalone MM uses OpenSSL for secure boot, which uses FP registers for
floating point calculations.

Signed-off-by: Nishant Sharma <nishant.sharma@arm.com>
Change-Id: I6ed11d4fa5d64c3089a24b66fd048a841c480792

show more ...

feat(plat/arm/fvp): enable RSS backend based measured boot

Enable the RSS backend based measured boot feature.
In the absence of RSS the mocked version of PSA APIs
are used. They always return with

feat(plat/arm/fvp): enable RSS backend based measured boot

Enable the RSS backend based measured boot feature.
In the absence of RSS the mocked version of PSA APIs
are used. They always return with success and hard-code data.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I7543e9033a7a21f1b836d911d8d9498c6e09b956

show more ...

fix(intel): add flash dcache after return response for INTEL_SIP_SMC_MBOX_SEND_CMD

This patch is to add flash dcache after return
response in INTEL_SIP_SMC_MBOX_SEND_CMD.

Signed-off-by: Sieu Mun Ta

fix(intel): add flash dcache after return response for INTEL_SIP_SMC_MBOX_SEND_CMD

This patch is to add flash dcache after return
response in INTEL_SIP_SMC_MBOX_SEND_CMD.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ie9451e352f2b7c41ebb44a1f6be9da35f4600fb9

show more ...

fix(intel): extending to support large file size for SHA2/HMAC get digest and verifying

This patch is to extend to support large file size
for SHA2/HMAC get digest and verifying. The large
file will

fix(intel): extending to support large file size for SHA2/HMAC get digest and verifying

This patch is to extend to support large file size
for SHA2/HMAC get digest and verifying. The large
file will be split into smaller chunk and send using
initialize, update and finalize staging method.

Signed-off-by: Yuslaimi, Alif Zakuan <alif.zakuan.yuslaimi@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I1815deeb61287b32c3e77c5ac1b547b79ef12674

show more ...

fix(intel): extending to support large file size for SHA-2 ECDSA data signing and signature verifying

This patch is to extend to support large file size
for SHA-2 ECDSA data signing and signature ve

fix(intel): extending to support large file size for SHA-2 ECDSA data signing and signature verifying

This patch is to extend to support large file size
for SHA-2 ECDSA data signing and signature verifying.
The large file will be split into smaller chunk and
send using initialize, update and finalize staging method.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: If277b2b375a404fe44b0858006c8ba6316a5ce23

show more ...

fix(intel): extending to support large file size for AES encryption and decryption

This patch is to extend to support large file size
for AES encryption and decryption. The large file
will be split

fix(intel): extending to support large file size for AES encryption and decryption

This patch is to extend to support large file size
for AES encryption and decryption. The large file
will be split into smaller chunk and send using
initialize, update and finalize staging method.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ie2ceaf247e0d7082aad84faf399fbd18d129c36a

show more ...

feat(intel): support version 2 SiP SVC SMC function ID for mailbox commands

A separated SMC function ID of mailbox command
is introduced for the new format of SMC protocol.

The new format of SMC pr

feat(intel): support version 2 SiP SVC SMC function ID for mailbox commands

A separated SMC function ID of mailbox command
is introduced for the new format of SMC protocol.

The new format of SMC procotol will be started
using by Zephyr.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I7996d5054f76c139b5ad55451c373f5669a1017f

show more ...

feat(intel): support version 2 SiP SVC SMC function ID for non-mailbox commands

A separated SMC function ID of non-mailbox command
is introduced for the new format of SMC protocol.

The new format o

feat(intel): support version 2 SiP SVC SMC function ID for non-mailbox commands

A separated SMC function ID of non-mailbox command
is introduced for the new format of SMC protocol.

The new format of SMC procotol will be started
using by Zephyr.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I01cff2739364b1bda2ebb9507ddbcef6095f5d29

show more ...

fix(intel): update certificate mask for FPGA Attestation

Update the certificate mask to 0xff to cover all certificate
in Agilex family.

Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-o

fix(intel): update certificate mask for FPGA Attestation

Update the certificate mask to 0xff to cover all certificate
in Agilex family.

Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Id40bc3aa4b3e4f7568a58581bbb03a75b0f20a0b

show more ...

feat(intel): update to support maximum response data size

Update to support maximum (4092 bytes) response data size.
And, clean up the intel_smc_service_completed function to
directly write the resp

feat(intel): update to support maximum response data size

Update to support maximum (4092 bytes) response data size.
And, clean up the intel_smc_service_completed function to
directly write the response data to addr to avoid additional
copy.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I0a230e73c563d22e6999ad3473587b07382dacfe

show more ...

feat(intel): support ECDSA HASH Verification

Supporting the command to send digital signature verification
request on a data blob. This include ECC algorithm such as
NISP P-256, NISP P-384, Brainpoo

feat(intel): support ECDSA HASH Verification

Supporting the command to send digital signature verification
request on a data blob. This include ECC algorithm such as
NISP P-256, NISP P-384, Brainpool 256 and, Branpool 384

Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ic86f531bfe7cc7606699f2b064ac677aaf806a76

show more ...

feat(intel): support ECDSA HASH Signing

Supporting the command to send digital signature signing
request on a data blob. This include ECC algorithm such as
NISP P-256, NISP P-384, Brainpool 256 and,

feat(intel): support ECDSA HASH Signing

Supporting the command to send digital signature signing
request on a data blob. This include ECC algorithm such as
NISP P-256, NISP P-384, Brainpool 256 and, Branpool 384

Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I12cf0f1ceaf07c33a110eae398d3ad82a9b13d38

show more ...

feat(intel): support ECDH request

This command sends the request on generating a share secret on
Diffie-Hellman key exchange.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-

feat(intel): support ECDH request

This command sends the request on generating a share secret on
Diffie-Hellman key exchange.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ic7c8470cf036ea8c17bf87401f49936950b3e1d6

show more ...

feat(intel): support ECDSA SHA-2 Data Signature Verification

This command support ECC based signature verification on a blob.
Supported ECC algorithm are NISP P-256, NISP P-384, Brainpool 256
and Br

feat(intel): support ECDSA SHA-2 Data Signature Verification

This command support ECC based signature verification on a blob.
Supported ECC algorithm are NISP P-256, NISP P-384, Brainpool 256
and Brainpool 384.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I7f43d2a69bbe6693ec1bb90f32b817cf00f9f5ae

show more ...

feat(intel): support ECDSA SHA-2 Data Signing

This command support ECC based signing on a blob. Supported ECC algorithm
are NISP P-256, NISP P-384, Brainpool 256 and Brainpool 384.

Signed-off-by: S

feat(intel): support ECDSA SHA-2 Data Signing

This command support ECC based signing on a blob. Supported ECC algorithm
are NISP P-256, NISP P-384, Brainpool 256 and Brainpool 384.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I82f95ddafa6b62f8cd882fce9a3e63e469c85067

show more ...

feat(intel): support ECDSA Get Public Key

To support the ECDSA feature and send the command
as a request to get the public key

Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Si

feat(intel): support ECDSA Get Public Key

To support the ECDSA feature and send the command
as a request to get the public key

Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I9d7bb5b6ab8ef7d4f3ceb21ff0068baf3175a1ac

show more ...

feat(intel): support session based SDOS encrypt and decrypt

Extends existing Secure Data Object Service (SDOS) encryption and
decryption mailbox command to include session id and context id. The
new

feat(intel): support session based SDOS encrypt and decrypt

Extends existing Secure Data Object Service (SDOS) encryption and
decryption mailbox command to include session id and context id. The
new format requires an opened crypto service session.

A separated SMC function ID is introduced for the new format and it is
only supported by Agilex.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I2627750e8337c1af66217e9cb45981a9e06e7d19

show more ...