1 /* 2 * Copyright (c) 2020-2022, Intel Corporation. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef SOCFPGA_FCS_H 8 #define SOCFPGA_FCS_H 9 10 /* FCS Definitions */ 11 12 #define FCS_RANDOM_WORD_SIZE 8U 13 #define FCS_PROV_DATA_WORD_SIZE 44U 14 #define FCS_SHA384_WORD_SIZE 12U 15 16 #define FCS_RANDOM_BYTE_SIZE (FCS_RANDOM_WORD_SIZE * 4U) 17 #define FCS_RANDOM_EXT_MAX_WORD_SIZE 1020U 18 #define FCS_PROV_DATA_BYTE_SIZE (FCS_PROV_DATA_WORD_SIZE * 4U) 19 #define FCS_SHA384_BYTE_SIZE (FCS_SHA384_WORD_SIZE * 4U) 20 21 #define FCS_RANDOM_EXT_OFFSET 3 22 23 #define FCS_MODE_DECRYPT 0x0 24 #define FCS_MODE_ENCRYPT 0x1 25 #define FCS_ENCRYPTION_DATA_0 0x10100 26 #define FCS_DECRYPTION_DATA_0 0x10102 27 #define FCS_OWNER_ID_OFFSET 0xC 28 #define FCS_CRYPTION_CRYPTO_HEADER 0x07000000 29 #define FCS_CRYPTION_RESP_WORD_SIZE 4U 30 #define FCS_CRYPTION_RESP_SIZE_OFFSET 3U 31 32 #define PSGSIGMA_TEARDOWN_MAGIC 0xB852E2A4 33 #define PSGSIGMA_SESSION_ID_ONE 0x1 34 #define PSGSIGMA_UNKNOWN_SESSION 0xFFFFFFFF 35 36 #define RESERVED_AS_ZERO 0x0 37 /* FCS Single cert */ 38 39 #define FCS_BIG_CNTR_SEL 0x1 40 41 #define FCS_SVN_CNTR_0_SEL 0x2 42 #define FCS_SVN_CNTR_1_SEL 0x3 43 #define FCS_SVN_CNTR_2_SEL 0x4 44 #define FCS_SVN_CNTR_3_SEL 0x5 45 46 #define FCS_BIG_CNTR_VAL_MAX 495U 47 #define FCS_SVN_CNTR_VAL_MAX 64U 48 49 /* FCS Attestation Cert Request Parameter */ 50 51 #define FCS_ATTEST_FIRMWARE_CERT 0x01 52 #define FCS_ATTEST_DEV_ID_SELF_SIGN_CERT 0x02 53 #define FCS_ATTEST_DEV_ID_ENROLL_CERT 0x04 54 #define FCS_ATTEST_ENROLL_SELF_SIGN_CERT 0x08 55 #define FCS_ATTEST_ALIAS_CERT 0x10 56 #define FCS_ATTEST_CERT_MAX_REQ_PARAM 0xFF 57 58 /* FCS Crypto Service */ 59 60 #define FCS_CS_KEY_OBJ_MAX_WORD_SIZE 88U 61 #define FCS_CS_KEY_INFO_MAX_WORD_SIZE 36U 62 #define FCS_CS_KEY_RESP_STATUS_MASK 0xFF 63 #define FCS_CS_KEY_RESP_STATUS_OFFSET 16U 64 65 #define FCS_CS_FIELD_SIZE_MASK 0xFFFF 66 #define FCS_CS_FIELD_FLAG_OFFSET 24 67 #define FCS_CS_FIELD_FLAG_INIT BIT(0) 68 #define FCS_CS_FIELD_FLAG_UPDATE BIT(1) 69 #define FCS_CS_FIELD_FLAG_FINALIZE BIT(2) 70 71 #define FCS_AES_MAX_DATA_SIZE 0x10000000 /* 256 MB */ 72 #define FCS_AES_MIN_DATA_SIZE 0x20 /* 32 Byte */ 73 #define FCS_AES_CMD_MAX_WORD_SIZE 15U 74 75 #define FCS_GET_DIGEST_CMD_MAX_WORD_SIZE 7U 76 #define FCS_GET_DIGEST_RESP_MAX_WORD_SIZE 19U 77 #define FCS_MAC_VERIFY_CMD_MAX_WORD_SIZE 23U 78 #define FCS_MAC_VERIFY_RESP_MAX_WORD_SIZE 4U 79 #define FCS_SHA_HMAC_CRYPTO_PARAM_SIZE_OFFSET 8U 80 81 #define FCS_ECDSA_GET_PUBKEY_MAX_WORD_SIZE 5U 82 #define FCS_ECDSA_SHA2_DATA_SIGN_CMD_MAX_WORD_SIZE 7U 83 #define FCS_ECDSA_SHA2_DATA_SIG_VERIFY_CMD_MAX_WORD_SIZE 43U 84 #define FCS_ECDSA_HASH_SIGN_CMD_MAX_WORD_SIZE 17U 85 #define FCS_ECDSA_HASH_SIG_VERIFY_CMD_MAX_WORD_SIZE 52U 86 #define FCS_ECDH_REQUEST_CMD_MAX_WORD_SIZE 29U 87 /* FCS Payload Structure */ 88 typedef struct fcs_rng_payload_t { 89 uint32_t session_id; 90 uint32_t context_id; 91 uint32_t crypto_header; 92 uint32_t size; 93 } fcs_rng_payload; 94 95 typedef struct fcs_encrypt_payload_t { 96 uint32_t first_word; 97 uint32_t src_addr; 98 uint32_t src_size; 99 uint32_t dst_addr; 100 uint32_t dst_size; 101 } fcs_encrypt_payload; 102 103 typedef struct fcs_decrypt_payload_t { 104 uint32_t first_word; 105 uint32_t owner_id[2]; 106 uint32_t src_addr; 107 uint32_t src_size; 108 uint32_t dst_addr; 109 uint32_t dst_size; 110 } fcs_decrypt_payload; 111 112 typedef struct fcs_encrypt_ext_payload_t { 113 uint32_t session_id; 114 uint32_t context_id; 115 uint32_t crypto_header; 116 uint32_t src_addr; 117 uint32_t src_size; 118 uint32_t dst_addr; 119 uint32_t dst_size; 120 } fcs_encrypt_ext_payload; 121 122 typedef struct fcs_decrypt_ext_payload_t { 123 uint32_t session_id; 124 uint32_t context_id; 125 uint32_t crypto_header; 126 uint32_t owner_id[2]; 127 uint32_t src_addr; 128 uint32_t src_size; 129 uint32_t dst_addr; 130 uint32_t dst_size; 131 } fcs_decrypt_ext_payload; 132 133 typedef struct psgsigma_teardown_msg_t { 134 uint32_t reserved_word; 135 uint32_t magic_word; 136 uint32_t session_id; 137 } psgsigma_teardown_msg; 138 139 typedef struct fcs_cntr_set_preauth_payload_t { 140 uint32_t first_word; 141 uint32_t counter_value; 142 } fcs_cntr_set_preauth_payload; 143 144 typedef struct fcs_cs_key_payload_t { 145 uint32_t session_id; 146 uint32_t reserved0; 147 uint32_t reserved1; 148 uint32_t key_id; 149 } fcs_cs_key_payload; 150 151 typedef struct fcs_crypto_service_data_t { 152 uint32_t session_id; 153 uint32_t context_id; 154 uint32_t key_id; 155 uint32_t crypto_param_size; 156 uint64_t crypto_param; 157 } fcs_crypto_service_data; 158 159 typedef struct fcs_crypto_service_aes_data_t { 160 uint32_t session_id; 161 uint32_t context_id; 162 uint32_t param_size; 163 uint32_t key_id; 164 uint32_t crypto_param[7]; 165 } fcs_crypto_service_aes_data; 166 167 /* Functions Definitions */ 168 169 uint32_t intel_fcs_random_number_gen(uint64_t addr, uint64_t *ret_size, 170 uint32_t *mbox_error); 171 int intel_fcs_random_number_gen_ext(uint32_t session_id, uint32_t context_id, 172 uint32_t size, uint32_t *send_id); 173 uint32_t intel_fcs_send_cert(uint64_t addr, uint64_t size, 174 uint32_t *send_id); 175 uint32_t intel_fcs_get_provision_data(uint32_t *send_id); 176 uint32_t intel_fcs_cntr_set_preauth(uint8_t counter_type, 177 int32_t counter_value, 178 uint32_t test_bit, 179 uint32_t *mbox_error); 180 uint32_t intel_fcs_encryption(uint32_t src_addr, uint32_t src_size, 181 uint32_t dst_addr, uint32_t dst_size, 182 uint32_t *send_id); 183 184 uint32_t intel_fcs_decryption(uint32_t src_addr, uint32_t src_size, 185 uint32_t dst_addr, uint32_t dst_size, 186 uint32_t *send_id); 187 188 int intel_fcs_encryption_ext(uint32_t session_id, uint32_t context_id, 189 uint32_t src_addr, uint32_t src_size, 190 uint32_t dst_addr, uint32_t *dst_size, 191 uint32_t *mbox_error); 192 int intel_fcs_decryption_ext(uint32_t sesion_id, uint32_t context_id, 193 uint32_t src_addr, uint32_t src_size, 194 uint32_t dst_addr, uint32_t *dst_size, 195 uint32_t *mbox_error); 196 197 int intel_fcs_sigma_teardown(uint32_t session_id, uint32_t *mbox_error); 198 int intel_fcs_chip_id(uint32_t *id_low, uint32_t *id_high, uint32_t *mbox_error); 199 int intel_fcs_attestation_subkey(uint64_t src_addr, uint32_t src_size, 200 uint64_t dst_addr, uint32_t *dst_size, 201 uint32_t *mbox_error); 202 int intel_fcs_get_measurement(uint64_t src_addr, uint32_t src_size, 203 uint64_t dst_addr, uint32_t *dst_size, 204 uint32_t *mbox_error); 205 uint32_t intel_fcs_get_rom_patch_sha384(uint64_t addr, uint64_t *ret_size, 206 uint32_t *mbox_error); 207 208 int intel_fcs_create_cert_on_reload(uint32_t cert_request, 209 uint32_t *mbox_error); 210 int intel_fcs_get_attestation_cert(uint32_t cert_request, uint64_t dst_addr, 211 uint32_t *dst_size, uint32_t *mbox_error); 212 213 int intel_fcs_open_crypto_service_session(uint32_t *session_id, 214 uint32_t *mbox_error); 215 int intel_fcs_close_crypto_service_session(uint32_t session_id, 216 uint32_t *mbox_error); 217 218 int intel_fcs_import_crypto_service_key(uint64_t src_addr, uint32_t src_size, 219 uint32_t *mbox_error); 220 int intel_fcs_export_crypto_service_key(uint32_t session_id, uint32_t key_id, 221 uint64_t dst_addr, uint32_t *dst_size, 222 uint32_t *mbox_error); 223 int intel_fcs_remove_crypto_service_key(uint32_t session_id, uint32_t key_id, 224 uint32_t *mbox_error); 225 int intel_fcs_get_crypto_service_key_info(uint32_t session_id, uint32_t key_id, 226 uint64_t dst_addr, uint32_t *dst_size, 227 uint32_t *mbox_error); 228 229 int intel_fcs_get_digest_init(uint32_t session_id, uint32_t context_id, 230 uint32_t key_id, uint32_t param_size, 231 uint64_t param_data, uint32_t *mbox_error); 232 int intel_fcs_get_digest_finalize(uint32_t session_id, uint32_t context_id, 233 uint32_t src_addr, uint32_t src_size, 234 uint64_t dst_addr, uint32_t *dst_size, 235 uint32_t *mbox_error); 236 237 int intel_fcs_mac_verify_init(uint32_t session_id, uint32_t context_id, 238 uint32_t key_id, uint32_t param_size, 239 uint64_t param_data, uint32_t *mbox_error); 240 int intel_fcs_mac_verify_finalize(uint32_t session_id, uint32_t context_id, 241 uint32_t src_addr, uint32_t src_size, 242 uint64_t dst_addr, uint32_t *dst_size, 243 uint32_t data_size, uint32_t *mbox_error); 244 245 int intel_fcs_ecdsa_hash_sign_init(uint32_t session_id, uint32_t context_id, 246 uint32_t key_id, uint32_t param_size, 247 uint64_t param_data, uint32_t *mbox_error); 248 int intel_fcs_ecdsa_hash_sign_finalize(uint32_t session_id, uint32_t context_id, 249 uint32_t src_addr, uint32_t src_size, 250 uint64_t dst_addr, uint32_t *dst_size, 251 uint32_t *mbox_error); 252 253 int intel_fcs_ecdsa_hash_sig_verify_init(uint32_t session_id, uint32_t context_id, 254 uint32_t key_id, uint32_t param_size, 255 uint64_t param_data, uint32_t *mbox_error); 256 int intel_fcs_ecdsa_hash_sig_verify_finalize(uint32_t session_id, uint32_t context_id, 257 uint32_t src_addr, uint32_t src_size, 258 uint64_t dst_addr, uint32_t *dst_size, 259 uint32_t *mbox_error); 260 261 int intel_fcs_ecdsa_sha2_data_sign_init(uint32_t session_id, 262 uint32_t context_id, uint32_t key_id, 263 uint32_t param_size, uint64_t param_data, 264 uint32_t *mbox_error); 265 int intel_fcs_ecdsa_sha2_data_sign_finalize(uint32_t session_id, 266 uint32_t context_id, uint32_t src_addr, 267 uint32_t src_size, uint64_t dst_addr, 268 uint32_t *dst_size, uint32_t *mbox_error); 269 270 int intel_fcs_ecdsa_sha2_data_sig_verify_init(uint32_t session_id, 271 uint32_t context_id, uint32_t key_id, 272 uint32_t param_size, uint64_t param_data, 273 uint32_t *mbox_error); 274 int intel_fcs_ecdsa_sha2_data_sig_verify_finalize(uint32_t session_id, 275 uint32_t context_id, uint32_t src_addr, 276 uint32_t src_size, uint64_t dst_addr, 277 uint32_t *dst_size, uint32_t data_size, 278 uint32_t *mbox_error); 279 280 int intel_fcs_ecdsa_get_pubkey_init(uint32_t session_id, uint32_t context_id, 281 uint32_t key_id, uint32_t param_size, 282 uint64_t param_data, uint32_t *mbox_error); 283 int intel_fcs_ecdsa_get_pubkey_finalize(uint32_t session_id, uint32_t context_id, 284 uint64_t dst_addr, uint32_t *dst_size, 285 uint32_t *mbox_error); 286 287 int intel_fcs_ecdh_request_init(uint32_t session_id, uint32_t context_id, 288 uint32_t key_id, uint32_t param_size, 289 uint64_t param_data, uint32_t *mbox_error); 290 int intel_fcs_ecdh_request_finalize(uint32_t session_id, uint32_t context_id, 291 uint32_t src_addr, uint32_t src_size, 292 uint64_t dst_addr, uint32_t *dst_size, 293 uint32_t *mbox_error); 294 295 int intel_fcs_aes_crypt_init(uint32_t session_id, uint32_t context_id, 296 uint32_t key_id, uint64_t param_addr, 297 uint32_t param_size, uint32_t *mbox_error); 298 int intel_fcs_aes_crypt_finalize(uint32_t session_id, uint32_t context_id, 299 uint64_t src_addr, uint32_t src_size, 300 uint64_t dst_addr, uint32_t dst_size, 301 uint32_t *send_id); 302 303 #endif /* SOCFPGA_FCS_H */ 304