| 08ba8c6e | 03-Mar-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #854 from rockchip-linux/pm_plat
rockchip: plat_pm.c: Change callbacks implement for our SOCs. |
| f32ab444 | 01-Mar-2017 |
tony.xie <tony.xie@rock-chips.com> |
rockchip: plat_pm.c: Change callbacks implement for our SOCs.
Remove struct rockchip_pm_ops_cb and instead of using weak functions implement; in this way we want the codes look clear and simple;
Ch
rockchip: plat_pm.c: Change callbacks implement for our SOCs.
Remove struct rockchip_pm_ops_cb and instead of using weak functions implement; in this way we want the codes look clear and simple;
Change-Id: Ib9e8a5e932fdfc2b3e6a1ec502c40dfe720ac400 Signed-off-by: tony.xie <tony.xie@rock-chips.com>
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| 977001aa | 26-Oct-2016 |
Xing Zheng <zhengxing@rock-chips.com> |
rk3399: dram: use PMU M0 to do ddr frequency scaling
We used dcf do ddr frequency scaling, but we just include a dcf binary, it hard to maintain later, we have M0 compile flow in ATF, and M0 can als
rk3399: dram: use PMU M0 to do ddr frequency scaling
We used dcf do ddr frequency scaling, but we just include a dcf binary, it hard to maintain later, we have M0 compile flow in ATF, and M0 can also work for ddr frequency scaling, so let's use it.
Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
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| 3d8256b2 | 25-Dec-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
Use #ifdef for IMAGE_BL* instead of #if
One nasty part of ATF is some of boolean macros are always defined as 1 or 0, and the rest of them are only defined under certain conditions.
For the former
Use #ifdef for IMAGE_BL* instead of #if
One nasty part of ATF is some of boolean macros are always defined as 1 or 0, and the rest of them are only defined under certain conditions.
For the former group, "#if FOO" or "#if !FOO" must be used because "#ifdef FOO" is always true. (Options passed by $(call add_define,) are the cases.)
For the latter, "#ifdef FOO" or "#ifndef FOO" should be used because checking the value of an undefined macro is strange.
Here, IMAGE_BL* is handled by make_helpers/build_macro.mk like follows:
$(eval IMAGE := IMAGE_BL$(call uppercase,$(3)))
$(OBJ): $(2) @echo " CC $$<" $$(Q)$$(CC) $$(TF_CFLAGS) $$(CFLAGS) -D$(IMAGE) -c $$< -o $$@
This means, IMAGE_BL* is defined when building the corresponding image, but *undefined* for the other images.
So, IMAGE_BL* belongs to the latter group where we should use #ifdef or #ifndef.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| f38d93fd | 18-Jan-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #801 from masahir0y/cleanup
Macro cleanups |
| 47497053 | 28-Dec-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
Move BL_COHERENT_RAM_BASE/END defines to common_def.h
We have lots of duplicated defines (and comment blocks too). Move them to include/plat/common/common_def.h.
While we are here, suffix the end a
Move BL_COHERENT_RAM_BASE/END defines to common_def.h
We have lots of duplicated defines (and comment blocks too). Move them to include/plat/common/common_def.h.
While we are here, suffix the end address with _END instead of _LIMIT. The _END is a better fit to indicate the linker-derived real end address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| 152c8c11 | 05-Dec-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
utils: move BIT(n) macro to utils.h
We are duplicating this macro define, and it is useful enough to be placed in the common place.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
| ede939f2 | 14-Dec-2016 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Fix incorrect copyright notices
Some files have incorrect copyright notices, this patch fixes all files with deviations from the standard notice.
Change-Id: I66b73e78a50a235acb55f1e2ec2052a42c0570d
Fix incorrect copyright notices
Some files have incorrect copyright notices, this patch fixes all files with deviations from the standard notice.
Change-Id: I66b73e78a50a235acb55f1e2ec2052a42c0570d2 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| ad09652c | 26-Oct-2016 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #724 from rockchip-linux/support-rk3399-sdram
rockchip: optimize the link mechanism for SRAM code |
| 4ea8dc4e | 04-Aug-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: fix A72 L2CTLR_DATA_RAM_LATENCY to 5
The default value of L2CTLR_DATA_RAM_LATENCY is 2, depends to the test result on rk3399, the A72 will need lower voltage for high frequency if it's set
rockchip: fix A72 L2CTLR_DATA_RAM_LATENCY to 5
The default value of L2CTLR_DATA_RAM_LATENCY is 2, depends to the test result on rk3399, the A72 will need lower voltage for high frequency if it's set to be 5, and almost no effect on performance.
Change-Id: I99a6a43edcc0c58f7775c10f4b85669dc3eff66d Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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| 7ac52006 | 11-Oct-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: clear the power mode status via M0
Due to the PMU design, the PMU may not clear the WAKEUP bit after wakeup, therefore, the state machine at the power mode may enter the infinite loop duri
rockchip: clear the power mode status via M0
Due to the PMU design, the PMU may not clear the WAKEUP bit after wakeup, therefore, the state machine at the power mode may enter the infinite loop during WFI.
There is a solution that we can use the M0 to monitor the WAKEUP bit and clear it during power mode, then the state machine will be recovered immediately. Then, the DUT can exit the WFI normally.
Change-Id: I303628553b728c214bf2d436bd3122032b5e669c Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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| ec693569 | 11-Oct-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: optimize the link mechanism for SRAM code
Add the common extra.ld.S and customized rk3399.ld.S to extend to more features for different platforms. For example, we can add SRAM section and
rockchip: optimize the link mechanism for SRAM code
Add the common extra.ld.S and customized rk3399.ld.S to extend to more features for different platforms. For example, we can add SRAM section and specific address to load there if we need it, and the common bl31.ld.S not need to be modified.
Therefore, we can remove the unused codes which copying explicitly from the function pmusram_prepare(). It looks like more clear.
Change-Id: Ibffa2da5e8e3d1d2fca80085ebb296ceb967fce8 Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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| d9738fbc | 14-Sep-2016 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #700 from rockchip-linux/fixes-typo-and-warnings
rockchip: Fixes typo and warnings |
| 7e1bedb6 | 09-Sep-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: fixes some typo
As the checkpatch reports the warning or error.
plat/rockchip/common/plat_pm.c:96: ERROR: do not set execute permissions for source files plat/rockchip/rk3399/drivers/pmu/
rockchip: fixes some typo
As the checkpatch reports the warning or error.
plat/rockchip/common/plat_pm.c:96: ERROR: do not set execute permissions for source files plat/rockchip/rk3399/drivers/pmu/pmu.c:294: ERROR: do not set execute permissions for source files
plat/rockchip/common/plat_pm.c:286: WARNING: line over 80 characters plat/rockchip/common/plat_pm.c:287: WARNING: line over 80 characters
Change-Id: Ib347da21c56551c31df3f90f03777b13c75d5c26
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| 2bff35bb | 09-Sep-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: set gpio2 ~ gpio4 to input and pull none mode
For save power cosumption, if gpio power supply shut down, we need to set gpio2 ~ gpio4 to input and HiZ status when suspend, and recovery the
rockchip: set gpio2 ~ gpio4 to input and pull none mode
For save power cosumption, if gpio power supply shut down, we need to set gpio2 ~ gpio4 to input and HiZ status when suspend, and recovery they status when rusume. we do it base on apio pass from loader.
Change-Id: I59fd2395e5e37e63425472a39f519822c9197e4c
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| e550c631 | 09-Sep-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: support disable/enable specific gpio when suspend/resume
some specific board need to disable/enable specific gpio when suspend/resume, so we add this function, bootloader can pass the spec
rockchip: support disable/enable specific gpio when suspend/resume
some specific board need to disable/enable specific gpio when suspend/resume, so we add this function, bootloader can pass the specific gpio, and we can handle these gpios in bl31 suspend/resuem function.
Change-Id: I373b03ef9202ee4a05a2b9caacdfa01b47ee2177
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| 63ebf051 | 02-Sep-2016 |
Tony Xie <tony.xie@rock-chips.com> |
rockchip: fix the scu idle for rk3399
As rk3399 reported the d8/octane scores drop 10% with cpu idle. The root cause is thc cpu cluster enter the slow mode. We don't need switch the clock to 24MHz i
rockchip: fix the scu idle for rk3399
As rk3399 reported the d8/octane scores drop 10% with cpu idle. The root cause is thc cpu cluster enter the slow mode. We don't need switch the clock to 24MHz if cpu cluster enter the retention mode. In order to improve performance, it just needs for cluster enter powering off mode.
Also, we shouldn't do anything for hlvl if the system is off.
Change-Id: I2a02962a01343abd0cba47ed63192c1cdf88b119
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| bdb2763d | 18-Aug-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: handle some interrupt before enter power mode for rk3399
For the PMU design, we don't expect to get the interrupts before enter the power mode. Since that will cause the confusion for the
rockchip: handle some interrupt before enter power mode for rk3399
For the PMU design, we don't expect to get the interrupts before enter the power mode. Since that will cause the confusion for the state machine in the power mode.
Change-Id: Id8dee79ae617a66271b5caf92caf35f520f45099
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| 545bff0e | 09-Aug-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: fix the power up/dowm cnt for rk3399
Sometimes this will cause the long delay for suspend/resume. Since the 24M OCS will be turned off in power mode. Also, remove the ERROR_DEPRECATED conf
rockchip: fix the power up/dowm cnt for rk3399
Sometimes this will cause the long delay for suspend/resume. Since the 24M OCS will be turned off in power mode. Also, remove the ERROR_DEPRECATED config define.
Change-Id: I78f21c35912c2250972e551695cdacc7bc4c020a
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| e6517abd | 21-Jul-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: fixes typo and some bugs for suspend/resume tests
1. Remove the AP_PWROFF in ATF, should configure it in kernel. 2. Save and restore the PWMs pin/regs for suspend/resume. 3. The pmusgrf re
rockchip: fixes typo and some bugs for suspend/resume tests
1. Remove the AP_PWROFF in ATF, should configure it in kernel. 2. Save and restore the PWMs pin/regs for suspend/resume. 3. The pmusgrf reset-hold bits needs to be released. since the pmusgrf reset-hold bits needs to be held. 4. Configure the PMU power up/down cycles about delay 3ms. 5. With the MMIO register block as one big mapping. 6. Fix the build error with psci_entrypoint since PSCI lib updated.
Fixes the commit 9ec78bd ("rockchip: support the suspend/resume for rk3399").
Change-Id: I112806700bf433c87763aac23d22fa7e6a7f5264
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| 84ded36c | 18-Jul-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #654 from rockchip-linux/rk3399-suspend-resume
rockchip: support the suspend/resume for rk3399 |
| 473cae6c | 18-Jul-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #653 from rockchip-linux/support-rockchip-sip-runtime-service
rockchip: support plat SIP runtime service for rk3399 |
| 9ec78bdf | 16-Jul-2016 |
Tony Xie <tony.xie@rock-chips.com> |
rockchip: support the suspend/resume for rk3399
1.Fixes the suspend/resume some bugs. 2.Add the power domain for saving power consumption. 3.Add cpu clusters suspend for rk3399 SoCs
Change-Id: Id60
rockchip: support the suspend/resume for rk3399
1.Fixes the suspend/resume some bugs. 2.Add the power domain for saving power consumption. 3.Add cpu clusters suspend for rk3399 SoCs
Change-Id: Id602779016b41d6281f4ba40a20229d909b28e46
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| 1760db68 | 21-Jun-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: support plat SIP runtime service
Software executing in the normal world and in the trusted world at exception levels lower than EL3 will request runtime services using the SMC instruction.
rockchip: support plat SIP runtime service
Software executing in the normal world and in the trusted world at exception levels lower than EL3 will request runtime services using the SMC instruction.
See the documentation here: https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/ rt-svc-writers-guide.md
This to be implemented as an EL3 Runtime Service in rockchip BL31 platform port, using the "SiP Service Call" range as specified in the SMC Calling Convention. This doesn't support any SMC yet, we will support it in later.
Change-Id: I0a638dd0b653c28b08f79d89f77ed7c69864017d
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| ed81f3eb | 05-Jul-2016 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Introduce utils.h header file
This patch introduces a new header file: include/lib/utils.h. Its purpose is to provide generic macros and helper functions that are independent of any BL image, archit
Introduce utils.h header file
This patch introduces a new header file: include/lib/utils.h. Its purpose is to provide generic macros and helper functions that are independent of any BL image, architecture, platform and even not specific to Trusted Firmware.
For now, it contains only 2 macros: ARRAY_SIZE() and IS_POWER_OF_TWO(). These were previously defined in bl_common.h and xlat_tables.c respectively.
bl_common.h includes utils.h to retain compatibility for platforms that relied on bl_common.h for the ARRAY_SIZE() macro. Upstream platform ports that use this macro have been updated to include utils.h.
Change-Id: I960450f54134f25d1710bfbdc4184f12c049a9a9
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