refactor(st-clock): move stm32mp1_clk_rcc_regs_*lock

Those functions are only used on MP1, they should not be in STM32 clock
core. Move them to MP13 driver (they are already in MP15 driver).
Redefin

refactor(st-clock): move stm32mp1_clk_rcc_regs_*lock

Those functions are only used on MP1, they should not be in STM32 clock
core. Move them to MP13 driver (they are already in MP15 driver).
Redefine new clk_stm32_rcc_regs_*lock() functions in clock core. This
change avoid sparse warning:
drivers/st/clk/clk-stm32-core.c:46:6: warning: symbol
'stm32mp1_clk_rcc_regs_lock' was not declared. Should it be static?
drivers/st/clk/clk-stm32-core.c:51:6: warning: symbol
'stm32mp1_clk_rcc_regs_unlock' was not declared. Should it be static?

Change-Id: I9f255acaa843e41fc14267c1a8091f93bd029796
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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refactor(st-clock): driver size optimization

Re-ordering structures to avoid gaps and minimize data.
Reduce type of gate_refcounts[], uint8_t is enough.
Re-ordering structures to avoid gaps and mini

refactor(st-clock): driver size optimization

Re-ordering structures to avoid gaps and minimize data.
Reduce type of gate_refcounts[], uint8_t is enough.
Re-ordering structures to avoid gaps and minimize data.
Use an unsigned char to define a clock ops type.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Change-Id: I6b793dc34abdd6ef013609fc0f122da5d1824a34

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refactor(st-clock): remove BL32 support on STM32MP13

TF-A BL32 (SP_MIN) is not supported on STM32MP13. Only OP-TEE is used
as BL32. Remove the code under IMAGE_BL32 flag in STM32MP13 driver.

Signed

refactor(st-clock): remove BL32 support on STM32MP13

TF-A BL32 (SP_MIN) is not supported on STM32MP13. Only OP-TEE is used
as BL32. Remove the code under IMAGE_BL32 flag in STM32MP13 driver.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I6cc9f230782c44129b205e66a44cdb4bcb5f95c3

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feat(st-clock): don't gate/ungate an oscillator if it is not wired

If the oscillator is not present, the gating will fail.

Change-Id: If9119460a4bcd42053537f1975afe5fe1df05752
Signed-off-by: Gabrie

feat(st-clock): don't gate/ungate an oscillator if it is not wired

If the oscillator is not present, the gating will fail.

Change-Id: If9119460a4bcd42053537f1975afe5fe1df05752
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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feat(st-clock): update with new bindings

Code alignment with MP13 driver.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Change-Id: Ifb0597721a865f463cf41c5cd7be3ca75a1da80c

feat(stm32mp1): always boot at 650MHz

Switching to higher CPU frequencies requires a dedicated chip version
(STM32MP1xxD or STM32MP1xxF), and increase CPU voltage. To avoid
re-configuring I2C and PM

feat(stm32mp1): always boot at 650MHz

Switching to higher CPU frequencies requires a dedicated chip version
(STM32MP1xxD or STM32MP1xxF), and increase CPU voltage. To avoid
re-configuring I2C and PMIC before and after applying clock tree,
always boot at 650MHz, which is the frequency for nominal voltage.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Id05a3ee17e7dd57e2d64dc06f8f1e7f9cb21e110

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refactor(st-clock): remove LSEDRV_MEDIUM_HIGH for STM32MP13

Remove useless LSEDRV_MEDIUM_HIGH definition in clk-stm32mp13.c.
It's already defined in include/dt-bindings/clock/stm32mp13-clksrc.h.

Si

refactor(st-clock): remove LSEDRV_MEDIUM_HIGH for STM32MP13

Remove useless LSEDRV_MEDIUM_HIGH definition in clk-stm32mp13.c.
It's already defined in include/dt-bindings/clock/stm32mp13-clksrc.h.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Change-Id: Ie3fa4711930f922fa0733ba7c76d72ec9639e9a5

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fix(st-clock): display proper PLL number for STM32MP13

The PLL clk_id does not start at 0, but it is in the enum listing all
clocks. To have a better display of the PLL number, start at PLL1,
by cha

fix(st-clock): display proper PLL number for STM32MP13

The PLL clk_id does not start at 0, but it is in the enum listing all
clocks. To have a better display of the PLL number, start at PLL1,
by changing pll->clk_id in messages with pll->clk_id - _CK_PLL1 + 1.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ic09195ae6fe5f8d3a87e69962425f7c826f3670b

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fix(st-clock): do not reconfigure LSE

If LSE oscillator is already ON, which is the case when returning from
low-power state or if we are on VBAT, it mustn't be reconfigured.

Signed-off-by: Yann Ga

fix(st-clock): do not reconfigure LSE

If LSE oscillator is already ON, which is the case when returning from
low-power state or if we are on VBAT, it mustn't be reconfigured.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ie75f2b0b42aeb3d95e2266e1fca811a2f2b3e29f

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refactor(st-clock): remove unused clk function in API

Remove the unused functions in stm32mp clk API:
- stm32mp_stgen_get_counter (change to static, no more exported)
- stm32mp_stgen_restore_counter

refactor(st-clock): remove unused clk function in API

Remove the unused functions in stm32mp clk API:
- stm32mp_stgen_get_counter (change to static, no more exported)
- stm32mp_stgen_restore_counter

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ib6ca72723eac3e133f1ca0dee504ef344c72e0bf

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refactor(st-clock): support deactivated STGEN in stm32mp_stgen_config

Update function stm32mp_stgen_config() to support deactivated STGEN
when frequency is 0, for example on STOP2 exit for STM32MP25

refactor(st-clock): support deactivated STGEN in stm32mp_stgen_config

Update function stm32mp_stgen_config() to support deactivated STGEN
when frequency is 0, for example on STOP2 exit for STM32MP25.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Id371c4602a614bbfa0ecc7ce2d2e0ac5261e1d52

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feat(st-clock): add function to restore generic timer rate

Add a function to restore the CPU generic timer rate from STGEN content.
After wake-up from LPLV-Stop2, STGEN content is not lost, but gene

feat(st-clock): add function to restore generic timer rate

Add a function to restore the CPU generic timer rate from STGEN content.
After wake-up from LPLV-Stop2, STGEN content is not lost, but generic timer
has been reset.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Change-Id: I6f91dbd051f76383e9ff1d6bb86225d373dbf33a

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feat(st-bsec): use early traces

Replace trace macros with their corresponding EARLY_* macros.
Add some early traces in bsec2 driver.

Change-Id: I65e2feee6e7ba2524fb0a334557aa6e883672765
Signed-off-

feat(st-bsec): use early traces

Replace trace macros with their corresponding EARLY_* macros.
Add some early traces in bsec2 driver.

Change-Id: I65e2feee6e7ba2524fb0a334557aa6e883672765
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(st-clock): add function to control MCU subsystem

Add a new function to control the MCU subsystem
security state.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I070eec06fc93a

feat(st-clock): add function to control MCU subsystem

Add a new function to control the MCU subsystem
security state.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I070eec06fc93a1214227f25a6a4f1c40c66c86b0

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feat(st-sdmmc2): set FIFO size to 1024 on STM32MP25

On STM32MP25, a new version of the SDMMC2 IP is embedded (v3.0).
The size of the FIFO is 1024 in this new IP version.

Signed-off-by: Yann Gautier

feat(st-sdmmc2): set FIFO size to 1024 on STM32MP25

On STM32MP25, a new version of the SDMMC2 IP is embedded (v3.0).
The size of the FIFO is 1024 in this new IP version.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ie6b1fb215fc77b24b7c342d4cd69248a96039a4d

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Merge "refactor(st-i2c): use fdt_read_uint32_default()" into integration

feat(st-bsec): add driver for the new IP version BSEC3

This driver is used for the new version of the BSEC peripheral used
on STM32MP25.

Change-Id: I38ca0db22d06704769c994c6806ccd80b17dde6e
Signed-

feat(st-bsec): add driver for the new IP version BSEC3

This driver is used for the new version of the BSEC peripheral used
on STM32MP25.

Change-Id: I38ca0db22d06704769c994c6806ccd80b17dde6e
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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refactor(st-i2c): use fdt_read_uint32_default()

The function stm32_i2c_get_setup_from_fdt() was using fdt_getprop() to
to get some i2c node properties, and set a default value if the node
was not fo

refactor(st-i2c): use fdt_read_uint32_default()

The function stm32_i2c_get_setup_from_fdt() was using fdt_getprop() to
to get some i2c node properties, and set a default value if the node
was not found. The function fdt_read_uint32_default() already does
this in a simpler way.
Remove useless STM32_I2C_SPEED_DEFAULT.

Change-Id: I74c6295bb5765ee7c7e0a9ae020b741f1fe022a6
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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refactor(st): update test for closed chip

The function stm32mp_is_closed_device() is replaced with
stm32mp_check_closed_device(), which return an uint32_t, either
STM32MP_CHIP_SEC_OPEN or STM32MP_CH

refactor(st): update test for closed chip

The function stm32mp_is_closed_device() is replaced with
stm32mp_check_closed_device(), which return an uint32_t, either
STM32MP_CHIP_SEC_OPEN or STM32MP_CHIP_SEC_CLOSED.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ie0790cdc36c4b6522083bc1f0e7c38e8061e6adf

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refactor(st-bsec): improve BSEC driver

In order to ease the introduction of a new BSEC3 driver for STM32MP25,
the BSEC2 driver is reworked. Unused functions are removed. The
bsec_base global variabl

refactor(st-bsec): improve BSEC driver

In order to ease the introduction of a new BSEC3 driver for STM32MP25,
the BSEC2 driver is reworked. Unused functions are removed. The
bsec_base global variable is removed in favor of the macro BSEC_BASE.
A rework is also done around function checking the state of BSEC.

Change-Id: I1ad76cb67333ab9a8fa1d65db34d74a712bf1190
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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fix(st-crypto): use GENMASK_32 to define PKA registers masks

When compiling the driver in aarch64, and with LOG_LEVEL_VERBOSE, there
is a compilation error on the message displaying the version of t

fix(st-crypto): use GENMASK_32 to define PKA registers masks

When compiling the driver in aarch64, and with LOG_LEVEL_VERBOSE, there
is a compilation error on the message displaying the version of the
peripheral. The masks are making the variable unsigned long, whereas
we want to display an unsigned int. As the registers are 32-bit,
we should use GENMASK_32 instead of GENMASK.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I002dd5ad901f68a9480f758eaaa4428f969813c1

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fix(st-crypto): do not read RNG data if it's not ready

Having RNG_SR_DRDY bit in RNG_SR register does not mean that there are 4
RNG words ready to be read. Add a check on RNG_SR_DRDY between each wo

fix(st-crypto): do not read RNG data if it's not ready

Having RNG_SR_DRDY bit in RNG_SR register does not mean that there are 4
RNG words ready to be read. Add a check on RNG_SR_DRDY between each word
reading.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Change-Id: I46af7ca6c0ddbe19540b248365a5016b15b9a707

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fix(st-ddr): express memory size with size_t type

Express memory size with size_t type in structures.
Retrieve value as uint32_t from device tree and then cast it to size_t.
Combined with uintptr_t

fix(st-ddr): express memory size with size_t type

Express memory size with size_t type in structures.
Retrieve value as uint32_t from device tree and then cast it to size_t.
Combined with uintptr_t use, it ensures a generic algorithm whatever
the platform architecture, notably within systematic tests. Adapt also
their prototypes.

Move memory size print outside stm32mp_ddr_check_size() to adapt it to
related platform.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: Ic6e1a62d7a5e23cef49909a658098c800e7dae3f

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feat(st-uart): add AARCH64 stm32_console driver

It is an adaptation for AARCH64 of the already existing AARCH32 driver.

Change-Id: Ifabf716a6bd188d2249650a34bbec1a602bcb017
Signed-off-by: Yann Gaut

feat(st-uart): add AARCH64 stm32_console driver

It is an adaptation for AARCH64 of the already existing AARCH32 driver.

Change-Id: Ifabf716a6bd188d2249650a34bbec1a602bcb017
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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refactor(st): rename PLAT_NB_FIXED_REGS

Rename PLAT_NB_FIXED_REGS to PLAT_NB_FIXED_REGUS.
This avoids confusion with regulators and registers.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Chang

refactor(st): rename PLAT_NB_FIXED_REGS

Rename PLAT_NB_FIXED_REGS to PLAT_NB_FIXED_REGUS.
This avoids confusion with regulators and registers.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Change-Id: Idb2de7204fe978ffcdd729e6cbe453e85fd089b5

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