1# 2# Copyright (c) 2023, Linaro Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include lib/libfdt/libfdt.mk 8include common/fdt_wrappers.mk 9 10PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ 11 -I${PLAT_QEMU_COMMON_PATH}/include \ 12 -I${PLAT_QEMU_PATH}/include \ 13 -Iinclude/common/tbbr 14 15ifeq (${ARCH},aarch32) 16QEMU_CPU_LIBS := lib/cpus/${ARCH}/cortex_a15.S 17else 18QEMU_CPU_LIBS := lib/cpus/aarch64/aem_generic.S \ 19 lib/cpus/aarch64/cortex_a53.S \ 20 lib/cpus/aarch64/cortex_a55.S \ 21 lib/cpus/aarch64/cortex_a57.S \ 22 lib/cpus/aarch64/cortex_a72.S \ 23 lib/cpus/aarch64/cortex_a76.S \ 24 lib/cpus/aarch64/cortex_a710.S \ 25 lib/cpus/aarch64/neoverse_n_common.S \ 26 lib/cpus/aarch64/neoverse_n1.S \ 27 lib/cpus/aarch64/neoverse_v1.S \ 28 lib/cpus/aarch64/qemu_max.S 29 30PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH} 31 32# Cpu core architecture level: 33# v8.0: a53, a57, a72 34# v8.2: a76, n1 35# v8.4: v1 36# v9.0: a710 37# 38# let treat v9.0 as v8.5 as they share cpu features 39# https://developer.arm.com/documentation/102378/0201/Armv8-x-and-Armv9-x-extensions-and-features 40 41ARM_ARCH_MAJOR := 8 42ARM_ARCH_MINOR := 5 43endif 44 45PLAT_BL_COMMON_SOURCES := ${PLAT_QEMU_COMMON_PATH}/qemu_common.c \ 46 ${PLAT_QEMU_COMMON_PATH}/qemu_console.c \ 47 drivers/arm/pl011/${ARCH}/pl011_console.S 48 49include lib/xlat_tables_v2/xlat_tables.mk 50PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 51 52ifneq ($(ENABLE_STACK_PROTECTOR), 0) 53 PLAT_BL_COMMON_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c 54endif 55 56BL1_SOURCES += drivers/io/io_semihosting.c \ 57 drivers/io/io_storage.c \ 58 drivers/io/io_fip.c \ 59 drivers/io/io_memmap.c \ 60 lib/semihosting/semihosting.c \ 61 lib/semihosting/${ARCH}/semihosting_call.S \ 62 ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \ 63 ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \ 64 ${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c \ 65 ${QEMU_CPU_LIBS} 66 67BL2_SOURCES += drivers/io/io_semihosting.c \ 68 drivers/io/io_storage.c \ 69 drivers/io/io_fip.c \ 70 drivers/io/io_memmap.c \ 71 lib/semihosting/semihosting.c \ 72 lib/semihosting/${ARCH}/semihosting_call.S \ 73 ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \ 74 ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \ 75 ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c \ 76 ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c \ 77 ${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c \ 78 common/desc_image_load.c \ 79 common/fdt_fixup.c 80 81BL31_SOURCES += ${QEMU_CPU_LIBS} \ 82 lib/semihosting/semihosting.c \ 83 lib/semihosting/${ARCH}/semihosting_call.S \ 84 plat/common/plat_psci_common.c \ 85 ${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S \ 86 ${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \ 87 common/fdt_fixup.c \ 88 ${QEMU_GIC_SOURCES} 89 90# CPU flag enablement 91ifeq (${ARCH},aarch64) 92 93# Later QEMU versions support SME and SVE. 94# SPM_MM is not compatible with ENABLE_SVE_FOR_NS (build breaks) 95ifeq (${SPM_MM},1) 96 ENABLE_SVE_FOR_NS := 0 97 ENABLE_SME_FOR_NS := 0 98else 99 ENABLE_SVE_FOR_NS := 2 100 ENABLE_SME_FOR_NS := 2 101endif 102 103# QEMU will use the RNDR instruction for the stack protector canary. 104ENABLE_FEAT_RNG := 2 105 106# QEMU 7.2+ has support for FGT and Linux needs it enabled to boot on max 107ENABLE_FEAT_FGT := 2 108 109# Treating this as a memory-constrained port for now 110USE_COHERENT_MEM := 0 111 112# This can be overridden depending on CPU(s) used in the QEMU image 113HW_ASSISTED_COHERENCY := 1 114 115CTX_INCLUDE_AARCH32_REGS := 0 116ifeq (${CTX_INCLUDE_AARCH32_REGS}, 1) 117$(error "This is an AArch64-only port; CTX_INCLUDE_AARCH32_REGS must be disabled") 118endif 119 120# Pointer Authentication sources 121ifeq (${ENABLE_PAUTH}, 1) 122PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c 123CTX_INCLUDE_PAUTH_REGS := 1 124endif 125 126endif 127