Searched refs:_MaskMiu1Req_HVD_RW_MIF1 (Results 1 – 10 of 10) sorted by relevance
| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/hvd_v3/ |
| H A D | halHVD_EX.c | 227 #define _MaskMiu1Req_HVD_RW_MIF1( m ) _HVD_WriteRegBit(MIU1_REG_RQ4_MASK, m, BIT(3)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/hvd_v3/ |
| H A D | halHVD_EX.c | 227 #define _MaskMiu1Req_HVD_RW_MIF1( m ) _HVD_WriteRegBit(MIU1_REG_RQ4_MASK, m, BIT(3)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/hvd_v3/ |
| H A D | halHVD_EX.c | 213 #define _MaskMiu1Req_HVD_RW_MIF1( m ) _HVD_WriteRegBit(MIU1_REG_RQ4_MASK, m, BIT(3)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/hvd_v3/ |
| H A D | halHVD_EX.c | 227 #define _MaskMiu1Req_HVD_RW_MIF1( m ) _HVD_WriteRegBit(MIU1_REG_RQ4_MASK, m, BIT(5)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/hvd_v3/ |
| H A D | halHVD_EX.c | 228 #define _MaskMiu1Req_HVD_RW_MIF1( m ) _HVD_WriteRegBit(MIU1_REG_RQ4_MASK, m, BIT(3)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/hvd_v3/ |
| H A D | halHVD_EX.c | 227 #define _MaskMiu1Req_HVD_RW_MIF1( m ) _HVD_WriteRegBit(MIU1_REG_RQ4_MASK, m, BIT(5)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maxim/hvd_v3/ |
| H A D | halHVD_EX.c | 227 #define _MaskMiu1Req_HVD_RW_MIF1( m ) _HVD_WriteRegBit(MIU1_REG_RQ4_MASK, m, BIT(3)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/hvd_v3/ |
| H A D | halHVD_EX.c | 227 #define _MaskMiu1Req_HVD_RW_MIF1( m ) _HVD_WriteRegBit(MIU1_REG_RQ4_MASK, m, BIT(5)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/hvd_v3/ |
| H A D | halHVD_EX.c | 227 #define _MaskMiu1Req_HVD_RW_MIF1( m ) _HVD_WriteRegBit(MIU1_REG_RQ4_MASK, m, BIT(3)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/hvd_lite/ |
| H A D | halHVD_EX.c | 223 #define _MaskMiu1Req_HVD_RW_MIF1( m ) _HVD_WriteRegBit(MIU1_REG_RQ4_MASK, m, BIT(5)) macro
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