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Searched refs:TSP_VID3D_SRC_SHIFT (Results 1 – 25 of 29) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DregTSP.h1088 #define TSP_VID3D_SRC_SHIFT 9 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tsp/
H A DhalTSP.c2542 …2_R(&_TspCtrl[0].FIFO_Src) & ~TSP_VID3D_SRC_MASK)| (TSP_SRC_FROM_PKTDMXFL << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_PS_Path_Enable()
2638 …Src, (_HAL_REG32_R(&_TspCtrl[0].FIFO_Src) & ~TSP_VID3D_SRC_MASK)| (u32Src << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_AVFIFO_Src_Select()
2657 _HAL_TSP_CMD_Write_HWPCR_Reg(TSP_VID3D_SRC_MASK, (u32Src << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_AVFIFO_Src_Select()
H A DregTSP.h1120 #define TSP_VID3D_SRC_SHIFT 9 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/
H A DregTSP.h1115 #define TSP_VID3D_SRC_SHIFT 9UL macro
H A DhalTSP.c2780 …2_R(&_TspCtrl[0].FIFO_Src) & ~TSP_VID3D_SRC_MASK)| (TSP_SRC_FROM_PKTDMXFL << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_PS_Path_Enable()
2874 …Src, (_HAL_REG32_R(&_TspCtrl[0].FIFO_Src) & ~TSP_VID3D_SRC_MASK)| (u32Src << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_AVFIFO_Src_Select()
2893 _HAL_TSP_CMD_Write_HWPCR_Reg(TSP_VID3D_SRC_MASK, (u32Src << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_AVFIFO_Src_Select()
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/
H A DregTSP.h1106 #define TSP_VID3D_SRC_SHIFT 9UL macro
H A DhalTSP.c2745 …2_R(&_TspCtrl[0].FIFO_Src) & ~TSP_VID3D_SRC_MASK)| (TSP_SRC_FROM_PKTDMXFL << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_PS_Path_Enable()
2839 …Src, (_HAL_REG32_R(&_TspCtrl[0].FIFO_Src) & ~TSP_VID3D_SRC_MASK)| (u32Src << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_AVFIFO_Src_Select()
2858 _HAL_TSP_CMD_Write_HWPCR_Reg(TSP_VID3D_SRC_MASK, (u32Src << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_AVFIFO_Src_Select()
/utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/
H A DregTSP.h1169 #define TSP_VID3D_SRC_SHIFT 9UL macro
H A DhalTSP.c2641 …2_R(&_TspCtrl[0].FIFO_Src) & ~TSP_VID3D_SRC_MASK)| (TSP_SRC_FROM_PKTDMXFL << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_PS_Path_Enable()
2792 …Src, (_HAL_REG32_R(&_TspCtrl[0].FIFO_Src) & ~TSP_VID3D_SRC_MASK)| (u32Src << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_AVFIFO_Src_Select()
2817 _HAL_TSP_CMD_Write_HWPCR_Reg(TSP_VID3D_SRC_MASK, (u32Src << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_AVFIFO_Src_Select()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/
H A DregTSP.h1173 #define TSP_VID3D_SRC_SHIFT 9UL macro
H A DhalTSP.c2844 …2_R(&_TspCtrl[0].FIFO_Src) & ~TSP_VID3D_SRC_MASK)| (TSP_SRC_FROM_PKTDMXFL << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_PS_Path_Enable()
2995 …Src, (_HAL_REG32_R(&_TspCtrl[0].FIFO_Src) & ~TSP_VID3D_SRC_MASK)| (u32Src << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_AVFIFO_Src_Select()
3020 _HAL_TSP_CMD_Write_HWPCR_Reg(TSP_VID3D_SRC_MASK, (u32Src << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_AVFIFO_Src_Select()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/
H A DregTSP.h1173 #define TSP_VID3D_SRC_SHIFT 9UL macro
H A DhalTSP.c2844 …2_R(&_TspCtrl[0].FIFO_Src) & ~TSP_VID3D_SRC_MASK)| (TSP_SRC_FROM_PKTDMXFL << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_PS_Path_Enable()
2995 …Src, (_HAL_REG32_R(&_TspCtrl[0].FIFO_Src) & ~TSP_VID3D_SRC_MASK)| (u32Src << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_AVFIFO_Src_Select()
3020 _HAL_TSP_CMD_Write_HWPCR_Reg(TSP_VID3D_SRC_MASK, (u32Src << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_AVFIFO_Src_Select()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/
H A DregTSP.h1189 #define TSP_VID3D_SRC_SHIFT 9UL macro
H A DhalTSP.c2922 …2_R(&_TspCtrl[0].FIFO_Src) & ~TSP_VID3D_SRC_MASK)| (TSP_SRC_FROM_PKTDMXFL << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_PS_Path_Enable()
3072 …Src, (_HAL_REG32_R(&_TspCtrl[0].FIFO_Src) & ~TSP_VID3D_SRC_MASK)| (u32Src << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_AVFIFO_Src_Select()
3097 _HAL_TSP_CMD_Write_HWPCR_Reg(TSP_VID3D_SRC_MASK, (u32Src << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_AVFIFO_Src_Select()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/
H A DregTSP.h1189 #define TSP_VID3D_SRC_SHIFT 9UL macro
H A DhalTSP.c2883 …2_R(&_TspCtrl[0].FIFO_Src) & ~TSP_VID3D_SRC_MASK)| (TSP_SRC_FROM_PKTDMXFL << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_PS_Path_Enable()
3033 …Src, (_HAL_REG32_R(&_TspCtrl[0].FIFO_Src) & ~TSP_VID3D_SRC_MASK)| (u32Src << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_AVFIFO_Src_Select()
3058 _HAL_TSP_CMD_Write_HWPCR_Reg(TSP_VID3D_SRC_MASK, (u32Src << TSP_VID3D_SRC_SHIFT)); in HAL_TSP_AVFIFO_Src_Select()
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/
H A DregTSP.h1019 #define TSP_VID3D_SRC_SHIFT 9 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DregTSP.h1055 #define TSP_VID3D_SRC_SHIFT 9 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DregTSP.h1057 #define TSP_VID3D_SRC_SHIFT 9 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DregTSP.h1095 #define TSP_VID3D_SRC_SHIFT 9 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregTSP.h1065 #define TSP_VID3D_SRC_SHIFT 9 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregTSP.h1065 #define TSP_VID3D_SRC_SHIFT 9 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DregTSP.h1097 #define TSP_VID3D_SRC_SHIFT 9 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DregTSP.h1065 #define TSP_VID3D_SRC_SHIFT 9 macro

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