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Searched refs:TSP_PVR2_BLOCK_DIS (Results 1 – 25 of 29) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DregTSP.h477 #define TSP_PVR2_BLOCK_DIS 0x00080000 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tsp/
H A DhalTSP.c2820 …_TspCtrl[0].PVR2_Config)|(TSP_PVR2_PVR_ALIGN_EN|TSP_PVR1_BLOCK_DIS|TSP_PVR2_BLOCK_DIS|TSP_V_BLOCK_… in HAL_TSP_HwPatch()
3807 …W(&_TspCtrl[0].PVR2_Config, SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_BLOCK_DIS)); in HAL_TSP_PVR_Fifo_Block_Disable()
3821 …&_TspCtrl[0].PVR2_Config, RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_BLOCK_DIS)); in HAL_TSP_PVR_Fifo_Block_Disable()
H A DregTSP.h478 #define TSP_PVR2_BLOCK_DIS 0x00080000 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/
H A DregTSP.h480 #define TSP_PVR2_BLOCK_DIS 0x00080000UL macro
H A DhalTSP.c3073 TSP_PVR2_BLOCK_DIS | in HAL_TSP_HwPatch()
4167 …W(&_TspCtrl[0].PVR2_Config, SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_BLOCK_DIS)); in HAL_TSP_PVR_Fifo_Block_Disable()
4181 …&_TspCtrl[0].PVR2_Config, RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_BLOCK_DIS)); in HAL_TSP_PVR_Fifo_Block_Disable()
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/
H A DregTSP.h472 #define TSP_PVR2_BLOCK_DIS 0x00080000UL macro
H A DhalTSP.c3047 TSP_PVR2_BLOCK_DIS | in HAL_TSP_HwPatch()
4130 …W(&_TspCtrl[0].PVR2_Config, SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_BLOCK_DIS)); in HAL_TSP_PVR_Fifo_Block_Disable()
4144 …&_TspCtrl[0].PVR2_Config, RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_BLOCK_DIS)); in HAL_TSP_PVR_Fifo_Block_Disable()
/utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/
H A DregTSP.h493 #define TSP_PVR2_BLOCK_DIS 0x00080000UL macro
H A DhalTSP.c3020 …HAL_REG32_R(&_TspCtrl[0].PVR2_Config)|TSP_PVR2_PVR_ALIGN_EN|TSP_PVR1_BLOCK_DIS|TSP_PVR2_BLOCK_DIS); in HAL_TSP_HwPatch()
4319 …W(&_TspCtrl[0].PVR2_Config, SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_BLOCK_DIS)); in HAL_TSP_PVR_Fifo_Block_Disable()
4333 …&_TspCtrl[0].PVR2_Config, RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_BLOCK_DIS)); in HAL_TSP_PVR_Fifo_Block_Disable()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/
H A DregTSP.h495 #define TSP_PVR2_BLOCK_DIS 0x00080000UL macro
H A DhalTSP.c4574 …W(&_TspCtrl[0].PVR2_Config, SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_BLOCK_DIS)); in HAL_TSP_PVR_Fifo_Block_Disable()
4588 …&_TspCtrl[0].PVR2_Config, RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_BLOCK_DIS)); in HAL_TSP_PVR_Fifo_Block_Disable()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/
H A DregTSP.h495 #define TSP_PVR2_BLOCK_DIS 0x00080000UL macro
H A DhalTSP.c3240 …HAL_REG32_R(&_TspCtrl[0].PVR2_Config)|TSP_PVR2_PVR_ALIGN_EN|TSP_PVR1_BLOCK_DIS|TSP_PVR2_BLOCK_DIS); in HAL_TSP_HwPatch()
4591 …W(&_TspCtrl[0].PVR2_Config, SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_BLOCK_DIS)); in HAL_TSP_PVR_Fifo_Block_Disable()
4605 …&_TspCtrl[0].PVR2_Config, RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_BLOCK_DIS)); in HAL_TSP_PVR_Fifo_Block_Disable()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/
H A DregTSP.h502 #define TSP_PVR2_BLOCK_DIS 0x00080000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/
H A DregTSP.h502 #define TSP_PVR2_BLOCK_DIS 0x00080000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/
H A DregTSP.h383 #define TSP_PVR2_BLOCK_DIS 0x00080000 macro
H A DhalTSP.c4305 REG32_SET(&_RegCtrl->PVR2_Config, TSP_PVR2_BLOCK_DIS); in HAL_PVR_Block_Dis()
4319 REG32_CLR(&_RegCtrl->PVR2_Config, TSP_PVR2_BLOCK_DIS); in HAL_PVR_Block_Dis()
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DregTSP.h418 #define TSP_PVR2_BLOCK_DIS 0x00080000 macro
H A DhalTSP.c5685 REG32_SET(&_RegCtrl->PVR2_Config, TSP_PVR2_BLOCK_DIS); in HAL_PVR_Block_Dis()
5705 REG32_CLR(&_RegCtrl->PVR2_Config, TSP_PVR2_BLOCK_DIS); in HAL_PVR_Block_Dis()
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DregTSP.h420 #define TSP_PVR2_BLOCK_DIS 0x00080000 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DregTSP.h452 #define TSP_PVR2_BLOCK_DIS 0x00080000 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregTSP.h450 #define TSP_PVR2_BLOCK_DIS 0x00080000 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregTSP.h450 #define TSP_PVR2_BLOCK_DIS 0x00080000 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DregTSP.h454 #define TSP_PVR2_BLOCK_DIS 0x00080000 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DregTSP.h450 #define TSP_PVR2_BLOCK_DIS 0x00080000 macro

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