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Searched refs:TSP_PVR1_ALIGN_EN (Results 1 – 25 of 29) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DregTSP.h1267 #define TSP_PVR1_ALIGN_EN 0x0200 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tsp/
H A DregTSP.h1252 #define TSP_PVR1_ALIGN_EN 0x00000200 macro
H A DhalTSP.c2808 …1(_HAL_REG32_R(&_TspCtrl[0].HW2_Config3), (/*TSP_VQ2PINGPONG_EN |*/ TSP_PVR1_ALIGN_EN|TSP_RM_PKT_D… in HAL_TSP_HwPatch()
4452 u32flag = TSP_PVR1_ALIGN_EN; in HAL_TSP_PVR_Alignment_Enable()
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/
H A DregTSP.h1249 #define TSP_PVR1_ALIGN_EN 0x00000200UL macro
H A DhalTSP.c3057 (/*TSP_VQ2PINGPONG_EN |*/ TSP_PVR1_ALIGN_EN|TSP_RM_PKT_DEMUX_PIPE))); in HAL_TSP_HwPatch()
4870 u32flag = TSP_PVR1_ALIGN_EN; in HAL_TSP_PVR_Alignment_Enable()
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/
H A DregTSP.h1240 #define TSP_PVR1_ALIGN_EN 0x00000200UL macro
H A DhalTSP.c3031 (/*TSP_VQ2PINGPONG_EN |*/ TSP_PVR1_ALIGN_EN|TSP_RM_PKT_DEMUX_PIPE))); in HAL_TSP_HwPatch()
4834 u32flag = TSP_PVR1_ALIGN_EN; in HAL_TSP_PVR_Alignment_Enable()
/utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/
H A DregTSP.h1301 #define TSP_PVR1_ALIGN_EN 0x00000200UL macro
H A DhalTSP.c3009 (/*TSP_VQ2PINGPONG_EN |*/ TSP_PVR1_ALIGN_EN|TSP_RM_PKT_DEMUX_PIPE))); in HAL_TSP_HwPatch()
5201 u32flag = TSP_PVR1_ALIGN_EN; in HAL_TSP_PVR_Alignment_Enable()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/
H A DregTSP.h1305 #define TSP_PVR1_ALIGN_EN 0x00000200UL macro
H A DhalTSP.c3229 (/*TSP_VQ2PINGPONG_EN |*/ TSP_PVR1_ALIGN_EN|TSP_RM_PKT_DEMUX_PIPE))); in HAL_TSP_HwPatch()
5526 u32flag = TSP_PVR1_ALIGN_EN; in HAL_TSP_PVR_Alignment_Enable()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/
H A DregTSP.h1305 #define TSP_PVR1_ALIGN_EN 0x00000200UL macro
H A DhalTSP.c3229 (/*TSP_VQ2PINGPONG_EN |*/ TSP_PVR1_ALIGN_EN|TSP_RM_PKT_DEMUX_PIPE))); in HAL_TSP_HwPatch()
5543 u32flag = TSP_PVR1_ALIGN_EN; in HAL_TSP_PVR_Alignment_Enable()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/
H A DregTSP.h1327 #define TSP_PVR1_ALIGN_EN 0x00000200UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/
H A DregTSP.h1327 #define TSP_PVR1_ALIGN_EN 0x00000200UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/
H A DregTSP.h1166 #define TSP_PVR1_ALIGN_EN 0x0200 macro
H A DhalTSP.c4220 REG16_SET(&_RegCtrl->HW2_Config3, TSP_PVR1_ALIGN_EN); in HAL_PVR_Alignment_Enable()
4234 REG16_CLR(&_RegCtrl->HW2_Config3, TSP_PVR1_ALIGN_EN); in HAL_PVR_Alignment_Enable()
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DregTSP.h1205 #define TSP_PVR1_ALIGN_EN 0x0200 macro
H A DhalTSP.c5568 REG16_SET(&_RegCtrl->HW2_Config3, TSP_PVR1_ALIGN_EN); in HAL_PVR_Alignment_Enable()
5588 REG16_CLR(&_RegCtrl->HW2_Config3, TSP_PVR1_ALIGN_EN); in HAL_PVR_Alignment_Enable()
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DregTSP.h1207 #define TSP_PVR1_ALIGN_EN 0x0200 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DregTSP.h1263 #define TSP_PVR1_ALIGN_EN 0x0200 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregTSP.h1230 #define TSP_PVR1_ALIGN_EN 0x0200 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregTSP.h1230 #define TSP_PVR1_ALIGN_EN 0x0200 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DregTSP.h1265 #define TSP_PVR1_ALIGN_EN 0x0200 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DregTSP.h1230 #define TSP_PVR1_ALIGN_EN 0x0200 macro

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