| /utopia/UTPA2-700.0.x/modules/dmx/drv/tsp3/ |
| H A D | drvTSP.c | 3241 … HAL_TSP_SetCtrlMode(0, TSP_CTRL_SW_RST, 0);// | TSP_CTRL_CLK_GATING_DISABLE); // Enable TSP CPU in _TSP_Init()
3249 …HAL_TSP_SetCtrlMode(0, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 0);// | TSP_CTRL_CLK_GATING_DISABLE); //… in _TSP_Init()
3268 …HAL_TSP_SetCtrlMode(0, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 0);// | TSP_CTRL_CLK_GATING_DISABLE); //… in _TSP_Init()
3749 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 0); in MDrv_TSP_SetOperateMode()
3756 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 1); in MDrv_TSP_SetOperateMode()
3762 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 2); in MDrv_TSP_SetOperateMode()
3767 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 3); in MDrv_TSP_SetOperateMode()
3773 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 3); in MDrv_TSP_SetOperateMode()
3785 … HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST| TSP_CTRL_TSFILE_EN, TSP_IF_NUM); in MDrv_TSP_SetOperateMode()
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/messi/tsp/ |
| H A D | halTSP.c | 1042 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
1050 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
1959 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_TSP_Ind_Enable()
2711 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
2718 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
|
| H A D | regTSP.h | 714 #define TSP_CTRL_SW_RST 0x00000002UL macro
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/mooney/tsp/ |
| H A D | halTSP.c | 1046 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
1054 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
1983 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_TSP_Ind_Enable()
2730 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
2737 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
|
| H A D | regTSP.h | 710 #define TSP_CTRL_SW_RST 0x00000002UL macro
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/mainz/tsp/ |
| H A D | halTSP.c | 1043 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
1051 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
1960 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_TSP_Ind_Enable()
2715 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
2722 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
|
| H A D | regTSP.h | 714 #define TSP_CTRL_SW_RST 0x00000002UL macro
|
| /utopia/UTPA2-700.0.x/modules/dmx/drv/tsp/ |
| H A D | drvTSP.c | 3700 … HAL_TSP_SetCtrlMode(0, TSP_CTRL_SW_RST, 0);// | TSP_CTRL_CLK_GATING_DISABLE); // Enable TSP CPU
3707 …HAL_TSP_SetCtrlMode(0, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 0);// | TSP_CTRL_CLK_GATING_DISABLE); //…
3720 …HAL_TSP_SetCtrlMode(0, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 0);// | TSP_CTRL_CLK_GATING_DISABLE); //…
4080 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 0);
4095 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 0);
4168 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 1);
4227 … HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST| TSP_CTRL_TSFILE_EN, TSP_IF_NUM);
4317 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 2);
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tsp/ |
| H A D | halTSP.c | 1442 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
1450 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
2757 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_TSP_Ind_Enable()
3841 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
3848 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
|
| H A D | regTSP.h | 833 #define TSP_CTRL_SW_RST 0x00000002 macro
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/ |
| H A D | halTSP.c | 1470 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
1478 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
2968 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_TSP_Ind_Enable()
4164 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
4171 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
|
| H A D | regTSP.h | 829 #define TSP_CTRL_SW_RST 0x00000002UL macro
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/ |
| H A D | halTSP.c | 1484 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
1492 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
3003 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_TSP_Ind_Enable()
4201 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
4208 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
|
| H A D | regTSP.h | 839 #define TSP_CTRL_SW_RST 0x00000002UL macro
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/ |
| H A D | halTSP.c | 1437 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
1445 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
2939 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_TSP_Ind_Enable()
4353 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
4360 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
|
| H A D | regTSP.h | 861 #define TSP_CTRL_SW_RST 0x00000002UL macro
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/ |
| H A D | halTSP.c | 1506 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
1514 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
3159 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_TSP_Ind_Enable()
4625 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
4632 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
|
| H A D | regTSP.h | 865 #define TSP_CTRL_SW_RST 0x00000002UL macro
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/ |
| H A D | halTSP.c | 1506 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
1514 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
3159 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_TSP_Ind_Enable()
4608 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
4615 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
|
| H A D | regTSP.h | 865 #define TSP_CTRL_SW_RST 0x00000002UL macro
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/ |
| H A D | halTSP.c | 1563 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
1571 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
3235 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_TSP_Ind_Enable()
4695 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
4702 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
|
| H A D | regTSP.h | 872 #define TSP_CTRL_SW_RST 0x00000002UL macro
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/ |
| H A D | halTSP.c | 1524 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
1532 TSP_CTRL_SW_RST | in HAL_TSP_SetCtrlMode()
3196 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_TSP_Ind_Enable()
4656 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
4663 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].TSP_Ctrl), TSP_CTRL_SW_RST)); in HAL_ResetAll()
|
| H A D | regTSP.h | 872 #define TSP_CTRL_SW_RST 0x00000002UL macro
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/ |
| H A D | regTSP.h | 818 #define TSP_CTRL_SW_RST 0x0002 macro
|