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77 //<MStar Software>
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93 ///////////////////////////////////////////////////////////////////////////////
94
95 ///////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// file drvTSP.c
98 /// @brief Transport Stream Processer (TSP) Driver Interface
99 /// @author MStar Semiconductor,Inc.
100 /// @attention
101 /// All TSP DDI are not allowed to use in any interrupt context other than TSP ISR and Callback
102 ///////////////////////////////////////////////////////////////////////////////////////////////////
103
104
105 //-------------------------------------------------------------------------------------------------
106 // Include Files
107 //-------------------------------------------------------------------------------------------------
108 #ifdef MSOS_TYPE_LINUX_KERNEL
109 #include <linux/sched.h>
110 #include <linux/wait.h>
111 #include <linux/string.h>
112 #else
113 #include <string.h>
114 #endif
115
116 // Common Definition
117 #include "MsVersion.h"
118 #include "drvMMIO.h"
119 #include "ULog.h"
120 #include "drvSYS.h"
121
122 // Internal Definition
123 #include "asmCPU.h"
124 #include "osalTSP.h"
125 #include "regTSP.h"
126 #include "halTSP.h"
127 #include "drvTSP.h"
128
129 #if DMX_DEBUG
130 #include "../../api/dmx/Internal_DMX_debug.h"
131 #endif
132
133 #ifdef MSOS_TYPE_LINUX
134 #include <sys/ioctl.h>
135 #include <unistd.h>
136 #include <fcntl.h> // O_RDWR
137 #include "mdrv_firmware_io.h"
138 #endif
139
140 #ifdef SECURE_PVR_ENABLE
141 #include "halCHIP.h"
142 #include "../../drv/mbx/apiMBX_St.h"
143 #include "../../drv/mbx/apiMBX.h"
144 #include "../drv/sys/tee_client_api.h"
145 #endif
146
147 #ifdef MSOS_TYPE_LINUX_KERNEL
148 static MS_U8 u8TSPFirmware[] = {
149 #include "fwTSP.dat"
150 };
151 #endif
152
153 //-------------------------------------------------------------------------------------------------
154 // Driver Compiler Options
155 //-------------------------------------------------------------------------------------------------
156
157
158 //-------------------------------------------------------------------------------------------------
159 // Local Defines
160 //-------------------------------------------------------------------------------------------------
161 #define _TSP_SetEvent(eventid, flag) OSAL_TSP_EventSet(eventid, (flag))
162 #define _TSP_GetEvent(eventid, events, flag, opt, timeout) OSAL_TSP_EventGet(eventid, (flag), &(events), (opt), (timeout))
163
164 #define _TSP_SetSecRdyId(fltid) OSAL_TSP_EventSet(_s32TspSecRdyId[fltid>>5], (1UL<<(fltid&0x1FUL)))
165 #define _TSP_GetSecRdyId(fltid, events, opt) OSAL_TSP_EventGet(_s32TspSecRdyId[fltid>>5], (1UL<<(fltid&0x1FUL)), (events), (opt), 0)
166 #define _TSP_GetModeSecRdy(idx, mask,events, opt) OSAL_TSP_EventGet(_s32TspSecRdyId[idx], mask, (events), (opt), 0)
167
168 #define _TSP_SetSecOvfId(fltid) OSAL_TSP_EventSet(_s32TspSecOvfId[fltid>>5], (1UL<<(fltid&0x1FUL)))
169 #define _TSP_GetSecOvfId(fltid, events, opt) OSAL_TSP_EventGet(_s32TspSecOvfId[fltid>>5], (1UL<<(fltid&0x1FUL)), (events), (opt), 0)
170 #define _TSP_GetModeSecOvf(idx, mask,events, opt) OSAL_TSP_EventGet(_s32TspSecOvfId[idx], mask, (events), (opt), 0)
171
172 #define _TSP_SetSecCrcId(fltid) OSAL_TSP_EventSet(_s32TspSecCrcId[fltid>>5], (1UL<<(fltid&0x1FUL)))
173 #define _TSP_GetSecCrcId(fltid, events, opt) OSAL_TSP_EventGet(_s32TspSecCrcId[fltid>>5], (1UL<<(fltid&0x1FUL)), (events), (opt), 0)
174 #define _TSP_GetModeSecCrc(idx, mask,events, opt) OSAL_TSP_EventGet(_s32TspSecCrcId[idx], mask, (events), (opt), 0)
175
176 #define _TSP_SetFltDisableId(fltid) OSAL_TSP_EventSet(_s32TspFltDisableId[fltid>>5], (1UL<<(fltid&0x1FUL)))
177 #define _TSP_GetFltDisableId(fltid, events, opt) OSAL_TSP_EventGet(_s32TspFltDisableId[fltid>>5], (1UL<<(fltid&0x1FUL)), (events), (opt), 0)
178 #define _TSP_GetModeFltDisable(idx, mask,events, opt) OSAL_TSP_EventGet(_s32TspFltDisableId[idx], mask, (events), (opt), 0)
179
180 #if 0
181 #define _TSP_FLAG_FREE_TIMEOUT 4
182 #define _TSP_SetEventFree0Id(fltid) OSAL_TSP_EventSet(_s32EventFree0[fltid>>5], (1<<(fltid&0x1F)))
183 #define _TSP_GetEventFree0Id(fltid, events, opt) OSAL_TSP_EventGet(_s32EventFree0[fltid>>5], (1<<(fltid&0x1F)), (events), (opt), 0)
184 #define _TSP_GetModeEventFree0(idx, mask,events, opt) OSAL_TSP_EventGet(_s32EventFree0[idx], mask, (events), (opt), 0)
185 #define _TSP_FLAG_SetDone(fltid) OSAL_TSP_EventSet(_s32DoneFlags[fltid>>5], (1<<(fltid&0x1F)))
186 #define _TSP_FLAG_GetDone(fltid, events, opt) OSAL_TSP_EventGet(_s32DoneFlags[fltid>>5], (1<<(fltid&0x1F)), (events), (opt), _TSP_FLAG_FREE_TIMEOUT)
187 #endif
188
189 #if 0
190 #define _TSP_SetEventFreeDefer0Id(fltid) OSAL_TSP_EventSet(_s32EventFreeDefer0[fltid>>5], (1<<(fltid&0x1F)))
191 #define _TSP_GetEventFreeDefer0Id(fltid, events, opt) OSAL_TSP_EventGet(_s32EventFreeDefer0[fltid>>5], (1<<(fltid&0x1F)), (events), (opt), 0)
192 #define _TSP_GetEventFreeDefer0(idx, mask,events, opt) OSAL_TSP_EventGet(_s32EventFreeDefer0[idx], mask, (events), (opt), 0)
193 #endif
194
195 // for mutiple process using, record which filter is enabled by this process
196 #define _TSP_SetSecNotifyId(fltid) (_u32SecNotifyId[(fltid>>5)] |= (1UL << (fltid&0x1FUL)))
197 #define _TSP_RemoveSecNotifyId(fltid) (_u32SecNotifyId[(fltid>>5)] &= ~(1UL << (fltid&0x1FUL)))
198 #define _TSP_ChkSecNotifyId(fltid) (_u32SecNotifyId[(fltid>>5)] & (1UL << (fltid&0x1FUL)))
199
200 // for mutiple process using, record which pvr engine is enabled by this process
201 #ifndef NO_PVR
202 #define _TSP_SetPvrNotifyId(fltid) (_u32PvrNotifyId[(fltid>>5)] |= (1UL << (fltid&0x1FUL)))
203 #define _TSP_RemovePvrNotifyId(fltid) (_u32PvrNotifyId[(fltid>>5)] &= ~(1UL << (fltid&0x1FUL)))
204 #define _TSP_ChkPvrNotifyId(fltid) (_u32PvrNotifyId[(fltid>>5)] & (1UL << (fltid&0x1FUL)))
205 #endif
206
207 // for mutiple process using, record which hw pcr is enabled by this process
208 #if (defined(HWPCR_ENABLE) && (TSP_HWPCR_BY_HK == 1))
209 #define _TSP_SetHwPcrNotifyId(fltid) (_u32HwPcrNotifyId[(fltid>>5)] |= (1UL << (fltid&0x1FUL)))
210 #define _TSP_RemoveHwPcrNotifyId(fltid) (_u32HwPcrNotifyId[(fltid>>5)] &= ~(1UL << (fltid&0x1FUL)))
211 #define _TSP_ChkHwPcrNotifyId(fltid) (_u32HwPcrNotifyId[(fltid>>5)] & (1UL << (fltid&0x1FUL)))
212 #endif
213
214 #define _TSP_MUTEX_TIMEOUT 10000UL //OSAL_TSP_MUTEX_TIMEOUT
215
216 // For kernel STR callback function, should not use mutex
217 #define _TSP_ENTRY() do{ \
218 while (!OSAL_TSP_MutexObtain(_ptsp_res->_s32TspMutexId, _TSP_MUTEX_TIMEOUT)) \
219 { \
220 _ptsp_res->_u32LastErr = DRVTSP_FUNC_ERROR; \
221 printf("TSP FATAL ERR: [%s][%d] TSP mutex get error\n", __FUNCTION__, __LINE__); \
222 MsOS_DelayTask(1); \
223 } \
224 while(!OSAL_TSP_MutexObtain(_ptsp_res->_s32IndMutexId, _TSP_MUTEX_TIMEOUT)) \
225 { \
226 _ptsp_res->_u32LastErr = DRVTSP_FUNC_ERROR; \
227 printf("TSP FATAL ERR: [%s][%d] IND mutex get error\n", __FUNCTION__, __LINE__); \
228 MsOS_DelayTask(1); \
229 } \
230 }while(0);
231
232 #define _TSP_RETURN(_ret) do { \
233 if(!OSAL_TSP_MutexRelease(_ptsp_res->_s32IndMutexId)) \
234 { \
235 printf("TSP FATAL ERR: [%s][%d] IND mutex free error\n", __FUNCTION__, __LINE__); \
236 } \
237 if(!OSAL_TSP_MutexRelease(_ptsp_res->_s32TspMutexId)) \
238 { \
239 printf("TSP FATAL ERR: [%s][%d] TSP mutex free error\n", __FUNCTION__, __LINE__); \
240 } \
241 if (_ret != DRVTSP_OK) { _ptsp_res->_u32LastErr = _ret; } \
242 return _ret; \
243 }while(0); // Should be optimized by compiler
244
245 #define _TSP_IND_LOCK() while(!OSAL_TSP_MutexObtain(_ptsp_res->_s32IndMutexId, _TSP_MUTEX_TIMEOUT)) \
246 { \
247 printf("TSP FATAL ERR: [%s][%d] IND mutex get error\n", __FUNCTION__, __LINE__); \
248 MsOS_DelayTask(1); \
249 }
250
251 #define _TSP_IND_UNLOCK() if(!OSAL_TSP_MutexRelease(_ptsp_res->_s32IndMutexId)) { printf("TSP FATAL ERR: [%s][%d] IND mutex free error\n", __FUNCTION__, __LINE__); }
252
253 #define _TSP_INT_LOCK() while(!OSAL_TSP_MutexObtain(_ptsp_res->_s32IntRegMutexId, _TSP_MUTEX_TIMEOUT)) \
254 { \
255 printf("TSP FATAL ERR: [%s][%d] INT mutex get error\n", __FUNCTION__, __LINE__); \
256 MsOS_DelayTask(1); \
257 }
258
259 #define _TSP_INT_UNLOCK() if(!OSAL_TSP_MutexRelease(_ptsp_res->_s32IntRegMutexId)) { printf("TSP FATAL ERR: [%s][%d] INT mutex free error\n", __FUNCTION__, __LINE__); }
260
261 #define _TSP_EXT_LOCK() while((_s32ExtMutexId != -1) && (!OSAL_TSP_MutexObtain(_s32ExtMutexId, _TSP_MUTEX_TIMEOUT))) \
262 { \
263 printf("TSP FATAL ERR: [%s][%d] EXT mutex get error %x %x %d\n", __FUNCTION__, __LINE__, (int)_s32ExtMutexId, (int)_s32TspTaskId, (int)_db_flag); \
264 MsOS_DelayTask(3); \
265 }
266
267 #define _TSP_EXT_UNLOCK() if((_s32ExtMutexId != -1) && (!OSAL_TSP_MutexRelease(_s32ExtMutexId))){ printf("TSP FATAL ERR: [%s][%d] EXT mutex free error %x %x %d\n", __FUNCTION__, __LINE__, (int)_s32ExtMutexId, (int)_s32TspTaskId, (int)_db_flag); }
268
269 // For kernel STR callback function, should not use mutex
270 #ifdef MSOS_TYPE_LINUX_KERNEL
271
272 #define _TSP_STR_ENTRY() if(_ptsp_res->_bKerStrSuspend == FALSE){ \
273 while (!OSAL_TSP_MutexObtain(_ptsp_res->_s32TspMutexId, _TSP_MUTEX_TIMEOUT)) \
274 { \
275 if(_u32TSPDGBLevel >= E_DRVTSP_DBG_L1) { printf("[%s][%d] TSP mutex get error\n", __FUNCTION__, __LINE__); } \
276 _ptsp_res->_u32LastErr = DRVTSP_FUNC_ERROR; \
277 MsOS_DelayTask(3); \
278 } \
279 while(!OSAL_TSP_MutexObtain(_ptsp_res->_s32IndMutexId, _TSP_MUTEX_TIMEOUT)) \
280 { \
281 if(_u32TSPDGBLevel >= E_DRVTSP_DBG_L1) { printf("[%s][%d] IND mutex get error\n", __FUNCTION__, __LINE__); } \
282 _ptsp_res->_u32LastErr = DRVTSP_FUNC_ERROR; \
283 MsOS_DelayTask(3); \
284 } \
285 }
286
287 #define _TSP_STR_RETURN(_ret) do{ \
288 if(_ptsp_res->_bKerStrSuspend == TRUE){ return _ret; } \
289 if(!OSAL_TSP_MutexRelease(_ptsp_res->_s32IndMutexId)) \
290 { \
291 if(_u32TSPDGBLevel >= E_DRVTSP_DBG_L1) { printf("[%s][%d] IND mutex free error\n", __FUNCTION__, __LINE__); } \
292 } \
293 if(!OSAL_TSP_MutexRelease(_ptsp_res->_s32TspMutexId)) \
294 { \
295 if(_u32TSPDGBLevel >= E_DRVTSP_DBG_L1) { printf("[%s][%d] TSP mutex free error\n", __FUNCTION__, __LINE__); } \
296 } \
297 if (_ret != DRVTSP_OK) { _ptsp_res->_u32LastErr = _ret; } \
298 return _ret; \
299 }while(0); // Should be optimized by compiler
300
301 #else //else MSOS_TYPE_LINUX_KERNEL
302
303 #define _TSP_STR_ENTRY _TSP_ENTRY
304 #define _TSP_STR_RETURN(_ret) _TSP_RETURN(_ret)
305
306 #endif //MSOS_TYPE_LINUX_KERNEL
307
308
309 #define TSP_ASSERT(_bool, _f) if(!(_bool)){ \
310 if (_u32TSPDGBLevel == E_DRVTSP_DBG_L1) { (_f); return DRVTSP_FAIL;} \
311 else if (_u32TSPDGBLevel == E_DRVTSP_DBG_L2) { (_f); MsOS_DelayTask(MSOS_WAIT_FOREVER); return DRVTSP_FAIL;} \
312 else {return DRVTSP_FAIL;} \
313 }
314
315 #define TSP_ASSERT2(_bool, _f) if(!(_bool)){ \
316 if (_u32TSPDGBLevel == E_DRVTSP_DBG_L1) { (_f); _TSP_STR_RETURN(DRVTSP_FAIL);} \
317 else if (_u32TSPDGBLevel == E_DRVTSP_DBG_L2) { (_f); MsOS_DelayTask(MSOS_WAIT_FOREVER); _TSP_STR_RETURN(DRVTSP_FAIL);} \
318 else {_TSP_STR_RETURN(DRVTSP_FAIL);} \
319 }while(0);
320
321 #define TSP_DBG(_f, _a...) { if ((_u32TSPDGBLevel == E_DRVTSP_DBG_L1)||(_u32TSPDGBLevel == E_DRVTSP_DBG_L2)) { OSAL_TSP_Print("[TSP_DBG]"); OSAL_TSP_Print(_f, ##_a); } }
322
323
324 #define DRVTSP_MAP_NULL 0xFFFFFFFFUL
325
326 #define DRVTSP_MAX_PROCESS_NUM (10)
327
328 #ifdef MSOS_TYPE_LINUX_KERNEL
329 #define current get_current()
330 #endif
331
332 //-------------------------------------------------------------------------------------------------
333 // Local Structures
334 //-------------------------------------------------------------------------------------------------
335
336 //----------------
337 //For Tee
338 //----------------
339 #ifdef SECURE_PVR_ENABLE
340 typedef enum
341 {
342 E_TSP_TEE_TO_REE_MBX_MSG_NULL,
343 E_TSP_TEE_TO_REE_MBX_ACK_MSG_INVALID,
344 E_TSP_TEE_TO_REE_MBX_ACK_MSG_NO_TEE,
345 E_TSP_TEE_TO_REE_MBX_ACK_MSG_ACTION_SUCCESS,
346 E_TSP_TEE_TO_REE_MBX_ACK_MSG_ACTION_FAIL
347 } TSP_TEE_TO_REE_MBX_ACK_TYPE;
348 #endif
349
350 //--------------------------------------------------------
351 // Total 128 PID filters
352 // First 0~63 for section
353 //--------------------------------------------------------
354 typedef struct _DrvTSP_State
355 {
356 DrvTSP_SW_Status TSPStatus;
357 DrvTSP_FltState FltState[TSP_PIDFLT_NUM_ALL];
358 DrvTSP_FltType FltType[TSP_PIDFLT_NUM_ALL];
359 MS_U32 FltSource[TSP_PIDFLT_NUM_ALL];
360 MS_U32 FltMap[TSP_PIDFLT_NUM_ALL];
361 DrvTSP_FltState SecFltState[TSP_SECFLT_NUM];
362 DrvTSP_Event SecFltEvtNotify[TSP_SECFLT_NUM];
363 P_DrvTSP_EvtCallback SecFltCallback[TSP_SECFLT_NUM];
364 DrvTSP_FltState SecBufState[TSP_SECFLT_NUM];
365 DrvTSP_FltMode SecFltMode[TSP_SECFLT_NUM];
366
367 MS_S32 s32TspEvtId[TSP_SECFLT_NUM];
368
369 #ifdef MERGE_STR_SUPPORT
370 MS_U32 FltSrcId[TSP_PIDFLT_NUM_ALL];
371 #endif
372
373 #ifdef DUP_PIDFLT
374 MS_U32 DupFlt[TSP_PIDFLT_NUM];
375 #endif
376 } DrvTSP_State;
377
378 typedef struct
379 {
380 MS_PHY phyBufAddr;
381 MS_U32 u32Size;
382 MS_PHY phyReadPos;
383 MS_PHY phyWritePos;
384 MS_BOOL bEnable;
385 } DrvTSP_FW_DBG_INFO;
386
387 typedef struct _DrvTSP_DscmbFlt_State
388 {
389 MS_U32 u32Src;
390 MS_U32 u32Start;
391 MS_U32 u32End;
392 MS_U32 u32ShareStart;
393 MS_U32 u32ShareEnd;
394 }DrvTSP_DscmbFlt_State;
395
396 #if (defined(HWPCR_ENABLE) && (TSP_HWPCR_BY_HK == 1))
397 typedef struct _DrvTSP_HWPcrParams
398 {
399 MS_U8 _u8ResetPcr[TSP_PCRFLT_NUM];
400 MS_U32 _u32PrevStcBase[TSP_PCRFLT_NUM];
401 MS_U32 _u32PrevPllControl[TSP_PCRFLT_NUM];
402 }DrvTSP_HWPcrParams;
403 #endif
404
405 //UFO_DMX_RES_ALLOC_EN - FOR STC
406 typedef struct _DrvTSP_Stc_State
407 {
408 MS_U32 u32PcrFltId;
409 MS_U32 u32SrcType;
410 MS_BOOL bUsed;
411 }DrvTSP_Stc_State;
412
413 #ifdef DMX_UTOPIA_2K
414 typedef struct _DrvTSP_KMode_ProcEvtIdTbl
415 {
416 #ifdef MSOS_TYPE_LINUX_KERNEL
417 pid_t tgid;
418 #endif
419
420 MS_S32 s32TspEvtId;
421 }DrvTSP_KMode_ProcEvtIdTbl;
422 #endif
423
424 typedef struct _TSP_RESOURCE_PRIVATE
425 {
426 MS_S32 _s32TspMutexId;
427 MS_S32 _s32IndMutexId;
428 MS_S32 _s32IntRegMutexId;
429
430 MS_U32 _u32LastErr;
431 MS_BOOL _bKerStrSuspend;
432 MS_U32 _u32ProcessNum;
433 DrvTSP_State _TspState[TSP_ENGINE_NUM];
434
435 MS_BOOL _bSWInitReady;
436 MS_PHY _phyFwAddr;
437 MS_U32 _u32FwSize;
438 MS_U32 _u32DbgIntrCount;
439 DrvTSP_If_Set _ifset_save;
440
441 DrvTSP_Event _PvrEvtNotify[TSP_PVR_IF_NUM];
442 P_DrvTSP_EvtCallback _PvrCallback[TSP_PVR_IF_NUM];
443 MS_S32 _s32PvrEvtId[TSP_PVR_IF_NUM];
444
445 #if (defined(HWPCR_ENABLE) && (TSP_HWPCR_BY_HK == 1))
446 DrvTSP_HWPcrParams TSPHwPcrParams;
447 #endif
448
449 DrvTSP_DscmbFlt_State _DscmbFlt_State[TSP_CA_ENGINE_NUM];
450
451 MS_PHY _phyTspFWDramBuf;
452 MS_U32 _u32TspFwDramBufSize;
453 DrvTSP_Stc_State _TspStcState[TSP_STC_NUM];
454 MS_BOOL _bStcAllocDisable;
455 MS_U32 _u32StcAdjustUnit;
456
457 #ifdef SECURE_PVR_ENABLE
458 SYS_TEEINFO _teemode;
459 DrvTSP_SecureBuf _stSecBuf;
460 #endif
461
462 }TSP_RESOURCE_PRIVATE;
463
464 //-------------------------------------------------------------------------------------------------
465 // Global Variables
466 //-------------------------------------------------------------------------------------------------
467 static MSIF_Version _drv_tsp_version = {
468 .DDI = { TSP_DRV_VERSION, },
469 };
470
471 #ifndef TSP_UTOPIA_20
472 static TSP_RESOURCE_PRIVATE _tsp_res = {
473 ._s32TspMutexId = -1,
474 ._s32IndMutexId = -1,
475 ._s32IntRegMutexId = -1,
476
477 ._u32LastErr = DRVTSP_OK,
478 ._bKerStrSuspend = FALSE,
479 ._u32ProcessNum = 0,
480 ._bSWInitReady = FALSE,
481 ._phyFwAddr = 0,
482 ._u32FwSize = 0,
483 ._u32DbgIntrCount = 0,
484 ._ifset_save = {E_DRVTSP_PAD_EXT_INPUT0, FALSE, TRUE, TRUE},
485
486 ._PvrEvtNotify = {[0 ... (TSP_PVR_IF_NUM-1)] = E_DRVTSP_EVENT_DATA_INIT},
487 ._PvrCallback = {[0 ... (TSP_PVR_IF_NUM-1)] = 0},
488 ._s32PvrEvtId = {[0 ... (TSP_PVR_IF_NUM-1)] = -1},
489
490 #if (defined(HWPCR_ENABLE) && (TSP_HWPCR_BY_HK == 1))
491 .TSPHwPcrParams = {
492 ._u8ResetPcr = {[0 ... (TSP_PCRFLT_NUM-1)] = 3},
493 ._u32PrevStcBase = {[0 ... (TSP_PCRFLT_NUM-1)] = 0},
494 ._u32PrevPllControl = {[0 ... (TSP_PCRFLT_NUM-1)] = 0},
495 },
496 #endif
497
498 ._phyTspFWDramBuf = 0,
499 ._u32TspFwDramBufSize = 0,
500 ._sTspStcState = {[0 ... (TSP_STC_NUM-1)] = {0xFFFFFFFF, FALSE}},
501 ._bStcAllocDisable = FALSE,
502 _u32StcAdjustUnit = 100,
503
504
505 #ifdef SECURE_PVR_ENABLE
506 ._teemode = {.OsType = SYS_TEEINFO_OSTYPE_NOTEE},
507 ._stSecBuf = {0, 0, 0, 0},
508 #endif
509 };
510
511 static TSP_RESOURCE_PRIVATE* _ptsp_res = &_tsp_res;
512 #else
513 static TSP_RESOURCE_PRIVATE* _ptsp_res = NULL;
514 #endif
515
516 static MS_U8 _db_flag = 0;
517 static MS_S32 _s32ExtMutexId = -1; //For exiting ISR process task
518 static MS_S32 _s32TspEventId = -1;
519 static MS_S32 _s32TspSecRdyId[(TSP_SECFLT_NUM+31UL)>>5UL] = {[0 ... (((TSP_SECFLT_NUM+31UL)>>5UL)-1UL)] = -1};
520 static MS_S32 _s32TspSecOvfId[(TSP_SECFLT_NUM+31UL)>>5UL] = {[0 ... (((TSP_SECFLT_NUM+31UL)>>5UL)-1UL)] = -1};
521 static MS_S32 _s32TspSecCrcId[(TSP_SECFLT_NUM+31UL)>>5UL] = {[0 ... (((TSP_SECFLT_NUM+31UL)>>5UL)-1UL)] = -1};
522 static MS_S32 _s32TspFltDisableId[(TSP_SECFLT_NUM+31UL)>>5UL] = {[0 ... (((TSP_SECFLT_NUM+31UL)>>5)-1UL)] = -1};
523 //static MS_S32 _s32EventFree0[(TSP_PIDFLT_NUM_ALL+31)>>5] = {[0 ... (((TSP_PIDFLT_NUM_ALL+31)>>5)-1)] = -1};
524 //static MS_S32 _s32DoneFlags[(TSP_PIDFLT_NUM_ALL+31)>>5] = { [0 ... (((TSP_PIDFLT_NUM_ALL+31)>>5)-1)] = -1};
525 //static MS_S32 _s32EventFreeDefer0[(TSP_PIDFLT_NUM_ALL+31)>>5] = {[0 ... (((TSP_SECFLT_NUM+31)>>5)-1)] = -1};
526 static MS_U32 _u32SecNotifyId[(TSP_SECFLT_NUM+31UL)>>5UL] = {0UL}; //for ISR processing
527
528 #ifndef NO_PVR
529 static MS_U32 _u32PvrNotifyId[(TSP_PVR_IF_NUM+31UL)>>5UL] = {0UL};
530 #endif
531
532 static MS_S32 _s32TspTaskId = -1;
533 MS_U32 _u32IntNum = E_INT_IRQ_TSP2HK;
534 MS_U32 _u32TaskLine = 0;
535 static DrvTSP_DbgLevel _u32TSPDGBLevel = E_DRVTSP_DBG_L1;
536
537 static MS_BOOL _bBankInit = FALSE;
538
539 #ifdef MSOS_TYPE_LINUX_KERNEL
540 wait_queue_head_t tsp_wq_head[TSP_SECFLT_NUM];
541 #endif // MSOS_TYPE_LINUX_KERNEL
542
543 #ifdef DMX_UTOPIA_2K
544 static DrvTSP_KMode_ProcEvtIdTbl _stKModePrcEvtTbl[DRVTSP_MAX_PROCESS_NUM];
545 static MS_U32 _u32KPrcEvtTblUseFlag = 0;
546 #endif
547
548 static DrvTSP_FW_DBG_INFO _FwDbgInfo;
549 static MS_U32 _u32LibMode = DRVTSP_CMD_LIB_MODE_USER;
550
551 //----- For optee ------------------
552 #ifdef SECURE_PVR_ENABLE
553 #define MSTAR_UPA_DMXTA_UUID {0x7a7c8b61, 0x5d74, 0x4b6c, {0xb2, 0xa9, 0x92, 0xe4, 0x9c, 0xe8, 0x66, 0xbd} }
554 #define SYS_TEEC_OPERATION_INITIALIZER { 0 }
555
556 static const char optee_dmx[] = "opteearmtz00";
557 char *_device = (char *)optee_dmx;
558 TEEC_Context mstar_teec_ctx;
559 TEEC_Session session = { 0 };
560 TEEC_UUID uuid = MSTAR_UPA_DMXTA_UUID;
561 TEEC_Operation op = SYS_TEEC_OPERATION_INITIALIZER;
562 #endif //SECURE_PVR_ENABLE
563
564 static void _DumpFwMsg(void);
565 //-------------------------------------------------------------------------------------------------
566 // Local Functions
567 //-------------------------------------------------------------------------------------------------
568 #if 0
_TSP_GetTrailOne64(MS_U64 u64Flags)569 static MS_U32 _TSP_GetTrailOne64(MS_U64 u64Flags)
570 {
571 MS_U32 u32Temp = (MS_U32)(u64Flags & 0xFFFFFFFF);
572
573 if (u32Temp)
574 {
575 return MAsm_CPU_GetTrailOne(u32Temp);
576 }
577 return (32 + MAsm_CPU_GetTrailOne((MS_U32)(u64Flags>> 32)));
578 }
579 #endif
580
581 #ifdef MSOS_TYPE_LINUX_KERNEL
582 extern MS_PHY MDrv_FW_TSP_Addr(void);
583 extern MS_U32 MDrv_FW_TSP_Size(void);
584 #endif
585
586 //For Optee
587 #ifdef SECURE_PVR_ENABLE
588 extern MS_U32 MDrv_SYS_TEEC_InitializeContext(const char *name, TEEC_Context *context);
589 extern MS_U32 MDrv_SYS_TEEC_Open(TEEC_Context *context, TEEC_Session *session, const TEEC_UUID *destination, MS_U32 connection_method, const void *connection_data, TEEC_Operation *operation, MS_U32 *error_origin);
590 extern MS_U32 MDrv_SYS_TEEC_InvokeCmd(TEEC_Session *session, MS_U32 cmd_id, TEEC_Operation *operation, MS_U32 *error_origin);
591 extern void MDrv_SYS_TEEC_Close(TEEC_Session *session);
592 extern void MDrv_SYS_TEEC_FinalizeContext(TEEC_Context *context);
593 #endif
594
_TSP_GetFirmware(MS_PHY * pphyAddr,MS_U32 * pu32Size)595 static MS_BOOL _TSP_GetFirmware(MS_PHY* pphyAddr, MS_U32* pu32Size)
596 {
597 #ifdef MSOS_TYPE_LINUX
598 MS_S32 s32Fd;
599 #endif
600
601 if (_ptsp_res->_u32FwSize)
602 {
603 *pphyAddr = _ptsp_res->_phyFwAddr;
604 *pu32Size = _ptsp_res->_u32FwSize;
605 return TRUE;
606 }
607
608 #ifdef MSOS_TYPE_LINUX
609 if (0> (s32Fd = open("/dev/fw", O_RDWR)))
610 {
611 TSP_DBG("[%s][%d] open fail /dev/fw\n", __FUNCTION__, __LINE__);
612 MS_ASSERT(0);
613 return FALSE;
614 }
615 if (ioctl(s32Fd, FW_IOC_TSP_ADDR, pphyAddr))
616 {
617 TSP_DBG("[%s][%d] FW_IOC_TSP_ADDR\n", __FUNCTION__, __LINE__);
618 MS_ASSERT(0);
619 close(s32Fd);
620 return FALSE;
621 }
622 if (ioctl(s32Fd, FW_IOC_TSP_SIZE, pu32Size))
623 {
624 TSP_DBG("[%s][%d] FW_IOC_TSP_SIZE\n", __FUNCTION__, __LINE__);
625 MS_ASSERT(0);
626 close(s32Fd);
627 return FALSE;
628 }
629 close(s32Fd);
630 return TRUE;
631 #elif defined (MSOS_TYPE_LINUX_KERNEL)
632 //*pphyAddr = MDrv_FW_TSP_Addr();
633 //*pu32Size = MDrv_FW_TSP_Size();
634 return TRUE;
635 #else
636 return FALSE;
637 #endif
638 }
639
_TSP_CmdQ_Init(void)640 static void _TSP_CmdQ_Init(void)
641 {
642 while (HAL_TSP_CmdQ_CmdCount()); // wait command finish
643 }
644
_TSP_InitResource(TSP_RESOURCE_PRIVATE * presource)645 static MS_BOOL _TSP_InitResource(TSP_RESOURCE_PRIVATE* presource)
646 {
647 MS_U32 u32ii = 0;
648
649 if(presource == NULL)
650 {
651 return FALSE;
652 }
653
654 presource->_s32TspMutexId = -1;
655 presource->_s32IndMutexId = -1;
656 presource->_s32IntRegMutexId = -1;
657
658 presource->_u32LastErr = 1;
659 presource->_bKerStrSuspend = FALSE;
660
661 presource->_u32ProcessNum = 0;
662
663 presource->_bSWInitReady = FALSE;
664 presource->_phyFwAddr = 0;
665 presource->_u32FwSize = 0;
666 presource->_u32DbgIntrCount = 0;
667
668 if(_ptsp_res->_TspState[0].TSPStatus != E_DRVTSP_SW_SUSPEND)
669 {
670 presource->_ifset_save.ePad = E_DRVTSP_PAD_EXT_INPUT0;
671 presource->_ifset_save.bClkInv = FALSE;
672 presource->_ifset_save.bExtSync = TRUE;
673 presource->_ifset_save.bParallel = TRUE;
674 }
675
676 for(u32ii = 0; u32ii < TSP_PVR_IF_NUM; u32ii++)
677 {
678 presource->_PvrEvtNotify[u32ii] = E_DRVTSP_EVENT_DATA_INIT;
679 presource->_PvrCallback[u32ii] = 0;
680 }
681
682 #if (defined(HWPCR_ENABLE) && (TSP_HWPCR_BY_HK == 1))
683 for(u32ii = 0; u32ii < TSP_PCRFLT_NUM; u32ii++)
684 {
685 presource->TSPHwPcrParams._u8ResetPcr[u32ii] = 3;
686 presource->TSPHwPcrParams._u32PrevStcBase[u32ii] = 0;
687 presource->TSPHwPcrParams._u32PrevPllControl[u32ii] = 0;
688 }
689 #endif
690
691 presource->_phyTspFWDramBuf = 0;
692 presource->_u32TspFwDramBufSize = 0;
693 presource->_u32StcAdjustUnit = 100;
694
695 #ifdef SECURE_PVR_ENABLE
696 presource->_teemode.OsType = SYS_TEEINFO_OSTYPE_NOTEE;
697 presource->_stSecBuf.u32BufId = 0;
698 presource->_stSecBuf.u32BufOpt = 0;
699 presource->_stSecBuf.u32BufSize = 0;
700 presource->_stSecBuf.phyBufAddr = 0;
701 #endif
702
703 return TRUE;
704
705 }
706
707 #ifdef SECURE_PVR_ENABLE
708 //For REE, HK cowork with Tee by mailbox
709
710 MS_BOOL _bTSPMbxInitFlag = 0;
711 MS_U8 _u8TSPMbxMsgClass = 0;
712 MBX_Msg _TSPReeToTeeMbxMsg;
713 MBX_Msg _TSPTeeToReeMbxMsg;
714
_TSP_REE_MbxParamToBufParam(MBX_Msg * pMsg,MS_U32 * pu32BufAddr,MS_U32 * pu32Size)715 MS_BOOL _TSP_REE_MbxParamToBufParam(MBX_Msg *pMsg, MS_U32* pu32BufAddr, MS_U32* pu32Size)
716 {
717 MS_U32 u32addr = 0;
718
719 if(pMsg->u8ParameterCount < 9)
720 return FALSE;
721
722 *pu32Size = ((MS_U32)pMsg->u8Parameters[0]) & 0xFFUL;
723 *pu32Size += ((((MS_U32)pMsg->u8Parameters[1]) << 8UL) & 0xFF00UL);
724 *pu32Size += ((((MS_U32)pMsg->u8Parameters[2]) << 16UL) & 0xFF0000UL);
725 *pu32Size += ((((MS_U32)pMsg->u8Parameters[3]) << 24UL) & 0xFF000000UL);
726 u32addr = ((MS_U32)pMsg->u8Parameters[4]) & 0xFFUL;
727 u32addr += ((((MS_U32)pMsg->u8Parameters[5]) << 8UL) & 0xFF00UL);
728 u32addr += (((MS_U32)pMsg->u8Parameters[6] << 16UL) & 0xFF0000UL);
729 u32addr += (((MS_U32)pMsg->u8Parameters[7] << 24UL) & 0xFF000000UL);
730 _miu_offset_to_phy(pMsg->u8Parameters[8], u32addr, *pu32BufAddr);
731
732 return TRUE;
733 }
734
_TSP_REE_RegisterMBX(void)735 MS_BOOL _TSP_REE_RegisterMBX(void)
736 {
737 MS_U8 ClassNum = 0;
738 MBX_Result result = E_MBX_ERR_NOT_INITIALIZED;
739 MS_U32 u32StartTime = 0;
740 const MS_U32 u32RetryTimeOutMs = 3000;
741
742 result = MApi_MBX_Init(E_MBX_CPU_MIPS,E_MBX_ROLE_HK,1000);
743 if (( E_MBX_SUCCESS != result) && ( E_MBX_ERR_SLOT_AREADY_OPENNED != result ))
744 {
745 TSP_DBG("DMX_REE MApi_MBX_Init fail\n");
746 return FALSE;
747 }
748 else
749 {
750 MApi_MBX_Enable(TRUE);
751 }
752
753 u32StartTime = MsOS_GetSystemTime();
754 while((MsOS_GetSystemTime() - u32StartTime) < u32RetryTimeOutMs)
755 {
756 result = MApi_MBX_QueryDynamicClass(E_MBX_CPU_MIPS_VPE1, "DMX_TEE", (MS_U8 *)&ClassNum);
757 if(result == E_MBX_SUCCESS)
758 break;
759 MsOS_DelayTask(100);
760 };
761
762 if(result != E_MBX_SUCCESS)
763 {
764 TSP_DBG("DMX_REE MApi_MBX_QueryDynamicClass fail\n");
765 return FALSE;
766 }
767
768 result = MApi_MBX_RegisterMSG(ClassNum, 10);
769 if (( E_MBX_SUCCESS != result) && ( E_MBX_ERR_SLOT_AREADY_OPENNED != result ))
770 {
771 TSP_DBG("%s fail\n",__FUNCTION__);
772 return FALSE;
773 }
774 else
775 {
776 _bTSPMbxInitFlag = TRUE;
777 _u8TSPMbxMsgClass = ClassNum;
778 return TRUE;
779 }
780 }
781
_TSP_Ree_SendMBXMsg(TSP_REE_TO_TEE_CMD_TYPE msg_type,void * param)782 MS_BOOL _TSP_Ree_SendMBXMsg(TSP_REE_TO_TEE_CMD_TYPE msg_type, void* param)
783 {
784 MBX_Result result = E_MBX_UNKNOW_ERROR;
785 DrvTSP_SecureBuf *pstSecBuf = (DrvTSP_SecureBuf*)param;
786 MS_U8 u8Id = 0;
787 MS_U32 u32Addr = 0, u32Size = 0;
788 MS_U32 u32Offset = 0;
789 MS_U8 u8MiuSel = 0;
790 MS_U8 u8Opt = 0;
791 MS_U32 u32StartTime = MsOS_GetSystemTime();
792 MS_U32 u32Timeout = 2000;
793 const MS_U32 u32TotTimeout = 6000;
794 const MS_U32 u32RevMsgTimeout = 2000;
795
796 if (_bTSPMbxInitFlag == FALSE)
797 {
798 return FALSE;
799 }
800
801 //retry mbx msg sending, if sending fail
802 u32StartTime = MsOS_GetSystemTime();
803 while((MsOS_GetSystemTime() - u32StartTime) < u32TotTimeout)
804 {
805 _TSPReeToTeeMbxMsg.eRoleID = E_MBX_CPU_MIPS_VPE1;
806 _TSPReeToTeeMbxMsg.u8Ctrl = 0;
807 _TSPReeToTeeMbxMsg.eMsgType = E_MBX_MSG_TYPE_INSTANT;
808 _TSPReeToTeeMbxMsg.u8MsgClass = _u8TSPMbxMsgClass;
809 _TSPReeToTeeMbxMsg.u8Index = msg_type;
810
811 switch(msg_type)
812 {
813 case E_DRVTSP_REE_TO_TEE_CMD_FW_LoadCode:
814 case E_DRVTSP_REE_TO_TEE_CMD_SET_VqBuf:
815 break;
816 case E_DRVTSP_REE_TO_TEE_CMD_SET_PvrBuf:
817 if(pstSecBuf == 0)
818 {
819 MS_DEBUG_MSG(TSP_DBG("[%s][%d] Parameter pointer of PVR buffer is 0!!!!\n",__FUNCTION__, __LINE__));
820 return FALSE;
821 }
822 u8Id = (MS_U8)(pstSecBuf->u32BufId);
823 u8Opt = (MS_U8)(pstSecBuf->u32BufOpt);
824 _TSPReeToTeeMbxMsg.u8Parameters[0] = u8Id;
825 _TSPReeToTeeMbxMsg.u8Parameters[1] = u8Opt;
826 _TSPReeToTeeMbxMsg.u8ParameterCount = 2;
827 break;
828 case E_DRVTSP_REE_TO_TEE_CMD_SET_FileinBuf:
829 if(pstSecBuf == 0)
830 {
831 MS_DEBUG_MSG(TSP_DBG("[%s][%d] Parameter pointer of Filein buffer is 0!!!!\n",__FUNCTION__, __LINE__));
832 return FALSE;
833 }
834 u8Id = (MS_U8)(pstSecBuf->u32BufId);
835 u32Addr = (MS_U32)(pstSecBuf->phyBufAddr);
836 u32Size = pstSecBuf->u32BufSize;
837 _phy_to_miu_offset(u8MiuSel, u32Offset, u32Addr);
838 _TSPReeToTeeMbxMsg.u8Parameters[0] = (MS_U8)(u32Size & 0xFFUL);
839 _TSPReeToTeeMbxMsg.u8Parameters[1] = (MS_U8)((u32Size & 0xFF00UL) >> 8UL);
840 _TSPReeToTeeMbxMsg.u8Parameters[2] = (MS_U8)((u32Size & 0xFF0000UL) >> 16UL);
841 _TSPReeToTeeMbxMsg.u8Parameters[3] = (MS_U8)((u32Size & 0xFF000000UL) >> 24UL);
842 _TSPReeToTeeMbxMsg.u8Parameters[4] = (MS_U8)(u32Offset & 0xFFUL);
843 _TSPReeToTeeMbxMsg.u8Parameters[5] = (MS_U8)((u32Offset & 0xFF00UL) >> 8UL);
844 _TSPReeToTeeMbxMsg.u8Parameters[6] = (MS_U8)((u32Offset & 0xFF0000UL) >> 16UL);
845 _TSPReeToTeeMbxMsg.u8Parameters[7] = (MS_U8)((u32Offset & 0xFF000000UL) >> 24UL);
846 _TSPReeToTeeMbxMsg.u8Parameters[8] = u8MiuSel;
847 _TSPReeToTeeMbxMsg.u8Parameters[9] = u8Id;
848 _TSPReeToTeeMbxMsg.u8ParameterCount = 10;
849 break;
850 case E_DRVTSP_REE_TO_TEE_CMD_GET_PvrWPtr:
851 _TSPReeToTeeMbxMsg.u8Parameters[0] = (MS_U8)(pstSecBuf->u32BufId);
852 _TSPReeToTeeMbxMsg.u8ParameterCount = 1;
853 break;
854
855 default:
856 MS_DEBUG_MSG(TSP_DBG("[%s] Tee cmd not support\n",__FUNCTION__));
857 return FALSE;
858 }
859
860 result = MApi_MBX_SendMsg(&_TSPReeToTeeMbxMsg);
861 if (E_MBX_SUCCESS != result)
862 {
863 MsOS_DelayTask(100);
864 continue;
865 }
866
867 // Receive Reply ACK from TEE side.
868 memset(&_TSPTeeToReeMbxMsg, 0, sizeof(MBX_Msg));
869
870 _TSPTeeToReeMbxMsg.u8MsgClass = _u8TSPMbxMsgClass;
871
872 #if 0 // marked temperarily, wait kernel team to fix MApi_MBX_RecvMsg.
873 if(E_MBX_SUCCESS != MApi_MBX_RecvMsg(TEE_MBX_MSG_CLASS, &(TEE_TO_REE_MBX_MSG), 20, MBX_CHECK_INSTANT_MSG))
874 {
875 VPU_MSG_ERR("VDEC get Secure world ACK fail\n");
876 return E_TSP_EX_TEE_TO_REE_MBX_ACK_MSG_ACTION_FAIL;
877 }
878 else
879 #else
880 do
881 {
882 result = MApi_MBX_RecvMsg(_u8TSPMbxMsgClass, &_TSPTeeToReeMbxMsg, u32RevMsgTimeout, MBX_CHECK_INSTANT_MSG);
883 u32Timeout -= u32RevMsgTimeout;
884 } while((E_MBX_SUCCESS != result) && (u32Timeout > 0));
885 #endif
886
887 if((result == E_MBX_SUCCESS) && (_TSPTeeToReeMbxMsg.u8Index == E_TSP_TEE_TO_REE_MBX_ACK_MSG_ACTION_SUCCESS))
888 {
889 break;
890 }
891
892 MsOS_DelayTask(100);
893
894 }
895
896 //parsing return data
897 if((result == E_MBX_SUCCESS) && (_TSPTeeToReeMbxMsg.u8Index == E_TSP_TEE_TO_REE_MBX_ACK_MSG_ACTION_SUCCESS))
898 {
899 switch(msg_type)
900 {
901 case E_DRVTSP_REE_TO_TEE_CMD_SET_PvrBuf:
902 pstSecBuf->phyBufAddr = 0;
903 pstSecBuf->u32BufSize = 0;
904 _TSP_REE_MbxParamToBufParam(&_TSPTeeToReeMbxMsg, &u32Addr, &u32Size);
905 pstSecBuf->phyBufAddr = ((MS_PHY)u32Addr) & 0xFFFFFFFFUL;
906 pstSecBuf->u32BufSize = u32Size;
907 break;
908 case E_DRVTSP_REE_TO_TEE_CMD_GET_PvrWPtr:
909 pstSecBuf->phyBufAddr = 0;
910 if(_TSPTeeToReeMbxMsg.u8ParameterCount < 5)
911 {
912 return FALSE;
913 }
914 u32Addr = ((MS_U32)_TSPTeeToReeMbxMsg.u8Parameters[1]) & 0xFFUL;
915 u32Addr += ((((MS_U32)_TSPTeeToReeMbxMsg.u8Parameters[2]) << 8UL) & 0xFF00UL);
916 u32Addr += ((((MS_U32)_TSPTeeToReeMbxMsg.u8Parameters[3]) << 16UL) & 0xFF0000UL);
917 u32Addr += ((((MS_U32)_TSPTeeToReeMbxMsg.u8Parameters[4]) << 24UL) & 0xFF000000UL);
918 _miu_offset_to_phy(_TSPTeeToReeMbxMsg.u8Parameters[0], u32Offset, u32Addr);
919 pstSecBuf->phyBufAddr = ((MS_PHY)u32Addr) & 0xFFFFFFFFUL;
920 break;
921 default:
922 break;
923 }
924
925 return TRUE;
926 }
927
928 //printf("[%s][%d] timeout!\n",__FUNCTION__,__LINE__);
929
930 return FALSE;
931 }
932
933 #endif //SECURE_PVR_ENABLE
934
_TSP_SwStateReset(MS_BOOL bInited)935 static void _TSP_SwStateReset(MS_BOOL bInited)
936 {
937 MS_U32 u32EngId, u32FilterId;
938
939 if(bInited == TRUE)
940 return;
941
942 for (u32EngId = 0; u32EngId < TSP_ENGINE_NUM; u32EngId++)
943 {
944 for (u32FilterId = 0; u32FilterId < TSP_SECFLT_NUM; u32FilterId++)
945 {
946 _ptsp_res->_TspState[u32EngId].FltState[u32FilterId] = E_DRVTSP_FLT_STATE_NA;
947 _ptsp_res->_TspState[u32EngId].FltType[u32FilterId] = E_DRVTSP_FLT_TYPE_SECTION; // for section filter
948 _ptsp_res->_TspState[u32EngId].SecFltState[u32FilterId] = E_DRVTSP_FLT_STATE_NA;
949 _ptsp_res->_TspState[u32EngId].SecBufState[u32FilterId] = E_DRVTSP_FLT_STATE_NA;
950 _ptsp_res->_TspState[u32EngId].SecFltMode[u32FilterId] = E_DRVTSP_FLT_MODE_CONTI;
951 _ptsp_res->_TspState[u32EngId].SecBufState[u32FilterId] = E_DRVTSP_FLT_STATE_NA;
952 _ptsp_res->_TspState[u32EngId].SecBufState[u32FilterId] = E_DRVTSP_FLT_STATE_NA;
953 _ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32FilterId] = E_DRVTSP_EVENT_DATA_INIT;
954 _ptsp_res->_TspState[u32EngId].SecFltCallback[u32FilterId] = NULL;
955 _ptsp_res->_TspState[u32EngId].s32TspEvtId[u32FilterId] = -1;
956 #ifdef DUP_PIDFLT
957 _ptsp_res->_TspState[u32EngId].DupFlt[u32FilterId] = 0xFFFFUL;
958 #endif
959
960 #ifdef MERGE_STR_SUPPORT
961 _ptsp_res->_TspState[u32EngId].FltSrcId[u32FilterId] = 0UL;
962 #endif
963 }
964
965 for (u32FilterId = TSP_SECFLT_NUM; u32FilterId < TSP_PIDFLT_NUM_ALL; u32FilterId++)
966 {
967 _ptsp_res->_TspState[u32EngId].FltState[u32FilterId] = E_DRVTSP_FLT_STATE_FREE;
968 _ptsp_res->_TspState[u32EngId].FltType[u32FilterId] = E_DRVTSP_FLT_TYPE_PVR;
969 #ifdef DUP_PIDFLT
970 _ptsp_res->_TspState[u32EngId].DupFlt[u32FilterId] = 0xFFFFUL;
971 #endif
972
973 #ifdef MERGE_STR_SUPPORT
974 _ptsp_res->_TspState[u32EngId].FltSrcId[u32FilterId] = 0UL;
975 #endif
976 }
977
978 #ifdef HWPCR_ENABLE
979 for (u32FilterId = TSP_PIDFLT_NUM; u32FilterId < TSP_PIDFLT_NUM_ALL; u32FilterId++)
980 {
981 _ptsp_res->_TspState[u32EngId].FltState[u32FilterId] = E_DRVTSP_FLT_STATE_FREE;
982 _ptsp_res->_TspState[u32EngId].FltType[u32FilterId] = E_DRVTSP_FLT_TYPE_PCR;
983 }
984 #endif
985 }
986
987 //---------------------------------------------------------------------------------
988 //Select source of every range of DSCMB filters
989 // if TSP_CA_ENGINE_NUM is 3, ENG0 for TS0_Live & TS0_File, Eng1 for TS1, Eng2 for TS2
990 // if TSP_CA_ENGINE_NUM is 4, ENG0 for TS0_Live, ENG1 for TS0_File, Eng2 for TS1, Eng3 for TS2
991 //---------------------------------------------------------------------------------
992 _ptsp_res->_DscmbFlt_State[0].u32Src = E_DRVTSP_FLT_SOURCE_TYPE_LIVE|E_DRVTSP_FLT_SOURCE_TYPE_FILE; //eng0 src
993 _ptsp_res->_DscmbFlt_State[0].u32Start = DSCMB_FLT_START_ID; //# eng0 filter range
994 _ptsp_res->_DscmbFlt_State[0].u32End = DSCMB_FLT_END_ID;
995 _ptsp_res->_DscmbFlt_State[0].u32ShareStart = DSCMB_FLT_SHAREKEY_START_ID;
996 _ptsp_res->_DscmbFlt_State[0].u32ShareEnd = DSCMB_FLT_SHAREKEY_END_ID;
997
998 #if (TSP_CA_ENGINE_NUM >= 2)
999 _ptsp_res->_DscmbFlt_State[1].u32Start = DSCMB1_FLT_START_ID; //# eng1 filter range
1000 _ptsp_res->_DscmbFlt_State[1].u32End = DSCMB1_FLT_END_ID;
1001 _ptsp_res->_DscmbFlt_State[1].u32ShareStart = DSCMB_FLT_SHAREKEY1_START_ID;
1002 _ptsp_res->_DscmbFlt_State[1].u32ShareEnd = DSCMB_FLT_SHAREKEY1_END_ID;
1003 _ptsp_res->_DscmbFlt_State[1].u32Src = E_DRVTSP_FLT_SOURCE_TYPE_TS1|E_DRVTSP_FLT_SOURCE_TYPE_FILE1; //eng1 src
1004 #endif
1005
1006 #if (TSP_CA_ENGINE_NUM >= 3)
1007 _ptsp_res->_DscmbFlt_State[2] .u32Src = E_DRVTSP_FLT_SOURCE_TYPE_TS2|E_DRVTSP_FLT_SOURCE_TYPE_FILE2; //eng2 src
1008 _ptsp_res->_DscmbFlt_State[2].u32Start = DSCMB2_FLT_START_ID; //# eng2 filter range
1009 _ptsp_res->_DscmbFlt_State[2].u32End = DSCMB2_FLT_END_ID;
1010 _ptsp_res->_DscmbFlt_State[2].u32ShareStart = DSCMB_FLT_SHAREKEY2_START_ID;
1011 _ptsp_res->_DscmbFlt_State[2].u32ShareEnd = DSCMB_FLT_SHAREKEY2_END_ID;
1012 #endif
1013
1014 #if (TSP_CA_ENGINE_NUM == 4)
1015 _ptsp_res->_DscmbFlt_State[3].u32Src = 0; //eng3 src
1016 _ptsp_res->_DscmbFlt_State[3].u32Start = DSCMB3_FLT_START_ID;
1017 _ptsp_res->_DscmbFlt_State[3].u32End = DSCMB3_FLT_END_ID;
1018 _ptsp_res->_DscmbFlt_State[3].u32ShareStart = DSCMB_FLT_SHAREKEY_START_ID;
1019 _ptsp_res->_DscmbFlt_State[3].u32ShareEnd = DSCMB_FLT_SHAREKEY_END_ID;
1020 #endif
1021
1022 }
1023
_TSP_Get_DscmbEngId_ByFltSrc(DrvTSP_FltType FltSrc)1024 static MS_U8 _TSP_Get_DscmbEngId_ByFltSrc(DrvTSP_FltType FltSrc)
1025 {
1026 MS_U8 u8ii = 0xFF;
1027
1028 for(u8ii = 0; u8ii < ((MS_U8)TSP_CA_ENGINE_NUM); u8ii++)
1029 {
1030 if(FltSrc & _ptsp_res->_DscmbFlt_State[u8ii].u32Src)
1031 break;
1032 }
1033
1034 if(u8ii == TSP_CA_ENGINE_NUM)
1035 {
1036 u8ii = 0xFF;
1037 }
1038
1039 return u8ii;
1040 }
1041
_TSP_SW_Exit(void)1042 static void _TSP_SW_Exit(void)
1043 {
1044 MS_U8 u8ii, u8tmp;
1045 MS_U32 u32Timer, u32CurTime = 0;
1046
1047 //printf("[%s][%d] _u32LibMode %d %d\n", __FUNCTION__, __LINE__, (int)_u32LibMode, (int)_db_flag);
1048
1049 if(_u32LibMode != DRVTSP_CMD_LIB_MODE_KRN)
1050 {
1051 _TSP_EXT_LOCK();
1052 _db_flag = 1;
1053 _TSP_EXT_UNLOCK();
1054
1055 _TSP_IND_UNLOCK();
1056 u32Timer = MsOS_GetSystemTime();
1057 // check _s32TspTaskId for NOS case
1058 while(_s32TspTaskId > 0)
1059 {
1060 _TSP_SetEvent(_s32TspEventId, TSP_TASK_EVENT_FLT_FREE);
1061 _TSP_EXT_LOCK();
1062 if (_db_flag == 2)
1063 {
1064 _db_flag = 0;
1065 //_TSP_EXT_UNLOCK();
1066 break;
1067 }
1068 _TSP_EXT_UNLOCK();
1069
1070 u32CurTime = MsOS_GetSystemTime();
1071 if(u32CurTime < u32Timer)
1072 {
1073 printf("[%s][%d] Systemtime Change %d %d %x\n", __FUNCTION__, __LINE__, (int)u32CurTime, (int)u32Timer, (int)_s32TspTaskId);
1074 u32Timer = u32CurTime;
1075 }
1076 if ((u32CurTime-u32Timer) > 10000UL)
1077 {
1078 printf("[%s][%d] TSP task exit timeout %d %d %x !!!!!!\n", __FUNCTION__, __LINE__, (int)u32CurTime, (int)u32Timer, (int)_s32TspTaskId);
1079 break;
1080 }
1081 MsOS_DelayTask(3);
1082 }
1083
1084 _TSP_IND_LOCK();
1085
1086 /*if(_s32TspTaskId > 0)
1087 {
1088 MsOS_DeleteTask(_s32TspTaskId);
1089 _s32TspTaskId = -1;
1090 }*/
1091 }
1092 else
1093 {
1094 if(_ptsp_res->_TspState[0].TSPStatus == E_DRVTSP_SW_SUSPEND)
1095 {
1096 #ifndef MSOS_TYPE_LINUX_KERNEL
1097 _ptsp_res->_bSWInitReady = FALSE;
1098 #endif
1099
1100 return;
1101 }
1102
1103 #if 0
1104 //to free CB process task, so send one event
1105 _db_flag = 1;
1106 _TSP_SetEvent(_s32TspEventId, TSP_TASK_EVENT_FLT_FREE);
1107 MsOS_DelayTask(3);
1108
1109 while(_db_flag != 2)
1110 {
1111 _TSP_SetEvent(_s32TspEventId, TSP_TASK_EVENT_FLT_FREE);
1112 MsOS_DelayTask(3);
1113 }
1114
1115 while(OSAL_TSP_EventDelete(_s32TspEventId) == FALSE)
1116 {
1117 _TSP_SetEvent(TSP_TASK_EVENT_FLT_FREE);
1118 printf("Waiting for evet deleting... \n");
1119 MsOS_DelayTask(3);
1120 }
1121 _s32TspEventId = -1;
1122 #endif
1123
1124 _TSP_EXT_LOCK();
1125 }
1126
1127 #if 0
1128 u8tmp = (MS_U8)((TSP_PIDFLT_NUM_ALL+31UL)>>5UL);
1129 for (u8ii = 0; u8ii < u8tmp; u8ii++)
1130 {
1131 if(_s32EventFree0[u8ii] != -1)
1132 {
1133 OSAL_TSP_EventDelete(_s32EventFree0[u8ii]);
1134 _s32EventFree0[u8ii] = -1;
1135 }
1136 if(_s32DoneFlags[u8ii] != -1)
1137 {
1138 OSAL_TSP_EventDelete(_s32DoneFlags[u8ii]);
1139 _s32DoneFlags[u8ii] = -1;
1140 }
1141
1142 /*if(_s32EventFreeDefer0[u8ii] != -1)
1143 {
1144 OSAL_TSP_EventDelete(_s32EventFreeDefer0[u8ii]);
1145 _s32EventFreeDefer0[u8ii] = -1;
1146 }*/
1147 }
1148 #endif
1149
1150 if (_s32ExtMutexId != -1)
1151 {
1152 //_TSP_EXT_LOCK();
1153 _TSP_EXT_UNLOCK();
1154 MsOS_DeleteMutex(_s32ExtMutexId);
1155 _s32ExtMutexId = -1;
1156 }
1157
1158 if (_s32TspEventId != -1)
1159 {
1160 if(_u32LibMode != DRVTSP_CMD_LIB_MODE_KRN)
1161 {
1162 OSAL_TSP_EventDelete(_s32TspEventId);
1163 }
1164 _s32TspEventId = -1;
1165 }
1166
1167 u8tmp = (MS_U8)((TSP_SECFLT_NUM+31UL)>>5UL);
1168 for (u8ii = 0; u8ii < u8tmp; u8ii++)
1169 {
1170 if(_s32TspSecOvfId[u8ii] != -1)
1171 {
1172 //printf("[%s][%d] %d %x\n", __FUNCTION__, __LINE__, (int)u8ii, (int)_s32TspSecOvfId[u8ii]);
1173 OSAL_TSP_EventDelete(_s32TspSecOvfId[u8ii]);
1174 _s32TspSecOvfId[u8ii] = -1;
1175 }
1176 if(_s32TspSecCrcId[u8ii] != -1)
1177 {
1178 //printf("[%s][%d] %d %x\n", __FUNCTION__, __LINE__, (int)u8ii, (int)_s32TspSecCrcId[u8ii]);
1179 OSAL_TSP_EventDelete(_s32TspSecCrcId[u8ii]);
1180 _s32TspSecCrcId[u8ii] = -1;
1181 }
1182 if(_s32TspFltDisableId[u8ii] != -1)
1183 {
1184 //printf("[%s][%d] %d %x\n", __FUNCTION__, __LINE__, (int)u8ii, (int)_s32TspFltDisableId[u8ii]);
1185 OSAL_TSP_EventDelete(_s32TspFltDisableId[u8ii]);
1186 _s32TspFltDisableId[u8ii] = -1;
1187 }
1188 if(_s32TspSecRdyId[u8ii] != -1)
1189 {
1190 //printf("[%s][%d] %d %x\n", __FUNCTION__, __LINE__, (int)u8ii, (int)_s32TspSecRdyId[u8ii]);
1191 OSAL_TSP_EventDelete(_s32TspSecRdyId[u8ii]);
1192 _s32TspSecRdyId[u8ii] = -1;
1193 }
1194 }
1195
1196 //checking if stiil there are other processes exist
1197 if(--_ptsp_res->_u32ProcessNum > 0)
1198 return;
1199
1200 if (_ptsp_res->_s32IntRegMutexId != -1)
1201 {
1202 _TSP_INT_LOCK();
1203 _TSP_INT_UNLOCK();
1204 MsOS_DeleteMutex(_ptsp_res->_s32IntRegMutexId);
1205 _ptsp_res->_s32IntRegMutexId = -1;
1206 }
1207
1208 if (_ptsp_res->_s32IndMutexId != -1)
1209 {
1210 MsOS_ReleaseMutex(_ptsp_res->_s32IndMutexId);
1211 MsOS_DeleteMutex(_ptsp_res->_s32IndMutexId);
1212 _ptsp_res->_s32IndMutexId = -1;
1213 }
1214
1215 if (_ptsp_res->_s32TspMutexId != -1)
1216 {
1217 MsOS_ReleaseMutex(_ptsp_res->_s32TspMutexId);
1218 MsOS_DeleteMutex(_ptsp_res->_s32TspMutexId);
1219 _ptsp_res->_s32TspMutexId = -1;
1220 }
1221
1222 if(_ptsp_res->_TspState[0].TSPStatus != E_DRVTSP_SW_SUSPEND)
1223 {
1224 _ptsp_res->_TspState[0].TSPStatus = E_DRVTSP_SW_EXIT;
1225 }
1226
1227 #ifdef SECURE_PVR_ENABLE
1228 MDrv_TSP_Ree_TeeCmdSystem_Exit();
1229 #endif
1230
1231 _ptsp_res->_bSWInitReady = FALSE;
1232
1233 }
1234
_TSP_Close(void)1235 static void _TSP_Close(void)
1236 {
1237 HAL_TSP_Int_Disable(TSP_HWINT_ALL);
1238 HAL_TSP_Int2_Disable(TSP_HWINT2_ALL);
1239
1240 OSAL_TSP_IntDisable();
1241 OSAL_TSP_IntDetach();
1242 HAL_TSP_WbDmaEnable(FALSE);
1243 HAL_TSP_SetCtrlMode(0, 0, TSP_IF_NUM);
1244 _TSP_SW_Exit();
1245 HAL_TSP_PowerCtrl(DISABLE);
1246 HAL_TSP_HW_Lock_Release();
1247 }
1248
1249 //------------------------------------------------
1250 //Default STC mapping:
1251 //STC0: live0 & file
1252 //STC1: TS1 & TS2
1253 //------------------------------------------------
1254 //If FltSrc = 0, goto auto arranging directly
1255 //------------------------------------------------
_TSP_STC_Alloc(DrvTSP_FltType FltSrc,MS_U32 * pu32EngId)1256 static TSP_Result _TSP_STC_Alloc(DrvTSP_FltType FltSrc, MS_U32 *pu32EngId)
1257 {
1258 MS_U32 i;
1259 *pu32EngId = 0xFFFFFFFF;
1260
1261 if((_ptsp_res->_bStcAllocDisable))
1262 return DRVTSP_FAIL;
1263
1264 if((FltSrc == E_DRVTSP_FLT_SOURCE_TYPE_LIVE) || (FltSrc == E_DRVTSP_FLT_SOURCE_TYPE_FILE))
1265 {
1266 if(_ptsp_res->_TspStcState[0].bUsed == FALSE)
1267 {
1268 i = 0;
1269 goto FOUND;
1270 }
1271 }
1272 else if((FltSrc == E_DRVTSP_FLT_SOURCE_TYPE_TS1) || (FltSrc == E_DRVTSP_FLT_SOURCE_TYPE_TS2)
1273 || (FltSrc == E_DRVTSP_FLT_SOURCE_TYPE_FILE1) || (FltSrc == E_DRVTSP_FLT_SOURCE_TYPE_FILE2))
1274 {
1275 if(_ptsp_res->_TspStcState[1].bUsed == FALSE)
1276 {
1277 i = 1;
1278 goto FOUND;
1279 }
1280 }
1281
1282 for(i = 0; i < TSP_STC_NUM; i++)
1283 {
1284 if(_ptsp_res->_TspStcState[i].bUsed == FALSE)
1285 {
1286 goto FOUND;
1287 }
1288 }
1289
1290 if(*pu32EngId == 0xFFFFFFFF)
1291 {
1292 return DRVTSP_FAIL;
1293 }
1294
1295 FOUND:
1296
1297 _ptsp_res->_TspStcState[i].u32SrcType = FltSrc;
1298 _ptsp_res->_TspStcState[i].bUsed = TRUE;
1299 *pu32EngId = i;
1300
1301 return DRVTSP_OK;
1302 }
1303
_TSP_STC_Free(MS_U32 u32EngId)1304 static TSP_Result _TSP_STC_Free(MS_U32 u32EngId)
1305 {
1306 if(_ptsp_res->_TspStcState[u32EngId].bUsed == FALSE)
1307 return DRVTSP_OK;
1308
1309 _ptsp_res->_TspStcState[u32EngId].bUsed = FALSE;
1310 _ptsp_res->_TspStcState[u32EngId].u32PcrFltId = 0xFFFFFFFF;
1311 _ptsp_res->_TspStcState[u32EngId].u32SrcType = 0xFFFFFFFF;
1312 return DRVTSP_OK;
1313 }
1314
_TSP_STC_Select(DrvTSP_FltType eFltSrc,MS_U32 u32StcEng)1315 static TSP_Result _TSP_STC_Select(DrvTSP_FltType eFltSrc, MS_U32 u32StcEng)
1316 {
1317 MS_U32 u32Src = 0;
1318
1319 switch(eFltSrc & E_DRVTSP_FLT_SOURCE_TYPE_MASK)
1320 {
1321 case E_DRVTSP_FLT_SOURCE_TYPE_LIVE:
1322 u32Src = TSP_PIDFLT_IN_PIDFLT0;
1323 break;
1324 case E_DRVTSP_FLT_SOURCE_TYPE_FILE:
1325 u32Src = TSP_PIDFLT_IN_PIDFLT_FILE;
1326 break;
1327 case E_DRVTSP_FLT_SOURCE_TYPE_TS1:
1328 case E_DRVTSP_FLT_SOURCE_TYPE_FILE1:
1329 u32Src = TSP_PIDFLT_IN_PIDFLT1;
1330 break;
1331 case E_DRVTSP_FLT_SOURCE_TYPE_TS2:
1332 case E_DRVTSP_FLT_SOURCE_TYPE_FILE2:
1333 u32Src = TSP_PIDFLT_IN_PIDFLT2;
1334 break;
1335 default:
1336 return DRVTSP_INVALID_PARAM;
1337 }
1338 if (HAL_TSP_SelectSTCEng(u32Src, u32StcEng))
1339 {
1340 return DRVTSP_OK;
1341 }
1342 else
1343 {
1344 return DRVTSP_FAIL;
1345 }
1346 }
1347
_TSP_STC_SetPcrFlt(MS_U32 u32EngId,MS_U32 u32PcrFltId)1348 static TSP_Result _TSP_STC_SetPcrFlt(MS_U32 u32EngId, MS_U32 u32PcrFltId)
1349 {
1350
1351 _ptsp_res->_TspStcState[u32EngId].u32PcrFltId = u32PcrFltId;
1352
1353 return DRVTSP_OK;
1354 }
1355
_TSP_PcrId_To_StcId(MS_U32 u32PcrFltId,MS_U32 * pu32EngId)1356 static TSP_Result _TSP_PcrId_To_StcId(MS_U32 u32PcrFltId,MS_U32 *pu32EngId)
1357 {
1358 MS_U32 i;
1359
1360 *pu32EngId = 0xFFFFFFFF;
1361
1362 for(i = 0; i < TSP_STC_NUM; i++)
1363 {
1364 if(_ptsp_res->_TspStcState[i].u32PcrFltId == u32PcrFltId)
1365 {
1366 *pu32EngId = i;
1367 return DRVTSP_OK;
1368 }
1369 }
1370
1371 return DRVTSP_FAIL;
1372 }
1373
_TSP_PidFlt_Init(MS_U32 u32EngId,MS_U32 u32PidFltId)1374 static void _TSP_PidFlt_Init(MS_U32 u32EngId, MS_U32 u32PidFltId)
1375 {
1376 if(u32PidFltId >= TSP_PIDFLT_NUM_ALL)
1377 {
1378 return;
1379 }
1380
1381 HAL_TSP_PidFlt_SetPid(u32EngId, u32PidFltId, DRVTSP_PID_NULL);
1382 HAL_TSP_PidFlt_SelFltOutput(u32EngId, u32PidFltId, TSP_PIDFLT_OUT_NONE);
1383 HAL_TSP_PidFlt_SelFltSource(u32EngId, u32PidFltId, TSP_PIDFLT_IN_NONE);
1384 HAL_TSP_PidFlt_SelSecFlt(u32EngId, u32PidFltId, TSP_PIDFLT_SECFLT_NULL);
1385
1386 #ifdef MERGE_STR_SUPPORT
1387 HAL_TSP_PidFlt_SetFltSrcStreamID(u32EngId, u32PidFltId, 0);
1388 #endif
1389
1390 _ptsp_res->_TspState[u32EngId].FltMap[u32PidFltId] = DRVTSP_MAP_NULL;
1391 }
1392
_TSP_PidFlt_Disable(MS_U32 u32EngId,MS_U32 u32PidFltId)1393 static void _TSP_PidFlt_Disable(MS_U32 u32EngId, MS_U32 u32PidFltId)
1394 {
1395 #ifdef HWPCR_ENABLE
1396 if(u32PidFltId >= TSP_PIDFLT_NUM)
1397 {
1398 MS_U32 u32Idx = u32PidFltId - TSP_PIDFLT_NUM;
1399
1400 HAL_TSP_PidFlt_HWPcrFlt_Enable(u32Idx, FALSE);
1401 HAL_TSP_PidFlt_SetHWPcrPid(u32Idx, DRVTSP_PID_NULL);
1402 #if (TSP_HWPCR_BY_HK == 1)
1403 HAL_TSP_HWPcr_Int_Enable(u32Idx, FALSE);
1404 _TSP_RemoveHwPcrNotifyId(u32Idx);
1405 #endif
1406 }
1407 else
1408 {
1409 #endif
1410 #ifdef DUP_PIDFLT
1411 if(_ptsp_res->_TspState[u32EngId].DupFlt[u32PidFltId] != 0xFFFFUL)
1412 {
1413 MS_U32 u32Idx = _ptsp_res->_TspState[u32EngId].DupFlt[u32PidFltId];
1414 HAL_TSP_PidFlt_SelFltOutput(u32EngId, u32Idx, TSP_PIDFLT_OUT_NONE);
1415 _ptsp_res->_TspState[u32EngId].FltState[u32Idx] &= (DrvTSP_FltState)(~E_DRVTSP_FLT_STATE_ENABLE);
1416 //ULOGD("TSP", "[%s][%d] \n", __FUNCTION__, __LINE__);
1417 }
1418 #endif
1419
1420 HAL_TSP_PidFlt_SelFltOutput(u32EngId, u32PidFltId, TSP_PIDFLT_OUT_NONE);
1421
1422 #ifdef HWPCR_ENABLE
1423 }
1424 #endif
1425
1426 _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] &= (DrvTSP_FltState)(~E_DRVTSP_FLT_STATE_ENABLE);
1427 }
1428
1429 // Note: This is only for PID filter & Section filter to be one by one mapping, and section filter number is equal to pid filter number.
1430 // DSCMB0 filter : 16~31 --> Source from live0 and file
1431 // DSCMB1 filter : 32~47 --> Source from TS1 and TS2
1432 // DSCMB2 filter : 48~63 --> Source from TS2
1433 // SubDSCMB0 filter : 80~95
1434 // SubDSCMB1 filter : 96~111
1435 // SubDSCMB2 filter : 112~127
1436 // Section filter : 0 ~63 / 0~127
1437 // Total 128 filters
1438 //
1439 // ----------------- 0
1440 // | |
1441 // ----------------- 16
1442 // | DSCM0 |
1443 // ----------------- 32
1444 // | DSCM1 |
1445 // ----------------- 48
1446 // | DSCM2 |
1447 // ----------------- 64
1448 // | |
1449 // ----------------- 79
1450 // | SubDSCMB0 |
1451 // ----------------- 96
1452 // | SubDSCMB1 |
1453 // ----------------- 111
1454 // | SubDSCMB2 |
1455 // ----------------- 127
1456 // | HWPCR |
1457 // ----------------- 129
_TSP_PidFlt_Alloc(MS_U32 u32EngId,DrvTSP_FltType eFilterType,MS_U32 * pu32PidFltId)1458 static MS_BOOL _TSP_PidFlt_Alloc(MS_U32 u32EngId, DrvTSP_FltType eFilterType, MS_U32 *pu32PidFltId)
1459 {
1460 MS_S32 i = 0, j = 0;
1461 MS_U32 pid_idx_start = 0;
1462 MS_U32 pid_idx_end = 0;
1463 MS_BOOL bFound = FALSE;
1464 MS_U8 u8CAEng = 0;
1465 MS_U32 u32StcEng = 0xFFFFFFFF;
1466
1467 #ifdef DUP_PIDFLT_API
1468 MS_U32 u32DupFlag = eFilterType & E_DRVTSP_FLT_TYPE_DUPSEC;
1469 #endif
1470
1471 *pu32PidFltId = 0xFFFFFFFF;
1472
1473 if((E_DRVTSP_FLT_TYPE_PCR == (eFilterType&~E_DRVTSP_FLT_MASK)) && !(_ptsp_res->_bStcAllocDisable))
1474 {
1475 if(_TSP_STC_Alloc(eFilterType & E_DRVTSP_FLT_SOURCE_TYPE_MASK, &u32StcEng) == FALSE)
1476 {
1477 goto FIND_END;
1478 }
1479 }
1480
1481 #ifdef HWPCR_ENABLE
1482 if(E_DRVTSP_FLT_TYPE_PCR == (eFilterType&~E_DRVTSP_FLT_MASK))
1483 {
1484 for(i = TSP_PIDFLT_NUM; i < TSP_PIDFLT_NUM_ALL; i++)
1485 {
1486 if (_ptsp_res->_TspState[u32EngId].FltState[i] == E_DRVTSP_FLT_STATE_FREE)
1487 {
1488 bFound = TRUE;
1489 goto FIND_END;
1490 }
1491 }
1492 }
1493 else
1494 #endif
1495 if((eFilterType & E_DRVTSP_FLT_SCMB_MASK) ||
1496 #ifndef HWPCR_ENABLE
1497 (E_DRVTSP_FLT_TYPE_PCR == (eFilterType&~E_DRVTSP_FLT_MASK)) ||
1498 #endif
1499 (E_DRVTSP_FLT_TYPE_VIDEO == (eFilterType&~E_DRVTSP_FLT_MASK)) ||
1500 (E_DRVTSP_FLT_TYPE_AUDIO == (eFilterType&~E_DRVTSP_FLT_MASK)) ||
1501 (E_DRVTSP_FLT_TYPE_AUDIO2 == (eFilterType&~E_DRVTSP_FLT_MASK)) ||
1502 (E_DRVTSP_FLT_TYPE_AUDIO3 == (eFilterType&~E_DRVTSP_FLT_MASK)) ||
1503 (E_DRVTSP_FLT_TYPE_AUDIO4 == (eFilterType&~E_DRVTSP_FLT_MASK)) ||
1504 (E_DRVTSP_FLT_TYPE_VIDEO3D == (eFilterType&~E_DRVTSP_FLT_MASK)))
1505 {
1506 MS_U32 u321stShareIdx = 0;
1507
1508 u8CAEng = _TSP_Get_DscmbEngId_ByFltSrc(eFilterType & E_DRVTSP_FLT_SOURCE_TYPE_MASK);
1509
1510 if(u8CAEng < TSP_CA_ENGINE_NUM)
1511 {
1512 if((eFilterType & E_DRVTSP_FLT_SCMB_MASK) == E_DRVTSP_FLT_TYPE_SCMB_SHAREKEY)
1513 {
1514 pid_idx_start = _ptsp_res->_DscmbFlt_State[u8CAEng].u32ShareStart;
1515 pid_idx_end = _ptsp_res->_DscmbFlt_State[u8CAEng].u32ShareEnd;
1516 }
1517 else
1518 {
1519 pid_idx_start = _ptsp_res->_DscmbFlt_State[u8CAEng].u32Start + 1; //reserved first filter for sharekey filter
1520 pid_idx_end = _ptsp_res->_DscmbFlt_State[u8CAEng].u32End;
1521 }
1522 u321stShareIdx = _ptsp_res->_DscmbFlt_State[u8CAEng].u32Start;
1523 }
1524
1525 // For PCR & PVRCA, allocate filter form bottom to top
1526 if((E_DRVTSP_FLT_TYPE_PVR == (eFilterType&~E_DRVTSP_FLT_MASK))
1527 #ifndef HWPCR_ENABLE
1528 || (E_DRVTSP_FLT_TYPE_PCR == (eFilterType&~E_DRVTSP_FLT_MASK))
1529 #endif
1530 || (E_DRVTSP_FLT_TYPE_PVR1 == (eFilterType&~E_DRVTSP_FLT_MASK)))
1531 {
1532 for(i = (int)pid_idx_end; i >= (int)pid_idx_start; i--)
1533 {
1534 if (_ptsp_res->_TspState[u32EngId].FltState[i] == E_DRVTSP_FLT_STATE_FREE)
1535 {
1536 bFound = TRUE;
1537 goto FIND_END;
1538 }
1539 }
1540 if((eFilterType & E_DRVTSP_FLT_SCMB_MASK) == E_DRVTSP_FLT_TYPE_SCMB_SHAREKEY)
1541 {
1542 i = u321stShareIdx;
1543 if (_ptsp_res->_TspState[u32EngId].FltState[i] == E_DRVTSP_FLT_STATE_FREE)
1544 {
1545 bFound = TRUE;
1546 goto FIND_END;
1547 }
1548 }
1549 }
1550 else //For Live, allocate filter from top to bottom
1551 {
1552 if((eFilterType & E_DRVTSP_FLT_SCMB_MASK) == E_DRVTSP_FLT_TYPE_SCMB_SHAREKEY)
1553 {
1554 i = u321stShareIdx;
1555 if (_ptsp_res->_TspState[u32EngId].FltState[i] == E_DRVTSP_FLT_STATE_FREE)
1556 {
1557 bFound = TRUE;
1558 goto FIND_END;
1559 }
1560 }
1561
1562 for(i = (int)pid_idx_start; i <= (int)pid_idx_end; i++)
1563 {
1564 //Reserved filter #17 for NMatch temp writting, can not be used for section data
1565 if((i == TSP_NMATCH_FLTID) && (eFilterType & E_DRVTSP_FLT_TYPE_SECTION_MASK))
1566 {
1567 continue;
1568 }
1569
1570 if (_ptsp_res->_TspState[u32EngId].FltState[i] == E_DRVTSP_FLT_STATE_FREE)
1571 {
1572 bFound = TRUE;
1573 goto FIND_END;
1574 }
1575 }
1576 }
1577
1578 #ifndef GENERAL_DSCMB
1579 if((eFilterType & E_DRVTSP_FLT_SCMB_MASK) != 0)
1580 {
1581 goto FIND_END;
1582 }
1583 #endif
1584 }
1585
1586 if(eFilterType & E_DRVTSP_FLT_TYPE_SECTION_MASK)
1587 {
1588 pid_idx_start = TSP_SECFLT_NUM - 1;
1589 pid_idx_end = pid_idx_start;
1590 }
1591 else
1592 {
1593 pid_idx_start = TSP_PIDFLT_NUM_ALL - 1;
1594 pid_idx_end = DSCMB_FLT_SHAREKEY_END_ID;
1595 }
1596
1597 // #1 Using Non-descramble range first, and from top to buttom; at last using descramble range form bottom to top
1598 for(i = 0; ((i < DSCMB_FLT_START_ID) && (bFound == FALSE)); i++)
1599 {
1600 if (_ptsp_res->_TspState[u32EngId].FltState[i] == E_DRVTSP_FLT_STATE_FREE)
1601 {
1602 bFound = TRUE;
1603 goto FIND_END;
1604 }
1605 }
1606
1607 // # 2 Using Non-descramble range first, and from top to buttom; at last using descramble range form bottom to top
1608 #if((!defined(DUP_PIDFLT_API)) && (TSP_CA_ENGINE_NUM > 2))
1609 for(i = DSCMB2_FLT_END_ID + 1; ((i < DSCMB_FLT_SHAREKEY_START_ID) && (bFound == FALSE)); i++)
1610 {
1611 if (_ptsp_res->_TspState[u32EngId].FltState[i] == E_DRVTSP_FLT_STATE_FREE)
1612 {
1613 bFound = TRUE;
1614 goto FIND_END;
1615 }
1616 }
1617 #else
1618 for(i = DSCMB_FLT_SHAREKEY_START_ID; ((i <= pid_idx_end) && (bFound == FALSE)); i++)
1619 {
1620 //Reserved filter #17 for NMatch temp writting, can not be used for section data
1621 if((i == TSP_NMATCH_FLTID) && (eFilterType & E_DRVTSP_FLT_TYPE_SECTION_MASK)
1622 && (E_DRVTSP_FLT_TYPE_PCR != (eFilterType&~E_DRVTSP_FLT_MASK)))
1623 continue;
1624
1625 if (_ptsp_res->_TspState[u32EngId].FltState[i] == E_DRVTSP_FLT_STATE_FREE)
1626 {
1627 bFound = TRUE;
1628 goto FIND_END;
1629 }
1630 }
1631 #endif
1632
1633 // # 3 Using Non-descramble range first, and from top to buttom; at last using descramble range form bottom to top
1634 for(i = (int)pid_idx_start; ((i >= 0) && (bFound == FALSE)); i--)
1635 {
1636 //Reserved filter #17 for NMatch temp writting, can not be used for section data
1637 if((i == TSP_NMATCH_FLTID) && (eFilterType & E_DRVTSP_FLT_TYPE_SECTION_MASK)
1638 && (E_DRVTSP_FLT_TYPE_PCR != (eFilterType&~E_DRVTSP_FLT_MASK)))
1639 continue;
1640
1641 if (_ptsp_res->_TspState[u32EngId].FltState[i] == E_DRVTSP_FLT_STATE_FREE)
1642 {
1643 bFound = TRUE;
1644 break;
1645 }
1646 }
1647
1648 FIND_END:
1649
1650 if (bFound == FALSE)
1651 {
1652 _TSP_STC_Free(u32StcEng);
1653 TSP_ASSERT(0, TSP_DBG("[TSP_ERROR][%06d] No free fitler found 0x%02x\n", __LINE__, (int)i));
1654 return FALSE;
1655 }
1656
1657 if(E_DRVTSP_FLT_TYPE_PCR == (eFilterType&~E_DRVTSP_FLT_MASK))
1658 {
1659 if(_ptsp_res->_bStcAllocDisable)
1660 {
1661 for(j = 0; j< TSP_STC_NUM; j++)
1662 {
1663 if(_ptsp_res->_TspStcState[j].u32SrcType == (eFilterType & E_DRVTSP_FLT_SOURCE_TYPE_MASK))
1664 {
1665 _TSP_STC_SetPcrFlt(j, (MS_U32)i);
1666 }
1667 }
1668 }
1669 else
1670 {
1671 _TSP_STC_SetPcrFlt(u32StcEng, (MS_U32)i);
1672 _TSP_STC_Select(eFilterType, u32StcEng);
1673 }
1674 }
1675 _ptsp_res->_TspState[u32EngId].FltState[i] = E_DRVTSP_FLT_STATE_ALLOC;
1676 _ptsp_res->_TspState[u32EngId].FltType[i] = (eFilterType&(DrvTSP_FltType)(~E_DRVTSP_FLT_MASK));
1677 _ptsp_res->_TspState[u32EngId].FltSource[i] = eFilterType & E_DRVTSP_FLT_SOURCE_TYPE_MASK;
1678 #ifdef MERGE_STR_SUPPORT
1679 _ptsp_res->_TspState[u32EngId].FltSrcId[i] = (eFilterType & E_DRVTSP_FLT_SOURCEID_MASK) >> E_DRVTSP_FLT_SOURCEID_SHIFT;
1680 #endif
1681
1682 _TSP_PidFlt_Init(u32EngId, i);
1683 *pu32PidFltId = i;
1684
1685 #ifdef DUP_PIDFLT_API
1686 if(u32DupFlag == E_DRVTSP_FLT_TYPE_DUPSEC)
1687 {
1688 MS_BOOL bDupFound = FALSE;
1689
1690 for(i = (DSCMB2_FLT_END_ID + 1); i < DSCMB_FLT_SHAREKEY_START_ID; i++)
1691 {
1692 if(_ptsp_res->_TspState[u32EngId].FltState[i] == E_DRVTSP_FLT_STATE_NA)
1693 {
1694 bDupFound = TRUE;
1695 break;
1696 }
1697 }
1698 if(bDupFound == FALSE)
1699 {
1700 for(i = (DSCMB_FLT_START_ID - 1); i >= 0; i--)
1701 {
1702 if(_ptsp_res->_TspState[u32EngId].FltState[i] == E_DRVTSP_FLT_STATE_NA)
1703 {
1704 bDupFound = TRUE;
1705 break;
1706 }
1707 }
1708 }
1709
1710 if(bDupFound == TRUE)
1711 {
1712 _TSP_PidFlt_Init(u32EngId, i);
1713 _ptsp_res->_TspState[u32EngId].DupFlt[*pu32PidFltId] = i;
1714 _ptsp_res->_TspState[u32EngId].FltState[i] = E_DRVTSP_FLT_STATE_ALLOC;
1715 _ptsp_res->_TspState[u32EngId].FltType[i] = _ptsp_res->_TspState[u32EngId].FltType[*pu32PidFltId];
1716 _ptsp_res->_TspState[u32EngId].FltSource[i] = _ptsp_res->_TspState[u32EngId].FltSource[*pu32PidFltId];
1717 //ULOGD("TSP", "[%s] duplcate id %ld %d\n", __FUNCTION__, *pu32PidFltId, i);
1718 }
1719 }
1720 #endif
1721
1722 //ULOGD("TSP", "[%s] %d, time %d, u32DupFlag %x\n", __FUNCTION__, i, MsOS_GetSystemTime(), u32DupFlag);
1723
1724 return TRUE;
1725 }
1726
_TSP_PidFlt_Free(MS_U32 u32EngId,MS_U32 u32PidFltId,MS_BOOL bResetState)1727 static TSP_Result _TSP_PidFlt_Free(MS_U32 u32EngId, MS_U32 u32PidFltId, MS_BOOL bResetState)
1728 {
1729 MS_U32 u32SecFltId = 0;
1730 MS_U32 u32STCEng = 0xFFFFFFFF;
1731
1732 if ( (u32EngId >= TSP_ENGINE_NUM) ||
1733 (u32PidFltId >= TSP_PIDFLT_NUM_ALL) ||
1734 (_ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] == E_DRVTSP_FLT_STATE_FREE) )
1735 {
1736 //TSP_DBG("[TSP_ERROR][%06d] (EngId, PidFltId, FilterState)= (%ld %ld %d)\n", __LINE__, u32EngId, u32PidFltId, _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId]);
1737 MS_CRITICAL_MSG(TSP_DBG("[TSP_ERROR][%06d] Bad free parmeter\n",__LINE__));;
1738 return (TSP_Result)FALSE;
1739 }
1740
1741 u32SecFltId = _ptsp_res->_TspState[u32EngId].FltMap[u32PidFltId];
1742
1743 _TSP_PidFlt_Disable(u32EngId, u32PidFltId);
1744
1745 if((_ptsp_res->_TspState[u32EngId].FltType[u32PidFltId] == E_DRVTSP_FLT_TYPE_PCR)
1746 && (_ptsp_res->_bStcAllocDisable == FALSE))
1747 {
1748 if(_TSP_PcrId_To_StcId(u32PidFltId, &u32STCEng) == DRVTSP_OK)
1749 {
1750 _TSP_STC_Free(u32STCEng);
1751 }
1752 }
1753
1754 // Release Filter
1755 _TSP_PidFlt_Init(u32EngId, u32PidFltId);
1756
1757 #ifdef DUP_PIDFLT
1758 if(_ptsp_res->_TspState[u32EngId].DupFlt[u32PidFltId] != 0xFFFFUL)
1759 {
1760 MS_U32 u32DupId = _ptsp_res->_TspState[u32EngId].DupFlt[u32PidFltId];
1761
1762 _TSP_PidFlt_Init(u32EngId, u32DupId);
1763 _ptsp_res->_TspState[u32EngId].DupFlt[u32PidFltId] = 0xFFFFUL;
1764 _ptsp_res->_TspState[u32EngId].FltState[u32DupId] = E_DRVTSP_FLT_STATE_NA;
1765 //ULOGD("TSP", "[%s][%d] dup id %ld\n", __FUNCTION__, __LINE__, u32DupId);
1766 }
1767 #endif
1768
1769 // Reset call back function without PVR
1770 if (u32SecFltId < TSP_SECFLT_NUM)
1771 {
1772 _ptsp_res->_TspState[u32EngId].SecFltCallback[u32SecFltId] = NULL;
1773 _ptsp_res->_TspState[u32EngId].SecFltMode[u32SecFltId] = E_DRVTSP_FLT_MODE_CONTI;
1774 }
1775
1776 // clear all event while filter free
1777 if(u32SecFltId < TSP_SECFLT_NUM)
1778 {
1779 MS_U32 u32Dummy = 0;
1780
1781 _TSP_GetSecOvfId (u32SecFltId, &u32Dummy, OSAL_EVENT_OR_CLEAR);
1782 _TSP_GetSecCrcId (u32SecFltId, &u32Dummy, OSAL_EVENT_OR_CLEAR);
1783 _TSP_GetSecRdyId (u32SecFltId, &u32Dummy, OSAL_EVENT_OR_CLEAR);
1784 _TSP_GetFltDisableId(u32SecFltId, &u32Dummy, OSAL_EVENT_OR_CLEAR);
1785 }
1786
1787 if (bResetState)
1788 {
1789 _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] = E_DRVTSP_FLT_STATE_FREE;
1790 }
1791
1792 return (TSP_Result)TRUE;
1793 }
1794
_TSP_PidFlt_StateGet(MS_U32 u32EngId,MS_U32 u32PidFltId,DrvTSP_FltState * peState)1795 static MS_BOOL _TSP_PidFlt_StateGet(MS_U32 u32EngId, MS_U32 u32PidFltId, DrvTSP_FltState *peState)
1796 {
1797 MS_U32 u32SecFltId = 0;
1798 MS_U8 u8ScmbSrc = 0;
1799
1800 // don't need to check PVR pid filter
1801 TSP_ASSERT(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
1802 TSP_ASSERT(TSP_PIDFLT_NUM_ALL > u32PidFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFlt Id %u\n", __LINE__, (unsigned int)u32PidFltId));
1803 TSP_ASSERT(peState, TSP_DBG("[TSP_ERROR][%06d] NULL pointer\n", __LINE__));
1804
1805 *peState= _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId];
1806
1807 switch(_ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId])
1808 {
1809 default:
1810 case E_DRVTSP_FLT_SOURCE_TYPE_LIVE:
1811 u8ScmbSrc = 0;
1812 break;
1813 case E_DRVTSP_FLT_SOURCE_TYPE_FILE:
1814 u8ScmbSrc = 1;
1815 break;
1816 case E_DRVTSP_FLT_SOURCE_TYPE_FILE1:
1817 case E_DRVTSP_FLT_SOURCE_TYPE_TS1:
1818 u8ScmbSrc = 2;
1819 break;
1820 case E_DRVTSP_FLT_SOURCE_TYPE_FILE2:
1821 case E_DRVTSP_FLT_SOURCE_TYPE_TS2:
1822 u8ScmbSrc = 3;
1823 break;
1824 }
1825
1826 #ifdef HWPCR_ENABLE
1827 if(u32PidFltId >= TSP_PIDFLT_NUM_ALL)
1828 {
1829 return TRUE;
1830 }
1831 #endif
1832
1833 if(HAL_TSP_Scmb_Status(u8ScmbSrc, (MS_U8)(u32PidFltId >> 5UL), u32PidFltId))
1834 {
1835 *peState |= E_DRVTSP_FLT_STATE_SCRAMBLED;
1836 }
1837
1838 switch (_ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
1839 {
1840 case E_DRVTSP_FLT_TYPE_SECTION:
1841 case E_DRVTSP_FLT_TYPE_PES:
1842 case E_DRVTSP_FLT_TYPE_PACKET:
1843 case E_DRVTSP_FLT_TYPE_TELETEXT:
1844 case E_DRVTSP_FLT_TYPE_SECTION_VER:
1845 case E_DRVTSP_FLT_TYPE_SECTION_NO_PUSI:
1846 u32SecFltId = HAL_TSP_PidFlt_GetSecFlt(u32EngId, u32PidFltId);
1847 if (HAL_TSP_SecBuf_GetBufRead(u32EngId, u32SecFltId) != HAL_TSP_SecBuf_GetBufWrite(u32EngId, u32SecFltId))
1848 {
1849 *peState |= E_DRVTSP_FLT_STATE_STREAM_AVAIL;
1850 }
1851 break;
1852 case E_DRVTSP_FLT_TYPE_VIDEO:
1853 case E_DRVTSP_FLT_TYPE_AUDIO:
1854 case E_DRVTSP_FLT_TYPE_AUDIO2:
1855 case E_DRVTSP_FLT_TYPE_VIDEO3D:
1856 case E_DRVTSP_FLT_TYPE_PCR:
1857 default:
1858 break;
1859 }
1860 return TRUE;
1861 }
1862
_TSP_SecFlt_SetType(MS_U32 u32EngId,MS_U32 u32SecFltId,DrvTSP_FltType eSecFltType)1863 static void _TSP_SecFlt_SetType(MS_U32 u32EngId, MS_U32 u32SecFltId, DrvTSP_FltType eSecFltType)
1864 {
1865 MS_U32 u32FltType = TSP_SECFLT_TYPE_SEC;
1866
1867 switch (eSecFltType)
1868 {
1869 case E_DRVTSP_FLT_TYPE_TELETEXT:
1870 u32FltType = TSP_SECFLT_TYPE_TTX;
1871 break;
1872 case E_DRVTSP_FLT_TYPE_PCR:
1873 u32FltType = TSP_SECFLT_TYPE_PCR;
1874 break;
1875 case E_DRVTSP_FLT_TYPE_PES:
1876 u32FltType = TSP_SECFLT_TYPE_PES;
1877 break;
1878 case E_DRVTSP_FLT_TYPE_SECTION:
1879 u32FltType = TSP_SECFLT_TYPE_SEC;
1880 break;
1881 case E_DRVTSP_FLT_TYPE_PACKET:
1882 u32FltType = TSP_SECFLT_TYPE_PKT;
1883 break;
1884 case E_DRVTSP_FLT_TYPE_ECM:
1885 u32FltType = TSP_SECFLT_TYPE_ECM;
1886 break;
1887 case E_DRVTSP_FLT_TYPE_EMM:
1888 u32FltType = TSP_SECFLT_TYPE_EMM;
1889 break;
1890 case E_DRVTSP_FLT_TYPE_SECTION_VER:
1891 u32FltType = TSP_SECFLT_TYPE_VER;
1892 break;
1893 case E_DRVTSP_FLT_TYPE_SECTION_NO_PUSI:
1894 u32FltType = TSP_SECFLT_TYPE_SEC_NO_PUSI;
1895 break;
1896 case E_DRVTSP_FLT_TYPE_PVR:
1897 case E_DRVTSP_FLT_TYPE_CB:
1898 default:
1899 break;
1900 }
1901 HAL_TSP_SecFlt_SetType(u32EngId, u32SecFltId, u32FltType);
1902 }
1903
_TSP_SecFlt_StateGet(MS_U32 u32EngId,MS_U32 u32SecFltId,DrvTSP_FltState * peState)1904 static MS_BOOL _TSP_SecFlt_StateGet(MS_U32 u32EngId, MS_U32 u32SecFltId, DrvTSP_FltState *peState)
1905 {
1906 TSP_ASSERT(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
1907 TSP_ASSERT(TSP_SECFLT_NUM> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %u\n", __LINE__, (unsigned int)u32SecFltId));
1908 TSP_ASSERT(peState, TSP_DBG("[TSP_ERROR][%06d] NULL pointer\n", __LINE__));
1909
1910 *peState = _ptsp_res->_TspState[u32EngId].SecFltState[u32SecFltId];
1911 if (HAL_TSP_SecFlt_GetState(0, u32SecFltId) & TSP_SECFLT_STATE_OVERFLOW)
1912 {
1913 *peState |= E_DRVTSP_FLT_STATE_OVERFLOW;
1914 }
1915 return TRUE;
1916 }
1917
_TSP_SecFlt_Init(MS_U32 u32EngId,MS_U32 u32SecFltId)1918 static void _TSP_SecFlt_Init(MS_U32 u32EngId, MS_U32 u32SecFltId)
1919 {
1920 static MS_U8 u8Mask[TSP_FILTER_DEPTH] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1921 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1922 static MS_U8 u8NMask[TSP_FILTER_DEPTH] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1923 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
1924 HAL_TSP_SecFlt_ClrCtrl(u32EngId, u32SecFltId);
1925
1926 HAL_TSP_SecFlt_SelSecBuf(u32EngId, u32SecFltId, TSP_SECFLT_BUF_NULL, FALSE);
1927 HAL_TSP_SecFlt_SetMatch(u32EngId, u32SecFltId, u8Mask);
1928 HAL_TSP_SecFlt_SetMask(u32EngId, u32SecFltId, u8NMask);
1929 //HAL_TSP_SecFlt_SetNMask(HAL_TSP_SECFLT(u32EngId, u32SecFltId)), u8Mask);
1930 _TSP_SecFlt_SetType(u32EngId, u32SecFltId, E_DRVTSP_FLT_TYPE_SECTION);
1931 HAL_TSP_SecFlt_SetReqCount(u32EngId, u32SecFltId, 0);
1932 HAL_TSP_SecFlt_ResetState(u32EngId, u32SecFltId);
1933 _ptsp_res->_TspState[0].SecFltEvtNotify[u32SecFltId] = E_DRVTSP_EVENT_DATA_INIT;
1934 _ptsp_res->_TspState[0].SecFltCallback[u32SecFltId] = NULL;
1935 }
1936
1937 // Section filter ID == PID filter ID, Set *pu32SecFltId == PIDFlterID
_TSP_SecFlt_Alloc(MS_U32 u32EngId,DrvTSP_FltType eFilterType,MS_U32 * pu32SecFltId)1938 static MS_BOOL _TSP_SecFlt_Alloc(MS_U32 u32EngId, DrvTSP_FltType eFilterType, MS_U32 *pu32SecFltId)
1939 {
1940 MS_U32 u32ii = 0;
1941
1942 u32ii = *pu32SecFltId;
1943
1944 if (u32ii < TSP_SECFLT_NUM && _ptsp_res->_TspState[u32EngId].SecFltState[u32ii] == E_DRVTSP_FLT_STATE_FREE)
1945 {
1946 _ptsp_res->_TspState[u32EngId].SecFltState[u32ii] = E_DRVTSP_FLT_STATE_ALLOC;
1947 _TSP_SecFlt_Init(u32EngId, u32ii);
1948 *pu32SecFltId = u32ii;
1949 _TSP_SetSecNotifyId(*pu32SecFltId); //for isr processing checking
1950 return TRUE;
1951 }
1952 else
1953 {
1954 return FALSE;
1955 }
1956 }
1957
_TSP_SecFlt_Free(MS_U32 u32EngId,MS_U32 u32SecFltId,MS_BOOL bResetState)1958 static MS_BOOL _TSP_SecFlt_Free(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_BOOL bResetState)
1959 {
1960 HAL_TSP_SecFlt_ResetEmmIdx(u32EngId, u32SecFltId);
1961 HAL_TSP_SecFlt_SelSecBuf(0, u32SecFltId, TSP_SECFLT_BUF_NULL, FALSE);
1962 if (bResetState)
1963 {
1964 // clear all event while filter free
1965 MS_U32 u32Dummy = 0;
1966 _TSP_GetSecOvfId (u32SecFltId, &u32Dummy, OSAL_EVENT_OR_CLEAR);
1967 _TSP_GetSecCrcId (u32SecFltId, &u32Dummy, OSAL_EVENT_OR_CLEAR);
1968 _TSP_GetSecRdyId (u32SecFltId, &u32Dummy, OSAL_EVENT_OR_CLEAR);
1969 _TSP_GetFltDisableId(u32SecFltId, &u32Dummy, OSAL_EVENT_OR_CLEAR);
1970
1971 _TSP_RemoveSecNotifyId(u32SecFltId);
1972 _ptsp_res->_TspState[u32EngId].SecFltState[u32SecFltId] = E_DRVTSP_FLT_STATE_FREE;
1973 }
1974 _ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecFltId] = E_DRVTSP_EVENT_DATA_INIT;
1975 _ptsp_res->_TspState[u32EngId].s32TspEvtId[u32SecFltId] = -1;
1976
1977 return TRUE;
1978 }
1979
_TSP_SecBuf_Init(MS_U32 u32EngId,MS_U32 u32SecBufId)1980 static void _TSP_SecBuf_Init(MS_U32 u32EngId, MS_U32 u32SecBufId)
1981 {
1982 HAL_TSP_SecBuf_SetBuffer(u32EngId, u32SecBufId, 0, 0);
1983 HAL_TSP_SecBuf_ResetBuffer(u32EngId, u32SecBufId);
1984 }
1985
1986 // Section buffer ID == Section filter ID, Set *pu32SecBufId == SecFlterID
_TSP_SecBuf_Alloc(MS_U32 u32EngId,MS_U32 * pu32SecBufId)1987 static MS_BOOL _TSP_SecBuf_Alloc(MS_U32 u32EngId, MS_U32 *pu32SecBufId)
1988 {
1989 MS_U32 u32ii = *pu32SecBufId;
1990
1991 if (u32ii < TSP_SECBUF_NUM && _ptsp_res->_TspState[u32EngId].SecBufState[u32ii] == E_DRVTSP_FLT_STATE_FREE)
1992 {
1993 goto SECBUF_ALC_END;
1994 }
1995 else
1996 {
1997 return FALSE;
1998 }
1999
2000 *pu32SecBufId = 0xFFFFFFFFUL;
2001
2002 for (u32ii = 0; u32ii < TSP_SECBUF_NUM; u32ii++)
2003 {
2004 if (_ptsp_res->_TspState[u32EngId].SecBufState[u32ii] == E_DRVTSP_FLT_STATE_FREE)
2005 {
2006 break;
2007 }
2008 }
2009 if (u32ii == TSP_SECBUF_NUM)
2010 {
2011 return FALSE;
2012 }
2013
2014 SECBUF_ALC_END:
2015 _ptsp_res->_TspState[u32EngId].SecBufState[u32ii] = E_DRVTSP_FLT_STATE_ALLOC;
2016 *pu32SecBufId = u32ii;
2017 return TRUE;
2018 }
2019
_TSP_RegStateStore(void)2020 static void _TSP_RegStateStore(void)
2021 {
2022 HAL_TSP_Int_Disable(TSP_HWINT_ALL);
2023 HAL_TSP_Int2_Disable(TSP_HWINT2_ALL);
2024
2025 OSAL_TSP_IntDisable();
2026 OSAL_TSP_IntDetach();
2027 HAL_TSP_SaveFltState();
2028 }
2029
_TSP_RegStateRestore(void)2030 static void _TSP_RegStateRestore(void)
2031 {
2032 HAL_TSP_RestoreFltState();
2033 }
2034
_TSP_SecBuf_Free(MS_U32 u32EngId,MS_U32 u32SecBufId)2035 static MS_BOOL _TSP_SecBuf_Free(MS_U32 u32EngId, MS_U32 u32SecBufId)
2036 {
2037 _ptsp_res->_TspState[u32EngId].SecBufState[u32SecBufId] = E_DRVTSP_FLT_STATE_FREE;
2038 return TRUE;
2039 }
2040
_TSP_RegStateReset(void)2041 static void _TSP_RegStateReset(void)
2042 {
2043 MS_U32 u32EngId;
2044 MS_U32 u32FilterId;
2045
2046 for (u32EngId = 0; u32EngId < TSP_ENGINE_NUM; u32EngId++)
2047 {
2048 for (u32FilterId = 0; u32FilterId < TSP_PIDFLT_NUM_ALL; u32FilterId++)
2049 {
2050 _TSP_PidFlt_Init(u32EngId, u32FilterId);
2051 }
2052 for (u32FilterId = 0; u32FilterId < TSP_SECFLT_NUM; u32FilterId++)
2053 {
2054 _TSP_SecBuf_Init(u32EngId, u32FilterId);
2055 //HAL_TSP_SecBuf_SetBuffer(u32EngId, u32FilterId, 0, 0);
2056 _TSP_SecFlt_Init(u32EngId, u32FilterId);
2057 }
2058 }
2059 }
2060
_TSP_SelPad(MS_U32 u32EngId,DrvTSP_If eIf,DrvTSP_If_Set * pIfSet)2061 static TSP_Result _TSP_SelPad(MS_U32 u32EngId, DrvTSP_If eIf, DrvTSP_If_Set* pIfSet)
2062 {
2063 if (u32EngId>= TSP_ENGINE_NUM)
2064 {
2065 return DRVTSP_FAIL;
2066 }
2067
2068 if((eIf >= E_DRVTSP_IF_NUM) && (eIf != E_DRVTSP_IF_FI))
2069 {
2070 return DRVTSP_FAIL;
2071 }
2072
2073 HAL_TSP_SelPad(u32EngId, (MS_U32)eIf, (MS_U32)pIfSet->ePad, pIfSet->bParallel);
2074 HAL_TSP_SelPad_ClkInv(u32EngId, (MS_U32)eIf, pIfSet->bClkInv);
2075 HAL_TSP_SelPad_ExtSync(u32EngId, pIfSet->bExtSync, (MS_U32)eIf);
2076 HAL_TSP_SelPad_Parl(u32EngId, pIfSet->bParallel, (MS_U32)eIf);
2077
2078 #ifdef TS3_IF_SUPPORT
2079 if(pIfSet->bParallel == FALSE && pIfSet->ePad == E_DRVTSP_PAD_EXT_INPUT3)
2080 {
2081 HAL_TSP_TSOut_En(TRUE);
2082 }
2083 else
2084 {
2085 HAL_TSP_TSOut_En(FALSE);
2086 }
2087 #endif
2088
2089 return DRVTSP_OK;
2090 }
2091
2092 #if 0
_TSP_IsPidFltFreeDefer(MS_U32 u32PidFltId)2093 static MS_BOOL _TSP_IsPidFltFreeDefer(MS_U32 u32PidFltId)
2094 {
2095 MS_U32 u32Flag = 0;
2096
2097 _TSP_GetEventFreeDefer0Id(u32PidFltId, &u32Flag, E_AND);
2098 return ((u32Flag & (1 << (u32PidFltId & 0x1F))) ? TRUE: FALSE);
2099 }
2100
_TSP_SetPidFltFreeDefer(MS_U32 u32PidFltId)2101 static void _TSP_SetPidFltFreeDefer(MS_U32 u32PidFltId)
2102 {
2103 _TSP_SetEventFreeDefer0Id(u32PidFltId);
2104 }
2105
_TSP_ResetPidFltFreeDefer(MS_U32 u32PidFltId)2106 static void _TSP_ResetPidFltFreeDefer(MS_U32 u32PidFltId)
2107 {
2108 MS_U32 u32Flag = 0;
2109
2110 _TSP_GetEventFreeDefer0Id(u32PidFltId, &u32Flag, E_OR_CLEAR);
2111 }
2112 #endif
2113
2114 #if 0
_TSP_IsAskPidFltFree(MS_U32 u32PidFltId)2115 static MS_BOOL _TSP_IsAskPidFltFree(MS_U32 u32PidFltId)
2116 {
2117 MS_U32 u32Flag = 0;
2118
2119 _TSP_GetEventFree0Id(u32PidFltId, &u32Flag, E_AND);
2120 return ((u32Flag & (1 << (u32PidFltId & 0x1F))) ? TRUE: FALSE);
2121 }
2122
_TSP_AskPidFltFree(MS_U32 u32PidFltId)2123 static void _TSP_AskPidFltFree(MS_U32 u32PidFltId)
2124 {
2125 _TSP_SetEventFree0Id(u32PidFltId);
2126 }
2127
2128 //Free Section PID filters, 32 filters for one group
2129 //For 64 pid filters, there are 2 gropus
2130 //For 128 pid filters, there are 4 groups
_TSP_GetAskPidFltFree0List(MS_U32 u32Group)2131 static MS_U32 _TSP_GetAskPidFltFree0List(MS_U32 u32Group)
2132 {
2133 MS_U32 u32Flag = 0;
2134
2135 _TSP_GetModeEventFree0(u32Group, 0xFFFFFFFF, &u32Flag, E_OR);
2136
2137 return u32Flag;
2138 }
2139
2140 //Free Section PID filters
2141 //For 64 pid filters, there are 2 gropus
2142 //For 128 pid filters, there are 4 groups
_TSP_ClrAskPidFltFree0List(MS_U32 u32Group,MS_U32 u32Mask)2143 static void _TSP_ClrAskPidFltFree0List(MS_U32 u32Group, MS_U32 u32Mask)
2144 {
2145 MS_U32 u32Flag;
2146
2147 _TSP_GetModeEventFree0(u32Group, u32Mask, &u32Flag, E_OR_CLEAR);
2148 }
2149 #endif
2150
2151 //For pid filter and section filter are one by one mappig
_TSP_Flt_StateGet(MS_U32 u32EngId,MS_U32 u32FltId,DrvTSP_FltState * peState)2152 static MS_BOOL _TSP_Flt_StateGet(MS_U32 u32EngId, MS_U32 u32FltId, DrvTSP_FltState *peState)
2153 {
2154 DrvTSP_FltState PidFltState;
2155 DrvTSP_FltState SecFltState;
2156
2157 if (!_TSP_PidFlt_StateGet(u32EngId, u32FltId, &PidFltState))
2158 {
2159 return FALSE;
2160 }
2161 *peState= PidFltState;
2162 if (TSP_SECFLT_NUM<= u32FltId)
2163 {
2164 return TRUE;
2165 }
2166 if (!_TSP_SecFlt_StateGet(u32EngId, u32FltId, &SecFltState))
2167 {
2168 return FALSE;
2169 }
2170 *peState|= SecFltState;
2171 return TRUE;
2172 }
2173
2174 #if (defined(HWPCR_ENABLE) && (TSP_HWPCR_BY_HK == 1))
_TSP_PCR_Adjust(MS_U32 u32EngId)2175 static MS_BOOL _TSP_PCR_Adjust(MS_U32 u32EngId)
2176 {
2177 MS_U32 u32Pcr = 0, u32Pcr_H = 0, u32Diff = 0, u32STC = 0;
2178
2179 HAL_TSP_HWPcr_Read(u32EngId, &u32Pcr, &u32Pcr_H);
2180
2181 #if 1
2182 if(_ptsp_res->TSPHwPcrParams._u8ResetPcr[u32EngId] >= 2)
2183 {
2184 if(_ptsp_res->TSPHwPcrParams._u8ResetPcr[u32EngId] == 3)
2185 {
2186 HAL_TSP_Stc_ctrl(u32EngId, STC_SYNTH_DEFAULT);
2187 }
2188 HAL_TSP_SetSTC(u32EngId, u32Pcr, u32Pcr_H);
2189 _ptsp_res->TSPHwPcrParams._u8ResetPcr[u32EngId] = 0;
2190 _ptsp_res->TSPHwPcrParams._u32PrevStcBase[u32EngId] = u32Pcr;
2191 _ptsp_res->TSPHwPcrParams._u32PrevPllControl[u32EngId] = HAL_TSP_GetSTCSynth(u32EngId);
2192 }
2193
2194 HAL_TSP_STC_Update_Disable(u32EngId, TRUE);
2195 u32STC = HAL_TSP_GetSTC(u32EngId);
2196 HAL_TSP_STC_Update_Disable(u32EngId, FALSE);
2197
2198 //ULOGD("TSP", "Pcr %08lx, STC %08lx \n", u32Pcr, u32STC);
2199 if((u32STC - _ptsp_res->TSPHwPcrParams._u32PrevStcBase[u32EngId]) > 0x4000UL)
2200 {
2201 //ULOGD("TSP", "STC_DIFF = %08lx ==== \n\n",u32STC - _u32PrevStcBase[u32EngId]);
2202 _ptsp_res->TSPHwPcrParams._u32PrevStcBase[u32EngId] = u32STC;
2203
2204 if(_ptsp_res->TSPHwPcrParams._u32PrevStcBase[u32EngId] > u32Pcr)
2205 {
2206 u32Diff = _ptsp_res->TSPHwPcrParams._u32PrevStcBase[u32EngId] - u32Pcr;
2207 if( u32Diff <= 0x02UL)
2208 {
2209 _ptsp_res->TSPHwPcrParams._u8ResetPcr[u32EngId] = 0;
2210 }
2211 else if( u32Diff < 0x1000UL)
2212 {
2213 _ptsp_res->TSPHwPcrParams._u32PrevPllControl[u32EngId] += ((u32Diff) >> 3UL); //now = error x alpha + prev
2214 HAL_TSP_Stc_ctrl(u32EngId, _ptsp_res->TSPHwPcrParams._u32PrevPllControl[u32EngId] + ((u32Diff)>> 6UL)); //out = now + error x beta
2215 _ptsp_res->TSPHwPcrParams._u8ResetPcr[u32EngId] = 0;
2216 //ULOGD("TSP", "======== Set STC CONTROL <++> %08lx PCR/Diff = %08lx/%08lx \n",
2217 // _u32PrevPllControl[u32EngId] + ((_u32PrevStcBase[u32EngId] - u32Pcr)>>6),u32Pcr,_u32PrevStcBase[u32EngId]-u32Pcr);
2218 }
2219 else
2220 {
2221 _ptsp_res->TSPHwPcrParams._u8ResetPcr[u32EngId]++;
2222 }
2223 }
2224 else
2225 {
2226 u32Diff = u32Pcr - _ptsp_res->TSPHwPcrParams._u32PrevStcBase[u32EngId] ;
2227 if(( u32Diff) <= 0x02UL)
2228 {
2229 _ptsp_res->TSPHwPcrParams._u8ResetPcr[u32EngId] = 0;
2230 }
2231 else if((u32Diff) < 0x1000UL)
2232 {
2233 _ptsp_res->TSPHwPcrParams._u32PrevPllControl[u32EngId] -= ((u32Diff)>> 3UL); //now = error x alpha + prev
2234 HAL_TSP_Stc_ctrl(u32EngId, _ptsp_res->TSPHwPcrParams._u32PrevPllControl[u32EngId] - ((u32Diff)>> 6UL)); //out = now + error x beta
2235 _ptsp_res->TSPHwPcrParams._u8ResetPcr[u32EngId] = 0;
2236 //ULOGD("TSP", "======== Set STC CONTROL <--> %08lx PCR/Diff = %08lx/%08lx \n",
2237 // _u32PrevPllControl[u32EngId] - ((u32Pcr - _u32PrevStcBase[u32EngId] )>>6),u32Pcr,u32Pcr-_u32PrevStcBase[u32EngId] );
2238 }
2239 else
2240 {
2241 _ptsp_res->TSPHwPcrParams._u8ResetPcr[u32EngId]++;
2242 }
2243 }
2244 }
2245 #else
2246 HAL_TSP_SetSTC(u32EngId, u32Pcr, u32Pcr_H);
2247 #endif
2248
2249 return TRUE;
2250 }
2251
2252 #endif //HWPCR_ENABLE
2253
2254 //--------------------------------------------------------------------------------------------------
2255 // Interrupt service routine of TSP
2256 // Arguments: None
2257 // Return: None
2258 //--------------------------------------------------------------------------------------------------
2259 #ifdef MSOS_TYPE_LINUX_KERNEL
2260 //static irqreturn_t _TSP_Isr(int irq,void *dev_id)
_TSP_Isr(void)2261 static void _TSP_Isr(void)
2262 #else
2263 static void _TSP_Isr(void)
2264 #endif
2265 {
2266 MS_U32 u32HwInt;
2267 MS_U32 u32SwInt;
2268 MS_U32 u32HwInt2;
2269
2270 _ptsp_res->_u32DbgIntrCount++;
2271 //HAL_TSP_ISR_SAVE_ALL();
2272
2273 _TSP_INT_LOCK();
2274 u32HwInt = HAL_TSP_HW_INT_STATUS();
2275 u32SwInt = HAL_TSP_SW_INT_STATUS();
2276 u32HwInt2 = HAL_TSP_HW_INT2_STATUS();
2277 _TSP_INT_UNLOCK();
2278
2279 #if (defined(HWPCR_ENABLE) && (TSP_HWPCR_BY_HK == 1))
2280 if (u32HwInt2 & TSP_HWINT2_PCR0_UPDATE_END)
2281 {
2282 if(_TSP_ChkHwPcrNotifyId(0))
2283 {
2284 _TSP_PCR_Adjust(0);
2285 }
2286 else
2287 {
2288 u32HwInt2 &= ~TSP_HWINT2_PCR0_UPDATE_END;
2289 }
2290 }
2291 if (u32HwInt2 & TSP_HWINT2_PCR1_UPDATE_END)
2292 {
2293 if(_TSP_ChkHwPcrNotifyId(1))
2294 {
2295 _TSP_PCR_Adjust(1);
2296 }
2297 else
2298 {
2299 u32HwInt2 &= ~TSP_HWINT2_PCR1_UPDATE_END;
2300 }
2301 }
2302 #endif
2303
2304 //PVR using polling mode, so ignore PVR interrupts
2305 if (HAS_FLAG(u32HwInt, TSP_HWINT_HW_PVR1_MASK))
2306 {
2307 if(_TSP_ChkPvrNotifyId(0))
2308 {
2309 _TSP_SetEvent(_ptsp_res->_s32PvrEvtId[0], TSP_TASK_EVENT_PVR0_RDY_SELF|TSP_TASK_EVENT_PVR0_RDY_POLL|TSP_TASK_EVENT_PVR1_RDY_SELF|TSP_TASK_EVENT_PVR1_RDY_POLL);
2310 }
2311 else
2312 {
2313 u32HwInt &= ~TSP_HWINT_HW_PVR1_MASK;
2314 }
2315 }
2316 if (HAS_FLAG(u32HwInt2, (TSP_HWINT_HW_PVR2_MASK)))
2317 {
2318 if(_TSP_ChkPvrNotifyId(1))
2319 {
2320 _TSP_SetEvent(_ptsp_res->_s32PvrEvtId[1], TSP_TASK_EVENT_PVR2PVR0_RDY_SELF|TSP_TASK_EVENT_PVR2PVR0_RDY_POLL|TSP_TASK_EVENT_PVR2PVR1_RDY_SELF|TSP_TASK_EVENT_PVR2PVR1_RDY_POLL);
2321 }
2322 else
2323 {
2324 u32HwInt2 &= ~TSP_HWINT_HW_PVR2_MASK;
2325 }
2326 }
2327
2328 #ifdef TS3_IF_SUPPORT
2329 if (HAS_FLAG(u32HwInt2, (TSP_HWINT_HW_PVRCB_MASK)))
2330 {
2331 if(_TSP_ChkPvrNotifyId(2))
2332 {
2333 _TSP_SetEvent(_ptsp_res->_s32PvrEvtId[2], TSP_TASK_EVENT_CBPVR0_RDY_SELF|TSP_TASK_EVENT_CBPVR0_RDY_POLL);
2334 }
2335 else
2336 {
2337 u32HwInt2 &= ~TSP_HWINT_HW_PVRCB_MASK;
2338 }
2339 }
2340 #endif
2341
2342 if (u32SwInt & TSP_SWINT_CTRL_FIRE)
2343 {
2344 MS_U32 u32EngId;
2345 MS_U32 u32SecFltId;
2346 MS_U32 u32IntStat;
2347 //REG_SecFlt* pSecFilter;
2348
2349 u32EngId = (u32SwInt & TSP_SWINT_INFO_ENG_MASK) >> TSP_SWINT_INFO_ENG_SHFT;
2350 u32IntStat = (u32SwInt & TSP_SWINT_STATUS_CMD_MASK) >> TSP_SWINT_STATUS_CMD_SHFT;
2351 u32SecFltId = (u32SwInt & TSP_SWINT_INFO_SEC_MASK) >> TSP_SWINT_INFO_SEC_SHFT;
2352 //pSecFilter = HAL_TSP_SECFLT(u32EngID, u32SecFltId);
2353
2354 #if DMX_DEBUG
2355 extern DMX_FLT_DBG_INFO stDmxDbgInfo[];
2356
2357 if(u32IntStat == TSP_SWINT_STATUS_SEC_RDY ||
2358 u32IntStat == TSP_SWINT_STATUS_REQ_RDY )
2359 {
2360 stDmxDbgInfo[u32SecFltId].u32Int_rdy ++;
2361 }
2362 else if(u32IntStat == TSP_SWINT_STATUS_BUF_OVFLOW)
2363 {
2364 stDmxDbgInfo[u32SecFltId].u32Int_ovf ++;
2365 }
2366 else if(u32IntStat == TSP_SWINT_STATUS_SEC_CRCERR)
2367 {
2368 stDmxDbgInfo[u32SecFltId].u32Int_crc ++;
2369 }
2370 #endif
2371
2372 if(_ptsp_res->_TspState[u32EngId].SecFltState[u32SecFltId] == E_DRVTSP_FLT_STATE_FREE)
2373 goto CLEAR_INT;
2374
2375 if(_TSP_ChkSecNotifyId(u32SecFltId) == FALSE)
2376 {
2377 u32SwInt = 0;
2378 u32IntStat = 0;
2379 u32HwInt &= ~TSP_HWINT_TSP_SW_INT_STATUS;
2380 }
2381 else if(_u32LibMode == DRVTSP_CMD_LIB_MODE_KRN)
2382 {
2383 _s32TspEventId = _ptsp_res->_TspState[u32EngId].s32TspEvtId[u32SecFltId];
2384 }
2385
2386 switch (u32IntStat)
2387 {
2388 case TSP_SWINT_CMD_DMA_PAUSE:
2389 HAL_TSP_TsDma_Pause();
2390 break;
2391
2392 case TSP_SWINT_CMD_DMA_RESUME:
2393 HAL_TSP_TsDma_Resume();
2394 break;
2395 case TSP_SWINT_STATUS_SEC_RDY:
2396 case TSP_SWINT_STATUS_REQ_RDY:
2397 case TSP_SWINT_STATUS_SEC_CRCERR:
2398 //printf("SEC %d\n", (int)u32SecFltId);
2399 if (E_DRVTSP_FLT_MODE_ONESHOT & _ptsp_res->_TspState[u32EngId].SecFltMode[u32SecFltId])
2400 {
2401 _TSP_SetFltDisableId(u32SecFltId);
2402 }
2403 if ((TSP_SWINT_STATUS_SEC_CRCERR == u32IntStat) && (_ptsp_res->_TspState[u32EngId].SecFltMode[u32SecFltId] & E_DRVTSP_FLT_MODE_CRCCHK))
2404 {
2405 //printf("ERR %d\n", (int)u32SecFltId);
2406 if (_ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecFltId] & E_DRVTSP_EVENT_SEC_CRCERR)
2407 {
2408 _TSP_SetSecCrcId(u32SecFltId); // Set section event flag
2409 }
2410 else
2411 {
2412 break;
2413 }
2414 }
2415 else
2416 {
2417 //printf("SEC %d\n", (int)u32SecFltId);
2418 _TSP_SetSecRdyId(u32SecFltId); // Set section event flag
2419 }
2420
2421 if ((_ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecFltId] & E_DRVTSP_EVENT_CB_MASK) == E_DRVTSP_EVENT_CB_POLL)
2422 {
2423 _TSP_SetEvent(_s32TspEventId, TSP_TASK_EVENT_SECTION_POLL); // Trigger task
2424 }
2425 else if ((_ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecFltId] & E_DRVTSP_EVENT_CB_MASK) == E_DRVTSP_EVENT_CB_SELF)
2426 {
2427 _TSP_SetEvent(_s32TspEventId, TSP_TASK_EVENT_SECTION_SELF); // Trigger task
2428 #ifdef MSOS_TYPE_LINUX_KERNEL
2429 wake_up_interruptible(&(tsp_wq_head[u32SecFltId]));
2430 #endif
2431 }
2432 break;
2433
2434 case TSP_SWINT_STATUS_BUF_OVFLOW:
2435 //printf("OVF %d\n", (int)u32SecFltId);
2436 _TSP_SetFltDisableId(u32SecFltId);
2437 _TSP_SetSecOvfId(u32SecFltId); // Set section event flag
2438 if ((_ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecFltId] & E_DRVTSP_EVENT_CB_MASK) == E_DRVTSP_EVENT_CB_POLL)
2439 {
2440 _TSP_SetEvent(_s32TspEventId, TSP_TASK_EVENT_SECTION_POLL); // Trigger task
2441 }
2442 else if ((_ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecFltId] & E_DRVTSP_EVENT_CB_MASK) == E_DRVTSP_EVENT_CB_SELF)
2443 {
2444 _TSP_SetEvent(_s32TspEventId, TSP_TASK_EVENT_SECTION_SELF); // Trigger task
2445 #ifdef MSOS_TYPE_LINUX_KERNEL
2446 wake_up_interruptible(&(tsp_wq_head[u32SecFltId]));
2447 #endif
2448
2449 }
2450 break;
2451
2452 case TSP_SWINT_STATUS_PKT_OVRUN:
2453 // Enable debug message when PCR filter can be handle by hardware.
2454 // TSP_DBG("Packet Overrun %d\n", u32EngId);
2455 break;
2456
2457 case TSP_SWINT_STATUS_SEC_ERROR:
2458 // [ISR print]
2459 // TSP_DBG("SEC error %d-0x%02X\n", u32EngId, u32SecFltId);
2460 break;
2461
2462 case TSP_SWINT_STATUS_DEBUG:
2463 // [ISR print]
2464 // TSP_DBG("DEBUG %d-0x%02X\n", u32EngId, u32SecFltId);
2465 if(_FwDbgInfo.bEnable)
2466 {
2467 _TSP_SetEvent(_s32TspEventId, TSP_TASK_EVENT_FWMSG);
2468 #ifdef MSOS_TYPE_LINUX_KERNEL
2469 wake_up_interruptible(&(tsp_wq_head[u32SecFltId]));
2470 #endif
2471
2472 }
2473 break;
2474
2475 default:
2476 // [ISR print]
2477 // DBG_TSP(TSP_DBG("Unknown TSP interrupt %d\n", u32EngId));
2478 break;
2479 }
2480 }
2481
2482 CLEAR_INT:
2483
2484 _TSP_INT_LOCK();
2485 //If it still has interrupt status, it should be processed by another process again, do not clear interrupt status
2486 if(u32SwInt)
2487 {
2488 HAL_TSP_Int_ClearSw();
2489 }
2490 if(u32HwInt)
2491 {
2492 HAL_TSP_Int_ClearHw(u32HwInt);
2493 }
2494 if(u32HwInt2)
2495 {
2496 HAL_TSP_Int_ClearHw2(u32HwInt2);
2497 }
2498 _TSP_INT_UNLOCK();
2499
2500 #ifdef MSOS_TYPE_LINUX_KERNEL
2501 //return IRQ_HANDLED;
2502 #endif
2503
2504 OSAL_TSP_IntEnable();
2505 }
2506
MDrv_TSP_SecFlt_Update(MS_U32 u32EngId,MS_U32 u32SecFltId)2507 void MDrv_TSP_SecFlt_Update(MS_U32 u32EngId, MS_U32 u32SecFltId)
2508 {
2509 _TSP_SetSecRdyId(u32SecFltId);
2510 }
2511
_TSP_Isr_Proc_SecRdyCrc(MS_U32 u32EngId,MS_U32 u32FltId,MS_U32 u32CbOpt,MS_U32 * pu32Evt)2512 static MS_BOOL _TSP_Isr_Proc_SecRdyCrc(MS_U32 u32EngId, MS_U32 u32FltId, MS_U32 u32CbOpt, MS_U32* pu32Evt)
2513 {
2514 MS_BOOL bData = 0;
2515 MS_U32 u32Event;
2516 MS_U32 u32Events;
2517 MS_U32 u32EvtNotify;
2518 static DrvTSP_Msg msg;
2519 MS_PHY phyRead;
2520 MS_U32 u32PIDFlt;
2521 P_DrvTSP_EvtCallback pfEvtCallback = NULL;
2522
2523 *pu32Evt = (MS_U32)E_DRVTSP_EVENT_DATA_INIT;
2524
2525 if (E_DRVTSP_EVENT_CB_POLL == u32CbOpt)
2526 {
2527 _TSP_GetEvent(_s32TspEventId, u32Events, TSP_TASK_EVENT_SECTION_POLL, OSAL_EVENT_OR_CLEAR, 0);
2528 }
2529
2530 _TSP_IND_LOCK();
2531
2532 //using section filter ID to find the mapping pid filter id
2533 for(u32PIDFlt = 0; u32PIDFlt < TSP_SECFLT_NUM; u32PIDFlt++)
2534 {
2535 if(_ptsp_res->_TspState[u32EngId].FltMap[u32PIDFlt] == u32FltId)
2536 break;
2537 }
2538
2539 if(u32PIDFlt >= TSP_SECFLT_NUM)
2540 {
2541 _TSP_IND_UNLOCK();
2542 return FALSE;
2543 }
2544
2545 if ((E_DRVTSP_FLT_MODE_ONESHOT & _ptsp_res->_TspState[u32EngId].SecFltMode[u32FltId]) == 0)
2546 {
2547 if (!(_ptsp_res->_TspState[u32EngId].FltState[u32PIDFlt] & E_DRVTSP_FLT_STATE_ENABLE))
2548 {
2549 // TSP_DBG("[%s][%d] %d 0x%08x\n", __FUNCTION__, __LINE__,
2550 //(int)u32FltId, (int)_ptsp_res->_TspState[u32EngId].FltState[u32FltId]);
2551 _TSP_IND_UNLOCK();
2552 return FALSE;
2553 }
2554 }
2555
2556 if (_TSP_GetFltDisableId(u32FltId, &u32Event, OSAL_EVENT_OR_CLEAR))
2557 {
2558 //No need to disable filter here or Overflow callback will miss.
2559 _TSP_PidFlt_Disable(u32EngId, u32PIDFlt); // critical section
2560 //_TSP_GetSecRdyId(u32FltId, &u32Event, OSAL_EVENT_OR_CLEAR);
2561 //_TSP_GetSecOvfId(u32FltId, &u32Event, OSAL_EVENT_OR_CLEAR);
2562 }
2563
2564 phyRead = HAL_TSP_SecBuf_GetBufRead(u32EngId, u32FltId);
2565 bData = (phyRead != HAL_TSP_SecBuf_GetBufWrite(u32EngId, u32FltId))? TRUE: FALSE; // critical section
2566
2567 if (bData)
2568 {
2569 if (E_DRVTSP_EVENT_CB_POLL == u32CbOpt)
2570 {
2571 *pu32Evt = (MS_U32)E_DRVTSP_EVENT_DATA_READY;
2572 }
2573 else
2574 {
2575 u32EvtNotify = _ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32FltId];
2576 pfEvtCallback = _ptsp_res->_TspState[u32EngId].SecFltCallback[u32FltId];
2577 if ((u32EvtNotify & E_DRVTSP_EVENT_DATA_READY) && pfEvtCallback)
2578 {
2579 if(_ptsp_res->_TspState[u32EngId].FltState[u32PIDFlt] & E_DRVTSP_FLT_STATE_FREEING)
2580 {
2581 //ULOGD("TSP", "[%s][%d]Warning!! Filter %u is closing %x\n", __FUNCTION__, __LINE__, (unsigned int)u32PIDFlt, (unsigned int)stDrvState);
2582 _TSP_IND_UNLOCK();
2583 MsOS_DelayTask(1);
2584 return FALSE;
2585 }
2586 else
2587 {
2588 _ptsp_res->_TspState[u32EngId].FltState[u32PIDFlt] |= E_DRVTSP_FLT_STATE_CBRUN;
2589 }
2590
2591 msg.FltInfo = (u32EngId <<MSG_FLTINFO_ENG_ID_SHFT) | (u32FltId <<MSG_FLTINFO_SEC_ID_SHFT);
2592 _u32TaskLine = __LINE__;
2593 _TSP_IND_UNLOCK();
2594 pfEvtCallback(E_DRVTSP_EVENT_DATA_READY, &msg);
2595 _TSP_IND_LOCK();
2596 _u32TaskLine = __LINE__;
2597
2598 _ptsp_res->_TspState[u32EngId].FltState[u32PIDFlt] &= ~E_DRVTSP_FLT_STATE_CBRUN;
2599 if (phyRead == HAL_TSP_SecBuf_GetBufRead(u32EngId, u32FltId))
2600 {
2601 _TSP_GetSecRdyId(u32FltId, &u32Event, OSAL_EVENT_OR_CLEAR);
2602 }
2603 }
2604 }
2605 }
2606 /*else
2607 {
2608 _TSP_GetSecRdyId(u32FltId, &u32Event, OSAL_EVENT_OR_CLEAR);
2609 }*/
2610
2611 //Clear evets
2612 if (E_DRVTSP_EVENT_CB_POLL == u32CbOpt)
2613 {
2614 _TSP_GetSecRdyId(u32FltId, &u32Event, OSAL_EVENT_OR_CLEAR);
2615 }
2616
2617 _TSP_IND_UNLOCK();
2618
2619 if (bData)
2620 {
2621 return TRUE;
2622 }
2623
2624 //jump_bad_state:
2625 return FALSE;
2626 }
2627
_TSP_Isr_Proc_SecCrcErr(MS_U32 u32EngId,MS_U32 u32FltId,MS_U32 u32CbOpt,MS_U32 * pu32Evt)2628 static MS_BOOL _TSP_Isr_Proc_SecCrcErr(MS_U32 u32EngId, MS_U32 u32FltId, MS_U32 u32CbOpt, MS_U32* pu32Evt)
2629 {
2630 MS_U32 u32Events;
2631 MS_U32 u32EvtNotify;
2632 P_DrvTSP_EvtCallback pfEvtCallback = NULL;
2633 static DrvTSP_Msg msg;
2634 MS_U32 u32PIDFlt;
2635
2636 *pu32Evt = (MS_U32)E_DRVTSP_EVENT_DATA_INIT;
2637
2638 if (E_DRVTSP_EVENT_CB_POLL == u32CbOpt)
2639 {
2640 _TSP_GetEvent(_s32TspEventId, u32Events, TSP_TASK_EVENT_SECTION_POLL, OSAL_EVENT_OR_CLEAR, 0);
2641 }
2642
2643 _TSP_IND_LOCK();
2644
2645 //using section filter ID to find the mapping pid filter id
2646 for(u32PIDFlt = 0; u32PIDFlt < TSP_SECFLT_NUM; u32PIDFlt++)
2647 {
2648 if(_ptsp_res->_TspState[u32EngId].FltMap[u32PIDFlt] == u32FltId)
2649 break;
2650 }
2651 if(u32PIDFlt == TSP_SECFLT_NUM)
2652 {
2653 _TSP_IND_UNLOCK();
2654 return FALSE;
2655 }
2656
2657 if ((_ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32FltId] & E_DRVTSP_EVENT_SEC_CRCERR) == 0)
2658 {
2659 _TSP_IND_UNLOCK();
2660 return FALSE;
2661 }
2662
2663 if (E_DRVTSP_EVENT_CB_POLL == u32CbOpt)
2664 {
2665 *pu32Evt = (MS_U32)E_DRVTSP_EVENT_SEC_CRCERR;
2666 }
2667 else
2668 {
2669 u32EvtNotify = _ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32FltId];
2670 pfEvtCallback = _ptsp_res->_TspState[u32EngId].SecFltCallback[u32FltId];
2671 if ((u32EvtNotify & E_DRVTSP_EVENT_SEC_CRCERR) && pfEvtCallback)
2672 {
2673 msg.FltInfo = (u32EngId <<MSG_FLTINFO_ENG_ID_SHFT) | (u32FltId <<MSG_FLTINFO_SEC_ID_SHFT);
2674 //_TSP_SECFLT_UNLOCK(u32EngId, u32SecFltId);
2675 _u32TaskLine = __LINE__;
2676 _TSP_IND_UNLOCK();
2677 pfEvtCallback(E_DRVTSP_EVENT_SEC_CRCERR, &msg);
2678 _u32TaskLine = __LINE__;
2679 return TRUE;
2680 }
2681 }
2682
2683 _TSP_IND_UNLOCK();
2684
2685 return TRUE;
2686 }
2687
_TSP_Isr_Proc_Pvr(MS_U32 u32CbOpt)2688 static void _TSP_Isr_Proc_Pvr(MS_U32 u32CbOpt)
2689 {
2690 MS_U32 u32Events;
2691 static DrvTSP_Msg msg;
2692 MS_U8 u8ii;
2693
2694 for(u8ii = 0; u8ii < TSP_PVR_IF_NUM; u8ii++)
2695 {
2696 if ((_ptsp_res->_PvrEvtNotify[u8ii] & E_DRVTSP_EVENT_CB_MASK) == u32CbOpt)
2697 {
2698 break;
2699 }
2700 }
2701
2702 if(u8ii == TSP_PVR_IF_NUM)
2703 {
2704 return;
2705 }
2706
2707 if (u32CbOpt == E_DRVTSP_EVENT_CB_POLL)
2708 {
2709 _TSP_GetEvent(_s32TspEventId, u32Events, TSP_TASK_EVENT_PVR0_RDY_POLL | TSP_TASK_EVENT_PVR1_RDY_POLL|
2710 TSP_TASK_EVENT_CBPVR0_RDY_POLL |
2711 TSP_TASK_EVENT_PVR2PVR0_RDY_POLL | TSP_TASK_EVENT_PVR2PVR1_RDY_POLL,
2712 OSAL_EVENT_OR_CLEAR, 0);
2713 }
2714 else
2715 {
2716 _TSP_GetEvent(_s32TspEventId, u32Events, TSP_TASK_EVENT_PVR_SELF |
2717 TSP_TASK_EVENT_CBPVR0_RDY_SELF |
2718 TSP_TASK_EVENT_PVR2PVR0_RDY_SELF | TSP_TASK_EVENT_PVR2PVR1_RDY_SELF
2719 , OSAL_EVENT_OR_CLEAR, 0);
2720 }
2721
2722 if(_ptsp_res->_PvrEvtNotify[0] && _ptsp_res->_PvrCallback[0])
2723 {
2724 switch (u32Events & (TSP_TASK_EVENT_PVR0_RDY_POLL | TSP_TASK_EVENT_PVR1_RDY_POLL | TSP_TASK_EVENT_PVR0_RDY_SELF | TSP_TASK_EVENT_PVR1_RDY_SELF))
2725 {
2726 case TSP_TASK_EVENT_PVR0_RDY_SELF:
2727 case TSP_TASK_EVENT_PVR0_RDY_POLL:
2728 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[0], E_DRVTSP_EVENT_PVRBUF_FULL))
2729 {
2730 msg.PvrBufId = (0x0 << MSG_PVRBUF_ID_SHFT) | (0 << MSG_PVR_ID_SHFT);
2731 _ptsp_res->_PvrCallback[0](E_DRVTSP_EVENT_PVRBUF_FULL, &msg);
2732 }
2733 break;
2734 case TSP_TASK_EVENT_PVR1_RDY_SELF:
2735 case TSP_TASK_EVENT_PVR1_RDY_POLL:
2736 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[0], E_DRVTSP_EVENT_PVRBUF_FULL))
2737 {
2738 msg.PvrBufId = (0x1 << MSG_PVRBUF_ID_SHFT) | (0 << MSG_PVR_ID_SHFT);
2739 _ptsp_res->_PvrCallback[0](E_DRVTSP_EVENT_PVRBUF_FULL, &msg);
2740 }
2741 break;
2742 case (TSP_TASK_EVENT_PVR0_RDY_SELF | TSP_TASK_EVENT_PVR1_RDY_SELF):
2743 case (TSP_TASK_EVENT_PVR0_RDY_POLL | TSP_TASK_EVENT_PVR1_RDY_POLL):
2744 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[0], E_DRVTSP_EVENT_PVRBUF_OVERFLOW))
2745 {
2746 msg.PvrBufId = (MSG_PVRBUF_ID_NULL << MSG_PVRBUF_ID_SHFT) | (0 << MSG_PVR_ID_SHFT);
2747 _ptsp_res->_PvrCallback[0](E_DRVTSP_EVENT_PVRBUF_OVERFLOW, &msg);
2748 }
2749 break;
2750 default:
2751 break;
2752 }
2753 }
2754
2755 #if (TSP_PVR_IF_NUM > 1)
2756 if(_ptsp_res->_PvrEvtNotify[1] && _ptsp_res->_PvrCallback[1])
2757 {
2758 switch (u32Events & (TSP_TASK_EVENT_PVR2PVR0_RDY_POLL | TSP_TASK_EVENT_PVR2PVR1_RDY_POLL | TSP_TASK_EVENT_PVR2PVR0_RDY_SELF | TSP_TASK_EVENT_PVR2PVR1_RDY_SELF))
2759 {
2760 case TSP_TASK_EVENT_PVR2PVR0_RDY_SELF:
2761 case TSP_TASK_EVENT_PVR2PVR0_RDY_POLL:
2762 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[1], E_DRVTSP_EVENT_PVRBUF_FULL))
2763 {
2764 msg.PvrBufId = (0x0 << MSG_PVRBUF_ID_SHFT) | (1 << MSG_PVR_ID_SHFT);
2765 _ptsp_res->_PvrCallback[1](E_DRVTSP_EVENT_PVRBUF_FULL, &msg);
2766 }
2767 break;
2768 case TSP_TASK_EVENT_PVR2PVR1_RDY_SELF:
2769 case TSP_TASK_EVENT_PVR2PVR1_RDY_POLL:
2770 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[1], E_DRVTSP_EVENT_PVRBUF_FULL))
2771 {
2772 msg.PvrBufId = (0x1 << MSG_PVRBUF_ID_SHFT) | (1 << MSG_PVR_ID_SHFT);
2773 _ptsp_res->_PvrCallback[1](E_DRVTSP_EVENT_PVRBUF_FULL, &msg);
2774 }
2775 break;
2776 case (TSP_TASK_EVENT_PVR2PVR0_RDY_SELF | TSP_TASK_EVENT_PVR2PVR1_RDY_SELF):
2777 case (TSP_TASK_EVENT_PVR2PVR0_RDY_POLL | TSP_TASK_EVENT_PVR2PVR1_RDY_POLL):
2778 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[1], E_DRVTSP_EVENT_PVRBUF_OVERFLOW))
2779 {
2780 msg.PvrBufId = (MSG_PVRBUF_ID_NULL << MSG_PVRBUF_ID_SHFT) | (1 << MSG_PVR_ID_SHFT);
2781 _ptsp_res->_PvrCallback[1](E_DRVTSP_EVENT_PVRBUF_OVERFLOW, &msg);
2782 }
2783 break;
2784 default:
2785 break;
2786 }
2787 }
2788 #endif
2789
2790 #ifdef TS3_IF_SUPPORT
2791 if(_ptsp_res->_PvrEvtNotify[2] && _ptsp_res->_PvrCallback[2])
2792 {
2793 switch (u32Events & (TSP_TASK_EVENT_CBPVR0_RDY_SELF | TSP_TASK_EVENT_CBPVR0_RDY_POLL))
2794 {
2795 case TSP_TASK_EVENT_CBPVR0_RDY_SELF:
2796 case TSP_TASK_EVENT_CBPVR0_RDY_POLL:
2797 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[2], E_DRVTSP_EVENT_PVRBUF_FULL))
2798 {
2799 msg.PvrBufId = (0x0 << MSG_PVRBUF_ID_SHFT) | (2 << MSG_PVR_ID_SHFT);
2800 _ptsp_res->_PvrCallback[2](E_DRVTSP_EVENT_PVRBUF_FULL, &msg);
2801 }
2802 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[2], E_DRVTSP_EVENT_PVRBUF_OVERFLOW))
2803 {
2804 msg.PvrBufId = (MSG_PVRBUF_ID_NULL << MSG_PVRBUF_ID_SHFT) | (2 << MSG_PVR_ID_SHFT);
2805 _ptsp_res->_PvrCallback[2](E_DRVTSP_EVENT_PVRBUF_OVERFLOW, &msg);
2806 }
2807 break;
2808 default:
2809 break;
2810 }
2811 }
2812 #endif
2813 }
2814
_TSP_Isr_Proc_SecOvf(MS_U32 u32EngId,MS_U32 u32SecFltId,MS_U32 u32CbOpt,MS_U32 * pu32Evt)2815 static MS_BOOL _TSP_Isr_Proc_SecOvf(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_U32 u32CbOpt, MS_U32* pu32Evt)
2816 {
2817 static DrvTSP_Msg msg;
2818 MS_U32 u32PidFltId;
2819 MS_U32 u32EvtNotify, u32Events = 0;
2820 P_DrvTSP_EvtCallback pfEvtCallback = NULL;
2821
2822 *pu32Evt = (MS_U32)E_DRVTSP_EVENT_DATA_INIT;
2823
2824 // disable overflow filter
2825 _TSP_IND_LOCK();
2826
2827 for (u32PidFltId = 0; u32PidFltId < TSP_SECFLT_NUM; u32PidFltId++)
2828 {
2829 if (u32SecFltId == _ptsp_res->_TspState[u32EngId].FltMap[u32PidFltId])
2830 {
2831 break;
2832 }
2833 }
2834
2835 if(u32PidFltId >= TSP_SECFLT_NUM)
2836 {
2837 _TSP_IND_UNLOCK();
2838 return FALSE;
2839 }
2840
2841 if (_TSP_GetFltDisableId(u32SecFltId, &u32Events, OSAL_EVENT_OR_CLEAR))
2842 {
2843 if (_ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] & E_DRVTSP_FLT_STATE_ENABLE)
2844 {
2845 _TSP_PidFlt_Disable(u32EngId, u32PidFltId); // critical section
2846 }
2847 }
2848
2849 if (E_DRVTSP_EVENT_CB_POLL == u32CbOpt)
2850 {
2851 *pu32Evt = (MS_U32)E_DRVTSP_EVENT_BUF_OVERFLOW;
2852
2853 //---- if overflow, clear evets to wait restarting ------------
2854 _TSP_GetSecOvfId (u32SecFltId, &u32Events, OSAL_EVENT_OR_CLEAR);
2855 _TSP_GetSecCrcId (u32SecFltId, &u32Events, OSAL_EVENT_OR_CLEAR);
2856 _TSP_GetSecRdyId (u32SecFltId, &u32Events, OSAL_EVENT_OR_CLEAR);
2857 //-------------------------------------------------------------------------
2858 }
2859 else
2860 {
2861 if (_ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] == E_DRVTSP_FLT_STATE_FREE)
2862 {
2863 goto PROC_END;
2864 }
2865
2866 u32EvtNotify = _ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecFltId];
2867 pfEvtCallback = _ptsp_res->_TspState[u32EngId].SecFltCallback[u32SecFltId];
2868 if ((u32EvtNotify & E_DRVTSP_EVENT_BUF_OVERFLOW) && pfEvtCallback)
2869 {
2870 if(_ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] & E_DRVTSP_FLT_STATE_FREEING)
2871 {
2872 //ULOGD("TSP", "[%s][%d]Warning!! Filter %u is closing %x\n", __FUNCTION__, __LINE__, (unsigned int)u32PidFltId, (unsigned int)stDrvState);
2873 _TSP_IND_UNLOCK();
2874 MsOS_DelayTask(1);
2875 return TRUE;
2876 }
2877 else
2878 {
2879 _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] |= E_DRVTSP_FLT_STATE_CBRUN;
2880 }
2881
2882 msg.FltInfo = (u32EngId <<MSG_FLTINFO_ENG_ID_SHFT) | (u32SecFltId <<MSG_FLTINFO_SEC_ID_SHFT);
2883 _u32TaskLine = __LINE__;
2884 _TSP_IND_UNLOCK();
2885 pfEvtCallback(E_DRVTSP_EVENT_BUF_OVERFLOW, &msg);
2886 _TSP_IND_LOCK();
2887 _u32TaskLine = __LINE__;
2888 _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] &= ~E_DRVTSP_FLT_STATE_CBRUN;
2889
2890 }
2891 }
2892
2893 PROC_END:
2894
2895 _TSP_IND_UNLOCK();
2896
2897 return TRUE;
2898 }
2899
_TSP_Isr_ProcSelf(OSAL_TSP_ProcTypeParam * pData)2900 static void _TSP_Isr_ProcSelf(OSAL_TSP_ProcTypeParam* pData)
2901 {
2902 TSP_Result* pRet = (TSP_Result*)pData->pRet;
2903 MS_U32 u32Events = 0, u32SecRdy = 0, u32SecOvf = 0, u32SecCrc = 0;//, u32SecFree = 0;
2904 MS_U32 i = 0, j = 0;
2905 MS_U32 u32Evt = 0;
2906 //MS_U32 u32PidFltId;
2907 MS_U32 u32GroupNum = (TSP_SECFLT_NUM+31)>>5;
2908 //MS_U32 u32Mask;
2909 //MS_U32 u32AskFreeFltList;
2910
2911 #if 0
2912 MS_U32 u32TempEvent = 0;
2913
2914 _TSP_GetEvent(u32TempEvent, TSP_TASK_EVENT_FWMSG, OSAL_EVENT_OR_CLEAR, 0);
2915 if(u32TempEvent & (TSP_TASK_EVENT_FWMSG))
2916 {
2917 _DumpFwMsg();
2918 }
2919 #endif
2920
2921 _u32TaskLine = __LINE__;
2922
2923 if(_u32LibMode == DRVTSP_CMD_LIB_MODE_KRN)
2924 {
2925 #ifdef DMX_UTOPIA_2K
2926 u32Events = pData->u32PrcEvt;
2927 #endif //DMX_UTOPIA_2K
2928 }
2929 else
2930 {
2931 _TSP_GetEvent(_s32TspEventId, u32Events, TSP_TASK_EVENT_GROUP_SELF|TSP_TASK_EVENT_FLT_FREE, OSAL_EVENT_OR_CLEAR, MSOS_WAIT_FOREVER);
2932 *pRet = DRVTSP_FAIL;
2933 }
2934
2935 if(u32Events & (TSP_TASK_EVENT_PVR_SELF|TSP_TASK_EVENT_PVR_POLL))
2936 {
2937 _TSP_Isr_Proc_Pvr(E_DRVTSP_EVENT_CB_SELF);
2938 }
2939
2940 if (u32Events & TSP_TASK_EVENT_SECTION_SELF)
2941 {
2942 for (i = 0; i < TSP_ENGINE_NUM; i++)
2943 {
2944 MS_U32 u32SecFltId;
2945
2946 for (j = 0; j < u32GroupNum; j++)
2947 {
2948 _TSP_GetModeSecOvf(j, 0xFFFFFFFFUL, &u32SecOvf, OSAL_EVENT_OR_CLEAR);
2949 _TSP_GetModeSecRdy(j, 0xFFFFFFFFUL, &u32SecRdy, OSAL_EVENT_OR_CLEAR);
2950 _TSP_GetModeSecCrc(j, 0xFFFFFFFFUL, &u32SecCrc, OSAL_EVENT_OR_CLEAR);
2951
2952 //printf("u32SecOvf %x, u32SecRdy %x, u32SecCrc %x\n", (int)u32SecOvf, (int)u32SecRdy, (int)u32SecCrc);
2953
2954 while (u32SecRdy)
2955 {
2956 u32SecFltId = MAsm_CPU_GetTrailOne(u32SecRdy) + (j << 5UL); //[TODO] balance every filter priority
2957 //[NOTE] it may be already balance for long term running
2958 *pRet = (_TSP_Isr_Proc_SecRdyCrc(i, u32SecFltId, E_DRVTSP_EVENT_CB_SELF, &u32Evt))? DRVTSP_OK: DRVTSP_FAIL;
2959 u32SecRdy &= ~(1UL << (u32SecFltId & 0x1FUL));
2960 }
2961
2962 while (u32SecCrc)
2963 {
2964 u32SecFltId = MAsm_CPU_GetTrailOne(u32SecCrc) + (j << 5); //[TODO] balance every filter priority
2965 //[NOTE] it may be already balance for long term running
2966 *pRet = (_TSP_Isr_Proc_SecCrcErr(i, u32SecFltId, E_DRVTSP_EVENT_CB_SELF, &u32Evt))? DRVTSP_OK: DRVTSP_FAIL;
2967 u32SecCrc &= ~(1UL << (u32SecFltId & 0x1FUL));
2968 }
2969
2970 while(u32SecOvf)
2971 {
2972 u32SecFltId = MAsm_CPU_GetTrailOne(u32SecOvf) + (j << 5UL); //[TODO] balance every filter priority
2973 //[NOTE] it may be already balance for long term running
2974 *pRet = (_TSP_Isr_Proc_SecOvf(i, u32SecFltId, E_DRVTSP_EVENT_CB_SELF, &u32Evt))? DRVTSP_OK: DRVTSP_FAIL;
2975 u32SecOvf &= ~(1UL << (u32SecFltId & 0x1FUL));
2976 }
2977 }
2978 }
2979 }
2980
2981 #if 0
2982 if (u32Events & TSP_TASK_EVENT_FLT_FREE)
2983 {
2984 for (i = 0; i < TSP_ENGINE_NUM; i++)
2985 {
2986 for (j = 0; j < u32GroupNum; j++)
2987 {
2988 u32AskFreeFltList = _TSP_GetAskPidFltFree0List(j);
2989 u32Mask = u32AskFreeFltList;
2990
2991 if(u32Mask)
2992 {
2993 _TSP_IND_LOCK();
2994 }
2995
2996 while(u32AskFreeFltList)
2997 {
2998 u32PidFltId = MAsm_CPU_GetTrailOne(u32AskFreeFltList) + (j << 5UL);
2999
3000 if (_ptsp_res->_TspState[0].FltState[u32PidFltId] != E_DRVTSP_FLT_STATE_FREE)
3001 {
3002 //section filter id is the same as pid filter id
3003 MS_U32 u32SecFltId;
3004
3005 //u32SecFltId = HAL_TSP_PidFlt_GetSecFlt(0, u32PidFltId);
3006 u32SecFltId = _ptsp_res->_TspState[0].FltMap[u32PidFltId];
3007 _TSP_GetSecRdyId(u32SecFltId, &u32SecRdy, OSAL_EVENT_OR_CLEAR);
3008 _TSP_GetSecOvfId(u32SecFltId, &u32SecOvf, OSAL_EVENT_OR_CLEAR);
3009 _TSP_GetSecCrcId(u32SecFltId, &u32Events, OSAL_EVENT_OR_CLEAR);
3010 _TSP_SecBuf_Free(0, u32SecFltId);
3011 _TSP_SecFlt_Free(0, u32SecFltId, TRUE);
3012 _TSP_PidFlt_Free(0, u32PidFltId, FALSE);
3013 //ULOGD("TSP", "_TSP_PidFlt_Free %ld , time %ld\n", u32PidFltId, MsOS_GetSystemTime());
3014 }
3015 _TSP_FLAG_SetDone(u32PidFltId);
3016 u32AskFreeFltList &= (~(1UL<<(u32PidFltId & 0x1FUL)));
3017 }
3018
3019 if(u32Mask)
3020 {
3021 _TSP_ClrAskPidFltFree0List(j, u32Mask);
3022 _TSP_IND_UNLOCK();
3023 }
3024
3025 }
3026 }
3027 }
3028 #endif
3029
3030 }
3031
_TSP_Isr_ProcPoll(OSAL_TSP_ProcTypeParam * pData,MS_U32 * pu32Evt)3032 static void _TSP_Isr_ProcPoll(OSAL_TSP_ProcTypeParam* pData, MS_U32* pu32Evt)
3033 {
3034 MS_U32 u32Events = 0, u32SecOvf = 0, u32SecCrc = 0;
3035 MS_U32 i = 0;
3036 MS_U32 u32FltId = pData->u32FltId;
3037 TSP_Result* pRet = (TSP_Result*)pData->pRet;
3038 MS_BOOL bRes;
3039 MS_U32 u32FwEvent = 0;
3040
3041 _TSP_GetEvent(_s32TspEventId, u32FwEvent, TSP_TASK_EVENT_FWMSG, OSAL_EVENT_OR_CLEAR, 0);
3042 if(u32FwEvent & (TSP_TASK_EVENT_FWMSG))
3043 {
3044 _DumpFwMsg();
3045 }
3046 _TSP_GetEvent(_s32TspEventId, u32Events, TSP_TASK_EVENT_GROUP_POLL, OSAL_EVENT_OR, 0);
3047
3048 *pRet = DRVTSP_FAIL;
3049
3050 if(u32Events & (TSP_TASK_EVENT_PVR_SELF|TSP_TASK_EVENT_PVR_POLL))
3051 {
3052 _TSP_Isr_Proc_Pvr(E_DRVTSP_EVENT_CB_POLL);
3053 return;
3054 }
3055
3056 for (i = 0; i < TSP_ENGINE_NUM; i++)
3057 {
3058 MS_U32 u32SecFltId;
3059
3060 u32SecFltId = HAL_TSP_PidFlt_GetSecFlt(0, u32FltId);
3061
3062 *pRet = (_TSP_Isr_Proc_SecRdyCrc(i, u32SecFltId, E_DRVTSP_EVENT_CB_POLL, pu32Evt))? DRVTSP_OK: DRVTSP_FAIL;
3063 if (DRVTSP_FAIL == *pRet)
3064 {
3065 bRes = _TSP_GetSecCrcId(u32SecFltId, &u32SecCrc, OSAL_EVENT_OR);
3066
3067 if (bRes)
3068 {
3069 *pRet = (_TSP_Isr_Proc_SecCrcErr(i, u32SecFltId, E_DRVTSP_EVENT_CB_POLL, pu32Evt))? DRVTSP_OK: DRVTSP_FAIL;
3070 }
3071 }
3072 if (DRVTSP_FAIL == *pRet)
3073 {
3074 bRes = _TSP_GetSecOvfId(u32SecFltId, &u32SecOvf, OSAL_EVENT_OR);
3075
3076 if (bRes)
3077 {
3078 *pRet = (_TSP_Isr_Proc_SecOvf(i, u32SecFltId, E_DRVTSP_EVENT_CB_POLL, pu32Evt))? DRVTSP_OK: DRVTSP_FAIL;
3079 }
3080 }
3081 }
3082 }
3083
_TSP_Isr_Proc_Task(OSAL_TSP_ProcTypeParam * pDummy,MS_U32 * pu32Dummy)3084 static void _TSP_Isr_Proc_Task(OSAL_TSP_ProcTypeParam* pDummy, MS_U32* pu32Dummy)
3085 {
3086 TSP_Result Ret;
3087 OSAL_TSP_ProcTypeParam Data;
3088
3089 Data.u32FltId = 0xFFFFFFFFUL;
3090 Data.pRet = (void*)&Ret;
3091 Data.bInfiniteWait = TRUE;
3092 Data.bFromTask = TRUE;
3093 #ifdef DMX_UTOPIA_2K
3094 Data.u32PrcEvt = 0;
3095 #endif
3096
3097 while (1)
3098 {
3099 _TSP_EXT_LOCK();
3100 if (_db_flag == 1)
3101 {
3102 _db_flag = 2;
3103 //_TSP_EXT_UNLOCK();
3104 break;
3105 }
3106 _TSP_EXT_UNLOCK();
3107 _TSP_Isr_ProcSelf(&Data);
3108 } // Task while loop
3109
3110 _s32TspTaskId = -1;
3111 _TSP_EXT_UNLOCK();
3112 //printf("TSP ISR Proc End!!!\n");
3113 }
3114
3115 static char tsp_mutex[] = "TSP_Mutex";
3116 static char tsp_ind_mutex[] = "TSP_Ind_Mutex";
3117 static char tsp_int_mutex[] = "TSP_Int_Mutex";
3118 static char tsp_ext_mutex[] = "TSP_Ext_Mutex";
3119 static char tsp_event[] = "TSP_Event";
3120
3121 static char tsp_secRdy[] = "TSP_SecRdy";
3122 static char tsp_crcerr[] = "TSP_CrcErr";
3123 static char tsp_secovf[] = "TSP_SecOvf";
3124 static char tsp_fltdis[] = "TSP_FltDis";
3125 //static char freelist0[] = "TSP_FreeList0";
3126 //static char tsp_done[] = "TSP_Done";
3127
3128 //static char freelistdefer0[] = "TSP_FreeListDefer0";
3129 static char tsp_isr_task[] = "TSP_ISR_Task";
3130
_TSP_Init(MS_BOOL bResetSwState,MS_BOOL bRestoreRegState)3131 static TSP_Result _TSP_Init(MS_BOOL bResetSwState, MS_BOOL bRestoreRegState)
3132 {
3133 MS_VIRT virtBank = 0, virtBank1 = 0;
3134 MS_PHY u32BankSize = 0;
3135 MS_PHY u32BankSize1 = 0;
3136 MS_BOOL bAlive;
3137 MS_U32 u32FwSize = 0;
3138 MS_PHY phyFwAddr = 0;
3139 MS_U8 u8ii = 0, u8temp = 0;
3140
3141 if (FALSE == MDrv_MMIO_GetBASE(&virtBank, &u32BankSize, MS_MODULE_TSP))
3142 {
3143 MS_CRITICAL_MSG(TSP_DBG("MDrv_MMIO_GetBASE fail\n"));
3144 MS_ASSERT(0);
3145 }
3146 if (FALSE == MDrv_MMIO_GetBASE(&virtBank1, &u32BankSize1, MS_MODULE_PM))
3147 {
3148 MS_CRITICAL_MSG(TSP_DBG("MDrv_MMIO_GetBASE fail\n"));
3149 MS_ASSERT(0);
3150 }
3151
3152 HAL_TSP_SetBank(virtBank, virtBank1);
3153
3154 for(u8ii = 0; u8ii < ((MS_U8)TSP_PVR_IF_NUM); u8ii++)
3155 {
3156 _ptsp_res->_PvrEvtNotify[u8ii] = E_DRVTSP_EVENT_DATA_INIT;
3157 _ptsp_res->_PvrCallback[u8ii] = NULL;
3158 }
3159
3160 HAL_TSP_STC64_Mode_En(TRUE);
3161
3162 bAlive = HAL_TSP_Alive();
3163 if (!bAlive)
3164 {
3165 HAL_TSP_PowerCtrl(ENABLE);
3166 HAL_TSP_Reset(0);
3167 // Diable interrupt
3168 HAL_TSP_Int_Disable(TSP_HWINT_ALL);
3169 HAL_TSP_Int2_Disable(TSP_HWINT2_ALL);
3170 }
3171 else if(bResetSwState == FALSE)
3172 {
3173 HAL_ResetAll();
3174 MsOS_DelayTask(5);
3175 }
3176
3177 // IntDisable
3178 // IntDetach
3179 OSAL_TSP_IntDisable();
3180 //#ifndef MSOS_TYPE_LINUX_KERNEL
3181 OSAL_TSP_IntDetach();
3182 //#endif
3183
3184 if (!bAlive)
3185 {
3186 // Disable CPU
3187 HAL_TSP_SetCtrlMode(0, 0x0, TSP_IF_NUM); // Disable TSP0(Reset CPU), Software_Reset
3188 HAL_TSP_HW_Lock_Init();
3189
3190 // Richard: Enable indirect access
3191 HAL_TSP_Ind_Enable();
3192 _TSP_CmdQ_Init();
3193 HAL_TSP_WbDmaEnable(TRUE);
3194
3195 // The below is setting hw_config0, (ts interface 0), how about hw_config3, (ts_interface 1)
3196 // Mark : Byte enable setting, fix HW bug. (Important)
3197 HAL_TSP_HwPatch();
3198 }
3199
3200 if (bResetSwState)
3201 {
3202 _TSP_SwStateReset(FALSE);
3203 }
3204
3205 if (!bAlive)
3206 {
3207 if (bRestoreRegState == 0)
3208 {
3209 _TSP_RegStateReset();
3210 }
3211
3212 if (_TSP_GetFirmware(&phyFwAddr, &u32FwSize) == FALSE)
3213 {
3214 MS_CRITICAL_MSG(TSP_DBG ("TSP init fail: Please set FW address and size\n"));
3215 return DRVTSP_FAIL;
3216 }
3217
3218 //TSP_DBG("[%s][%d]Reset CMDQ\n",__FUNCTION__,__LINE__);
3219 if(!HAL_TSP_CmdQ_Reset())
3220 {
3221 return DRVTSP_FAIL;
3222 }
3223
3224 #ifdef SECURE_PVR_ENABLE //load fwtsp.dat from Tee
3225 _ptsp_res->_stSecBuf.u32BufId = 0;
3226 _ptsp_res->_stSecBuf.u32BufOpt = 0;
3227 _ptsp_res->_stSecBuf.u32BufSize = u32FwSize;
3228 _ptsp_res->_stSecBuf.phyBufAddr = phyFwAddr;
3229 if(MDrv_TSP_Ree_SendTeeCmd(E_DRVTSP_REE_TO_TEE_CMD_FW_LoadCode, (void*)(&(_ptsp_res->_stSecBuf)), sizeof(DrvTSP_SecureBuf)) != DRVTSP_OK)
3230 {
3231 return DRVTSP_FAIL;
3232 }
3233 #endif
3234
3235 HAL_TSP_CPU_SetBase(phyFwAddr, u32FwSize);
3236 // Synthesizer Tuning
3237 // For difference : 100 - 4000 STC
3238 // Step: 10 STC
3239 // HAL_TSP_SetFwMsg(0x03A4); // Catch up n*10 STC in 1/20 sec
3240
3241 HAL_TSP_SetCtrlMode(0, TSP_CTRL_SW_RST, 0);// | TSP_CTRL_CLK_GATING_DISABLE); // Enable TSP CPU
3242
3243 // TSP_DBG ("**************************DDD TSP protect miu00000000000000000\n");
3244 // TSP write protect to prevent TSP write memory
3245 HAL_TSP_OrzWriteProtect_Enable(TRUE, 0, 0);
3246
3247 HAL_Reset_WB();
3248
3249 HAL_TSP_SetCtrlMode(0, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 0);// | TSP_CTRL_CLK_GATING_DISABLE); // Enable TSP CPU
3250
3251 HAL_TSP_Int_ClearSw();
3252 HAL_TSP_Int_ClearHw(TSP_HWINT_ALL);
3253 HAL_TSP_Int_ClearHw2(TSP_HWINT2_ALL);
3254
3255 while (FALSE == HAL_TSP_Alive())
3256 {
3257 MS_CRITICAL_MSG(TSP_DBG("Reset TSP CPU fail\n"));
3258 HAL_TSP_SetCtrlMode(0, 0, TSP_IF_NUM);
3259
3260 #ifdef SECURE_PVR_ENABLE //load fwtsp.dat from Tee
3261 if(MDrv_TSP_Ree_SendTeeCmd(E_DRVTSP_REE_TO_TEE_CMD_FW_LoadCode, (void*)(&(_ptsp_res->_stSecBuf)), sizeof(DrvTSP_SecureBuf)) != DRVTSP_OK)
3262 {
3263 return DRVTSP_FAIL;
3264 }
3265 #endif
3266
3267 HAL_TSP_CPU_SetBase(phyFwAddr, u32FwSize);
3268 HAL_TSP_SetCtrlMode(0, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 0);// | TSP_CTRL_CLK_GATING_DISABLE); // Enable TSP CPU
3269 }
3270
3271 while(FALSE == HAL_TSP_Check_FW_VER());
3272
3273 #ifdef SECURE_PVR_ENABLE
3274 _ptsp_res->_stSecBuf.u32BufId = 0xFF;
3275 _ptsp_res->_stSecBuf.u32BufOpt = 0;
3276 _ptsp_res->_stSecBuf.u32BufSize = 0;
3277 _ptsp_res->_stSecBuf.phyBufAddr = 0;
3278 if(MDrv_TSP_Ree_SendTeeCmd(E_DRVTSP_REE_TO_TEE_CMD_FW_LoadCode, (void*)(&(_ptsp_res->_stSecBuf)), sizeof(DrvTSP_SecureBuf)) != DRVTSP_OK)
3279 {
3280 return DRVTSP_FAIL;
3281 }
3282 #endif
3283
3284 HAL_TSP_Int_ClearSw();
3285 HAL_TSP_Int_ClearHw(TSP_HWINT_ALL);
3286 HAL_TSP_Int_ClearHw2(TSP_HWINT2_ALL);
3287
3288 // Implicity MDrv_TSP_Reset()
3289 HAL_TSP_TsDma_SetDelay(0x0AUL); // Set TsDma delay, //jyliu.tsp, how come the value
3290
3291 _FwDbgInfo.bEnable = FALSE;
3292 _FwDbgInfo.phyBufAddr = 0;
3293 _FwDbgInfo.u32Size = 0x0UL;
3294 _FwDbgInfo.phyReadPos = 0x0UL;
3295 _FwDbgInfo.phyWritePos = 0x0UL;
3296 }
3297
3298 // STC control by TSP need indirect R/W enable
3299 for (u8ii = 0; u8ii < ((MS_U8)TSP_PCRFLT_NUM); u8ii++)
3300 {
3301 HAL_TSP_Stc_ctrl(u8ii, STC_SYNTH_DEFAULT);
3302 }
3303
3304 // Enable SYNC_RISING_DETECT and VALID_FALLING_DETECT for Serial mode
3305 HAL_TSP_Enable_ValidSync_Dectect();
3306
3307 // Disable TSIF1
3308 HAL_TSP_PVR_Enable(0, FALSE);
3309 HAL_TSP_PVR_Enable(1, FALSE);
3310 HAL_TSP_PVR_Enable(2, FALSE);
3311
3312 OSAL_TSP_IntAttach(_TSP_Isr);
3313 //#ifndef MSOS_TYPE_LINUX_KERNEL
3314 OSAL_TSP_IntEnable();
3315 //#endif
3316
3317 if (!bAlive)
3318 {
3319 HAL_TSP_Int_Enable(TSP_HWINT_TSP_SW_INT_STATUS); // Enable TSP hardware interrupt
3320 //HAL_TSP_Int2_Enable(TSP_HWINT2_ALL);
3321 #if 0 //(defined(HWPCR_ENABLE) && (TSP_HWPCR_BY_HK == 0))
3322 for (u8ii = 0; u8ii < TSP_PCRFLT_NUM; u8ii++)
3323 {
3324 HAL_TSP_HWPcr_Int_Enable(u8ii, TRUE);
3325 }
3326 #endif
3327 }
3328
3329 if(bResetSwState)
3330 {
3331 for (u8ii = 0; u8ii < ((MS_U8)TSP_PVR_IF_NUM); u8ii++)
3332 {
3333 _ptsp_res->_PvrEvtNotify[u8ii] = E_DRVTSP_EVENT_DATA_INIT;
3334 _ptsp_res->_PvrCallback[u8ii] = NULL;
3335 }
3336 u8temp = (MS_U8)((TSP_PVR_IF_NUM+31UL)>>5UL);
3337 for (u8ii = 0; u8ii < u8temp; u8ii++)
3338 {
3339 _u32PvrNotifyId[u8ii] = 0;
3340 }
3341 }
3342
3343 if(((_u32LibMode == DRVTSP_CMD_LIB_MODE_KRN) && (_ptsp_res->_TspState[0].TSPStatus == E_DRVTSP_SW_RESUME)) == FALSE)
3344 {
3345 _ptsp_res->_s32TspMutexId = OSAL_TSP_MutexCreate((MS_U8*)tsp_mutex);
3346 _ptsp_res->_s32IndMutexId = OSAL_TSP_MutexCreate((MS_U8*)tsp_ind_mutex);
3347 _ptsp_res->_s32IntRegMutexId = OSAL_TSP_MutexCreate((MS_U8*)tsp_int_mutex);
3348 _s32ExtMutexId = OSAL_TSP_MutexCreate((MS_U8*)tsp_ext_mutex);
3349 //printf("[%s][%d] tsp_ext_mutex %x \n", __FUNCTION__, __LINE__, (int)tsp_ext_mutex);
3350
3351 if(_u32LibMode != DRVTSP_CMD_LIB_MODE_KRN)
3352 {
3353 _s32TspEventId = OSAL_TSP_EventCreate((MS_U8*)tsp_event);
3354 }
3355
3356 u8temp = (MS_U8)((TSP_SECFLT_NUM+31UL)>>5UL);
3357 for (u8ii = 0; u8ii < u8temp; u8ii++)
3358 {
3359 _s32TspSecRdyId[u8ii] = OSAL_TSP_EventCreate((MS_U8*)tsp_secRdy);
3360 _s32TspSecOvfId[u8ii] = OSAL_TSP_EventCreate((MS_U8*)tsp_crcerr);
3361 _s32TspSecCrcId[u8ii] = OSAL_TSP_EventCreate((MS_U8*)tsp_secovf);
3362 _s32TspFltDisableId[u8ii] = OSAL_TSP_EventCreate((MS_U8*)tsp_fltdis);
3363
3364 if(bResetSwState)
3365 {
3366 _u32SecNotifyId[u8ii] = 0;
3367 }
3368 }
3369 }
3370
3371 #if 0
3372 u8temp = ((TSP_PIDFLT_NUM_ALL+31UL)>>5UL);
3373 for (u8ii = 0; u8ii < u8temp; u8ii++)
3374 {
3375 _s32EventFree0[u8ii] = OSAL_TSP_EventCreate((MS_U8*)freelist0);
3376 _s32DoneFlags[u8ii] = OSAL_TSP_EventCreate((MS_U8*)tsp_done);
3377 //_s32EventFreeDefer0[u8ii] = OSAL_TSP_EventCreate((MS_U8*)freelistdefer1);
3378 }
3379 #endif
3380
3381 #if (defined(HWPCR_ENABLE) && (TSP_HWPCR_BY_HK == 1))
3382 if(bResetSwState)
3383 {
3384 u8temp = (MS_U8)((TSP_PCRFLT_NUM+31UL)>>5UL);
3385 for (u8ii = 0; u8ii < u8temp; u8ii++)
3386 {
3387 _u32HwPcrNotifyId[u8ii] = 0;
3388 }
3389 }
3390 #endif
3391
3392 if(_u32LibMode != DRVTSP_CMD_LIB_MODE_KRN)
3393 {
3394 _s32TspTaskId = OSAL_TSP_TaskCreate(_TSP_Isr_Proc_Task, (MS_U8*)tsp_isr_task);
3395 //printf("[%s][%d] _u32LibMode %d , _db_flag %d _s32TspTaskId %x \n", __FUNCTION__, __LINE__, (int)_u32LibMode, (int)_db_flag, (int)_s32TspTaskId);
3396 }
3397
3398 if(bResetSwState)
3399 {
3400 _ptsp_res->_bSWInitReady = TRUE;
3401 _ptsp_res->_TspState[0].TSPStatus = E_DRVTSP_SW_INIT;
3402 _ptsp_res->_u32LastErr = DRVTSP_OK;
3403 _ptsp_res->_u32ProcessNum = 1UL;
3404 }
3405
3406 #ifdef MSOS_TYPE_LINUX_KERNEL
3407 MS_U32 u32ii;
3408
3409 for (u32ii= 0; u32ii< TSP_SECFLT_NUM; u32ii++)
3410 {
3411 init_waitqueue_head(&tsp_wq_head[u32ii]);
3412 }
3413 for (u32ii= 0; u32ii< DRVTSP_MAX_PROCESS_NUM; u32ii++)
3414 {
3415 _stKModePrcEvtTbl[u32ii].tgid = 0;
3416 _stKModePrcEvtTbl[u32ii].s32TspEvtId = -1;
3417 }
3418 #endif
3419
3420 if (bRestoreRegState)
3421 {
3422 if((_ptsp_res->_phyTspFWDramBuf > 0) && (_ptsp_res->_u32TspFwDramBufSize > 0))
3423 {
3424 HAL_TSP_OrzWriteProtect_Enable(TRUE, _ptsp_res->_phyTspFWDramBuf, _ptsp_res->_u32TspFwDramBufSize);
3425 HAL_TSP_SecFlt_SetDataAddr(_ptsp_res->_phyTspFWDramBuf);
3426 }
3427 _TSP_RegStateRestore();
3428 }
3429
3430 return (TSP_Result)(_ptsp_res->_u32LastErr);
3431 }
3432
3433 //-------------------------------------------------------------------------------------------------
3434 /// Poweroff TSP driver and TSP engine
3435 /// @return TSP_Result
3436 /// @note
3437 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PowerOff(void)3438 TSP_Result MDrv_TSP_PowerOff(void)
3439 {
3440 _TSP_ENTRY();
3441 _TSP_Close();
3442 _ptsp_res->_TspState[0].TSPStatus = E_DRVTSP_SW_POWEROFF;
3443 // this is not a bug. Intend to lock to mutex to prevent alive task accessing TSP after power off
3444 return DRVTSP_OK;
3445 }
3446
3447 //-------------------------------------------------------------------------------------------------
3448 /// Relsase TSP indirect register read/write semaphone
3449 /// @return TSP_Result
3450 /// @note
3451 //-------------------------------------------------------------------------------------------------
MDrv_TSP_HW_Lock_Release(void)3452 TSP_Result MDrv_TSP_HW_Lock_Release(void)
3453 {
3454 HAL_TSP_HW_Lock_Release();
3455
3456 return DRVTSP_OK;
3457 }
3458
3459 //-------------------------------------------------------------------------------------------------
3460 /// Close TSP driver and reset software/register state
3461 /// @return TSP_Result
3462 /// @note
3463 //-------------------------------------------------------------------------------------------------
MDrv_TSP_Exit(void)3464 TSP_Result MDrv_TSP_Exit(void)
3465 {
3466 MS_U8 i;
3467
3468 _TSP_ENTRY();
3469
3470 //checking if stiil other process exist, only close sw thread
3471 if(_ptsp_res->_u32ProcessNum > 1)
3472 {
3473 _TSP_SW_Exit();
3474 _TSP_RETURN(DRVTSP_OK);
3475 }
3476
3477 for (i = 0; i < ((MS_U8)TSP_ENGINE_NUM); i++)
3478 {
3479 _ptsp_res->_TspState[i].TSPStatus = E_DRVTSP_SW_EXIT;
3480 }
3481
3482 if(HAL_TSP_Alive())
3483 {
3484 _TSP_SwStateReset(TRUE);
3485 }
3486 else
3487 {
3488 _TSP_SwStateReset(FALSE);
3489 }
3490 _TSP_RegStateReset();
3491 _TSP_Close();
3492
3493 // this is not a bug. Intend to lock to mutex to prevent alive task accessing TSP after power off
3494 return DRVTSP_OK;
3495 }
3496
3497 //-------------------------------------------------------------------------------------------------
3498 /// Suspend TSP driver
3499 /// @return TSP_Result
3500 /// @note
3501 /// Save TSP driver states to DRAM
3502 //-------------------------------------------------------------------------------------------------
MDrv_TSP_Suspend(void)3503 TSP_Result MDrv_TSP_Suspend(void)
3504 {
3505 MS_U32 u32EngId, u32FilterId, u32SecFltId, u32Flag;
3506 MS_U16 u16Clk;
3507
3508 if(!((_ptsp_res->_TspState[0].TSPStatus == E_DRVTSP_SW_INIT) || (_ptsp_res->_TspState[0].TSPStatus == E_DRVTSP_SW_RESUME)))
3509 return DRVTSP_FAIL;
3510
3511 _ptsp_res->_TspState[0].TSPStatus = E_DRVTSP_SW_SUSPEND;
3512
3513 #ifdef MSOS_TYPE_LINUX_KERNEL
3514 if(_u32LibMode == DRVTSP_CMD_LIB_MODE_KRN)
3515 {
3516 _ptsp_res->_bKerStrSuspend = TRUE;
3517 HAL_TSP_CMD_Run(HAL_CMD_SET_KRSTR_MODE, 1, 0, 0);
3518 HAL_TSP_SaveRegs();
3519 }
3520 #endif
3521
3522 MDrv_TSP_GetTSIFStatus(E_DRVTSP_IF_TS0, &_ptsp_res->_ifset_save, &u16Clk);
3523
3524 _TSP_STR_ENTRY();
3525
3526 //Stop filter before storing filter
3527 for (u32EngId = 0; u32EngId < TSP_ENGINE_NUM; u32EngId++)
3528 {
3529 for (u32FilterId = 0; u32FilterId < TSP_PIDFLT_NUM_ALL; u32FilterId++)
3530 {
3531 if((_ptsp_res->_TspState[u32EngId].FltState[u32FilterId] != E_DRVTSP_FLT_STATE_NA) &&
3532 (_ptsp_res->_TspState[u32EngId].FltState[u32FilterId] & E_DRVTSP_FLT_STATE_ENABLE))
3533 {
3534 HAL_TSP_PidFlt_SelFltOutput(u32EngId, u32FilterId, TSP_PIDFLT_OUT_NONE);
3535 //printf("[%s][%d] disable flt %d , sec %x, %x \n", __FUNCTION__, __LINE__, (int)u32FilterId,
3536 // (int)_ptsp_res->_TspState[u32EngId].FltMap[u32FilterId], (int)_ptsp_res->_TspState[u32EngId].FltType[u32FilterId]);
3537
3538 RESET_FLAG(_ptsp_res->_TspState[u32EngId].FltState[u32FilterId], E_DRVTSP_FLT_STATE_ENABLE);
3539 SET_FLAG(_ptsp_res->_TspState[u32EngId].FltState[u32FilterId], E_DRVTSP_FLT_STATE_SUSPEND);
3540
3541 //clear event
3542 u32SecFltId = _ptsp_res->_TspState[u32EngId].FltMap[u32FilterId];
3543 if(u32SecFltId < TSP_SECFLT_NUM)
3544 {
3545 _TSP_GetSecOvfId (u32SecFltId, &u32Flag, OSAL_EVENT_OR_CLEAR);
3546 _TSP_GetSecCrcId (u32SecFltId, &u32Flag, OSAL_EVENT_OR_CLEAR);
3547 _TSP_GetSecRdyId (u32SecFltId, &u32Flag, OSAL_EVENT_OR_CLEAR);
3548 _TSP_GetFltDisableId(u32SecFltId, &u32Flag, OSAL_EVENT_OR_CLEAR);
3549 }
3550 }
3551 }
3552 }
3553
3554 _TSP_RegStateStore();
3555 _TSP_Close();
3556
3557 // this is not a bug. Intend to lock to mutex to prevent alive task accessing TSP after power off
3558 return DRVTSP_OK;
3559 }
3560
3561 //-------------------------------------------------------------------------------------------------
3562 /// Resume TSP driver
3563 /// @return TSP_Result
3564 /// @note
3565 /// Restore TSP driver states from DRAM
3566 //-------------------------------------------------------------------------------------------------
MDrv_TSP_Resume(MS_PHY phyFWAddr,MS_U32 u32FWSize)3567 TSP_Result MDrv_TSP_Resume(MS_PHY phyFWAddr, MS_U32 u32FWSize)
3568 {
3569 #ifdef MSOS_TYPE_LINUX_KERNEL
3570 if(_u32LibMode == DRVTSP_CMD_LIB_MODE_KRN)
3571 {
3572 HAL_TSP_CMD_Run(HAL_CMD_SET_KRSTR_MODE, 2, 0, 0);
3573 }
3574 #endif
3575
3576 // Reset TSP register
3577 //HAL_ResetAll();
3578 //MsOS_DelayTask(5);
3579
3580 _ptsp_res->_TspState[0].TSPStatus = E_DRVTSP_SW_RESUME;
3581
3582 #ifdef MSOS_TYPE_LINUX_KERNEL
3583 if(_u32LibMode == DRVTSP_CMD_LIB_MODE_KRN)
3584 {
3585 MS_U8 *pu8tr = 0;
3586
3587 pu8tr = (MS_U8*)MS_PA2KSEG1(phyFWAddr);
3588 memcpy(pu8tr, u8TSPFirmware, sizeof(u8TSPFirmware));
3589 }
3590 #endif
3591
3592 _ptsp_res->_phyFwAddr = phyFWAddr;
3593 _ptsp_res->_u32FwSize = u32FWSize;
3594 //printf("[%s][%d] TSPStatus %x \n", __FUNCTION__, __LINE__, (int)_ptsp_res->_TspState[0].TSPStatus);
3595
3596 if(_TSP_Init(FALSE, TRUE) != DRVTSP_OK)
3597 {
3598 return DRVTSP_FAIL;
3599 }
3600
3601 #ifdef MSOS_TYPE_LINUX_KERNEL
3602 if(_u32LibMode == DRVTSP_CMD_LIB_MODE_KRN)
3603 {
3604 HAL_TSP_RestoreRegs();
3605 }
3606 #endif
3607
3608 if(MDrv_TSP_SetOperateMode(0, E_DRVTSP_CTRL_MODE_TS0, 0) != DRVTSP_OK)
3609 {
3610 return DRVTSP_FAIL;
3611 }
3612
3613 _TSP_STR_ENTRY();
3614
3615 if(_TSP_SelPad(0, E_DRVTSP_IF_TS0, &_ptsp_res->_ifset_save) != DRVTSP_OK)
3616 {
3617 _TSP_STR_RETURN(DRVTSP_FAIL);
3618 }
3619
3620 //_ptsp_res->_TspState[0].TSPStatus = E_DRVTSP_SW_INIT;
3621
3622 _TSP_STR_RETURN(DRVTSP_OK);
3623
3624 }
3625
MDrv_TSP_Resume_Filter(void)3626 TSP_Result MDrv_TSP_Resume_Filter(void)
3627 {
3628 MS_U32 u32EngId, u32FilterId;
3629
3630 for (u32EngId = 0; u32EngId < TSP_ENGINE_NUM; u32EngId++)
3631 {
3632 for (u32FilterId = 0; u32FilterId < TSP_PIDFLT_NUM_ALL; u32FilterId++)
3633 {
3634 if((_ptsp_res->_TspState[u32EngId].FltState[u32FilterId] != E_DRVTSP_FLT_STATE_NA) &&
3635 (_ptsp_res->_TspState[u32EngId].FltState[u32FilterId] & E_DRVTSP_FLT_STATE_SUSPEND))
3636 {
3637 RESET_FLAG(_ptsp_res->_TspState[u32EngId].FltState[u32FilterId], E_DRVTSP_FLT_STATE_SUSPEND);
3638 //printf("[%s][%d] enable flt %d, sec %x, %x\n", __FUNCTION__, __LINE__, (int)u32FilterId,
3639 // (int)_ptsp_res->_TspState[u32EngId].FltMap[u32FilterId], (int)_ptsp_res->_TspState[u32EngId].FltType[u32FilterId]);
3640 MDrv_TSP_PidFlt_Enable(u32EngId, u32FilterId, TRUE);
3641 }
3642 }
3643 }
3644
3645 #ifdef MSOS_TYPE_LINUX_KERNEL
3646 if(_u32LibMode == DRVTSP_CMD_LIB_MODE_KRN)
3647 {
3648 HAL_TSP_CMD_Run(HAL_CMD_SET_KRSTR_MODE, 0, 0, 0);
3649 _ptsp_res->_bKerStrSuspend = FALSE;
3650 }
3651 #endif
3652
3653 return DRVTSP_OK;
3654 }
3655
3656 // Misc API
3657 //-------------------------------------------------------------------------------------------------
3658 /// Set TSP engine operating mode
3659 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
3660 /// @param eCtrlMode \b IN: TSP engine operating mode
3661 /// @param u8DscmbEngSel \b IN: DSCMB Engine ID. IF 0xFF, not use DSCMB engine
3662 /// @return TSP_Result
3663 /// @note
3664 /// Only one engine can be set to use memory stream input mode, and all kinds
3665 /// of input are mutually exclusive for each engine.\n
3666 /// Only one engine can output to MAD. The TSP engine which is not selected to
3667 /// MAD can not filter any audio stream, it will block the stream.
3668 /// @sa MDrv_TSP_PidFlt_Alloc, MDrv_TSP_PidFlt_Enable, E_DRVTSP_FLT_TYPE_AUDIO
3669 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SetOperateMode(MS_U32 u32EngId,DrvTSP_CtrlMode eCtrlMode,MS_U8 u8DscmbEngSel)3670 TSP_Result MDrv_TSP_SetOperateMode(MS_U32 u32EngId, DrvTSP_CtrlMode eCtrlMode, MS_U8 u8DscmbEngSel) // Set TSP internal operate
3671 {
3672 MS_U8 u8ScmSrcTsif = 0, u8OrgCaEng = 0;
3673 MS_U32 u32ScmDest = 0;
3674 MS_U32 u32OrgDest = 0;
3675 MS_BOOL bClearOrgPath = FALSE;
3676 MS_U8 u8OrgSrc = 0;
3677 DrvTSP_FltType eFltType = 0;
3678
3679 _TSP_STR_ENTRY();
3680
3681 if (u32EngId >= TSP_ENGINE_NUM)
3682 {
3683 _TSP_STR_RETURN(DRVTSP_FAIL);
3684 }
3685
3686 // reset audio BD mode
3687 HAL_TSP_AU_BD_Mode_Enable(FALSE);
3688
3689 switch (eCtrlMode)
3690 {
3691 case E_DRVTSP_CTRL_MODE_TS0:
3692 eFltType = E_DRVTSP_FLT_SOURCE_TYPE_LIVE;
3693 break;
3694 case E_DRVTSP_CTRL_MODE_TS1:
3695 eFltType = E_DRVTSP_FLT_SOURCE_TYPE_TS1 | E_DRVTSP_FLT_SOURCE_TYPE_FILE1;
3696 break;
3697 case E_DRVTSP_CTRL_MODE_TS2:
3698 eFltType = E_DRVTSP_FLT_SOURCE_TYPE_TS2 | E_DRVTSP_FLT_SOURCE_TYPE_FILE2;
3699 break;
3700 #ifdef MERGE_STR_SUPPORT
3701 case E_DRVTSP_CTRL_MODE_TSFI_LIVE:
3702 #endif
3703 case E_DRVTSP_CTRL_MODE_MEM:
3704 eFltType = E_DRVTSP_FLT_SOURCE_TYPE_FILE;
3705 break;
3706 default:
3707 break;
3708 }
3709
3710 u8OrgCaEng = _TSP_Get_DscmbEngId_ByFltSrc(eFltType);
3711 if(u8OrgCaEng != u8DscmbEngSel)
3712 {
3713 if(eFltType != 0)
3714 {
3715 if(u8DscmbEngSel < TSP_CA_ENGINE_NUM)
3716 {
3717 _ptsp_res->_DscmbFlt_State[u8DscmbEngSel].u32Src |= eFltType;
3718 }
3719 if(u8OrgCaEng < TSP_CA_ENGINE_NUM)
3720 {
3721 _ptsp_res->_DscmbFlt_State[u8OrgCaEng].u32Src &= ~eFltType;
3722 HAL_TSP_CSA_Get_CACtrl(u8OrgCaEng,&u8OrgSrc,&u32OrgDest);
3723
3724 //do not clear ca control, if the ca control is not set for original source
3725 if((eCtrlMode == E_DRVTSP_CTRL_MODE_TS0) && (u8OrgSrc == TSP_SRC_FROM_TSIF0_LIVE) && (u32OrgDest & TSP_PKTDMX0_LIVE))
3726 bClearOrgPath = TRUE;
3727 else if((eCtrlMode == E_DRVTSP_CTRL_MODE_MEM) && (u8OrgSrc == TSP_SRC_FROM_TSIF0_FILE) && (u32OrgDest & TSP_PKTDMX0_FILE))
3728 bClearOrgPath = TRUE;
3729 else if((eCtrlMode == E_DRVTSP_CTRL_MODE_TS1) && (u8OrgSrc == TSP_SRC_FROM_TSIF1) && (u32OrgDest & TSP_PKTDMX1))
3730 bClearOrgPath = TRUE;
3731 else if((eCtrlMode == E_DRVTSP_CTRL_MODE_TS2) && (u8OrgSrc == TSP_SRC_FROM_TSIF2) && (u32OrgDest & TSP_PKTDMX2))
3732 bClearOrgPath = TRUE;
3733
3734 if(bClearOrgPath)
3735 {
3736 HAL_TSP_CSA_Set_ScrmPath(u8OrgCaEng, 0);
3737 }
3738 }
3739 }
3740 }
3741
3742 //printf("[%s] eCtrlMode %d , u8DscmbEngSel %d\n", __FUNCTION__, (int)eCtrlMode, (int)u8DscmbEngSel);
3743
3744 switch (eCtrlMode)
3745 {
3746 case E_DRVTSP_CTRL_MODE_TS0:
3747 HAL_TSP_PS_Path_Disable();
3748 HAL_TSP_CSA_Set_CACtrl(u8DscmbEngSel, TSP_SRC_FROM_TSIF0_LIVE, TSP_PKTDMX0_LIVE);
3749 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 0);
3750 break;
3751
3752 #if (TSP_IF_NUM >= 1)
3753 case E_DRVTSP_CTRL_MODE_TS1:
3754 HAL_TSP_PS_Path_Disable();
3755 HAL_TSP_CSA_Set_CACtrl(u8DscmbEngSel, TSP_SRC_FROM_TSIF1, TSP_PKTDMX1);
3756 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 1);
3757 break;
3758
3759 case E_DRVTSP_CTRL_MODE_TS2:
3760 HAL_TSP_PS_Path_Disable();
3761 HAL_TSP_CSA_Set_CACtrl(u8DscmbEngSel, TSP_SRC_FROM_TSIF2, TSP_PKTDMX2);
3762 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 2);
3763 break;
3764
3765 case E_DRVTSP_CTRL_MODE_TS3:
3766 HAL_TSP_PS_Path_Disable();
3767 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 3);
3768 break;
3769 #ifdef MERGE_STR_SUPPORT
3770 case E_DRVTSP_CTRL_MODE_TSFI_LIVE:
3771 HAL_TSP_PS_Path_Disable();
3772 HAL_TSP_CSA_Set_CACtrl(u8DscmbEngSel, TSP_SRC_FROM_TSIF0_FILE, TSP_PKTDMX0_FILE);
3773 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 3);
3774 break;
3775 #endif
3776 #endif
3777
3778 case E_DRVTSP_CTRL_MODE_MEM:
3779 HAL_TSP_PS_Path_Disable();
3780 HAL_TSP_CSA_Get_CACtrl(u8DscmbEngSel, &u8ScmSrcTsif, &u32ScmDest);
3781 if(HAL_TSP_PVR_StartingEngs_Get(u32ScmDest) == 0)
3782 {
3783 HAL_TSP_CSA_Set_CACtrl(u8DscmbEngSel, TSP_SRC_FROM_TSIF0_FILE, TSP_PKTDMX0_FILE);
3784 }
3785 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST| TSP_CTRL_TSFILE_EN, TSP_IF_NUM);
3786 break;
3787
3788 case E_DRVTSP_CTRL_MODE_PVR_CA:
3789 case E_DRVTSP_CTRL_MODE_PVR1_CA:
3790 break;
3791
3792 default:
3793 _TSP_STR_RETURN(DRVTSP_FAIL);
3794 break;
3795 }
3796
3797 _TSP_STR_RETURN(DRVTSP_OK);
3798 }
3799
3800 //-------------------------------------------------------------------------------------------------
3801 /// Select ChipTop PAD for ts0 and ts1
3802 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
3803 /// @param eIf \b IN: TSP TS interface
3804 /// @param pIfSet \b IN: TS interface setting
3805 /// @return TSP_Result
3806 /// @note
3807 /// Uranus: only can select pad0/pad1 to ts0
3808 /// Oberon: can select pad0/pad1 to ts0, pad0/pad1 to ts1.
3809 /// Default setting was pad0->ts0, pad1->ts1.
3810 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SelPad(MS_U32 u32EngId,DrvTSP_If eIf,DrvTSP_If_Set * pIfSet)3811 TSP_Result MDrv_TSP_SelPad(MS_U32 u32EngId, DrvTSP_If eIf, DrvTSP_If_Set* pIfSet)
3812 {
3813 TSP_Result bRet;
3814
3815 _TSP_ENTRY();
3816 bRet = _TSP_SelPad(u32EngId, eIf, pIfSet);
3817
3818 _TSP_RETURN(bRet);
3819 }
3820
3821 //-------------------------------------------------------------------------------------------------
3822 /// Configure output pad
3823 /// @param eOutputPad \b IN: Output pad & Output pad mode
3824 /// @param eInputPad \b IN: Source of Input pad
3825 /// @param bInParallel \b IN: TRUE: Input pad mode is parallel; FALSE: Input pad mode is serial
3826 /// @return TSP_Result
3827 /// @note
3828 /// Only EXT_PAD1 and EXT_PAD3 has output mode
3829 ///
3830 /// If output from S2P mode, input source should be external input pad only
3831 /// If output from TSO mode, eInputPad should be E_DRVTSP_PAD_TSO
3832 /// If input source is internal demod, output mode can be demod out or TSO out
3833 //-------------------------------------------------------------------------------------------------
MDrv_TSP_OutputPadCfg(DrvTSP_PadOut eOutputPad,DrvTSP_PadIn eInputPad,MS_BOOL bInParallel,MS_BOOL bEnable)3834 TSP_Result MDrv_TSP_OutputPadCfg(DrvTSP_PadOut eOutputPad, DrvTSP_PadIn eInputPad, MS_BOOL bInParallel, MS_BOOL bEnable)
3835 {
3836 #if (TSP_TS_PAD_NUM > 1UL)
3837 MS_U32 u32InPad;
3838 MS_U32 u32OutPad = (eOutputPad & ~E_DRVTSP_OUTPAD_MODE_MASK);
3839 MS_U32 u32OutPadMode = eOutputPad & E_DRVTSP_OUTPAD_MODE_MASK;
3840
3841 //ULOGD("TSP", "[%s][%d] eOutputPad %lx, eInputPad %x, bInParallel %d, bEnable %d\n", __FUNCTION__, __LINE__, eOutputPad, (int)eInputPad, (int)bInParallel, (int)bEnable);
3842
3843 if(!((u32OutPad == E_DRVTSP_OUTPAD_PAD1) || (u32OutPad == E_DRVTSP_OUTPAD_PAD3)))
3844 {
3845 return DRVTSP_FAIL;
3846 }
3847
3848 if(bEnable == FALSE)
3849 {
3850 u32InPad = TSP_MUX_NONE;
3851 }
3852 else
3853 {
3854 switch(eInputPad)
3855 {
3856 case E_DRVTSP_PAD_EXT_INPUT0:
3857 u32InPad = TSP_MUX_TS0;
3858 break;
3859 case E_DRVTSP_PAD_EXT_INPUT1:
3860 u32InPad = TSP_MUX_TS1;
3861 break;
3862 case E_DRVTSP_PAD_EXT_INPUT2:
3863 u32InPad = TSP_MUX_TS2;
3864 break;
3865 #if defined(TSP_MUX_TS3)
3866 case E_DRVTSP_PAD_EXT_INPUT3:
3867 u32InPad = TSP_MUX_TS3;
3868 break;
3869 #endif
3870 #if defined(TSP_MUX_TS4)
3871 case E_DRVTSP_PAD_EXT_INPUT4:
3872 u32InPad = TSP_MUX_TS4;
3873 break;
3874 #endif
3875 #if defined(TSP_MUX_TS5)
3876 case E_DRVTSP_PAD_EXT_INPUT5:
3877 u32InPad = TSP_MUX_TS5;
3878 break;
3879 #endif
3880 case E_DRVTSP_PAD_DEMOD:
3881 u32InPad = TSP_MUX_INDEMOD;
3882 break;
3883 case E_DRVTSP_PAD_TSO:
3884 u32InPad = TSP_MUX_TSO;
3885 break;
3886 default:
3887 u32InPad = TSP_MUX_NONE;
3888 break;
3889 }
3890 }
3891
3892 _TSP_ENTRY();
3893
3894 if(HAL_TSP_TsOutPadCfg(u32OutPad, u32OutPadMode, u32InPad, bInParallel) == FALSE)
3895 {
3896 _TSP_RETURN(DRVTSP_FAIL);
3897 }
3898 else
3899 {
3900 _TSP_RETURN(DRVTSP_OK);
3901 }
3902
3903 #else
3904 return DRVTSP_FAIL;
3905 #endif
3906 }
3907
3908 //-------------------------------------------------------------------------------------------------
3909 /// Set TS out pad clock phase
3910 /// @param u16OutPad \b IN: Reserved for future using
3911 /// @param u16Val \b IN: Clock phase tuning value
3912 /// @param bEnable \b IN: TRUE:Enable Clock phase tuning; FALSE: Disable Clock phase tuning
3913 /// @return TSP_Result
3914 /// @note
3915 //-------------------------------------------------------------------------------------------------
MDrv_TSP_OutputClkPhase(MS_U16 u16OutPad,MS_U16 u16Val,MS_BOOL bEnable,MS_U32 u32S2pOpt)3916 TSP_Result MDrv_TSP_OutputClkPhase(MS_U16 u16OutPad, MS_U16 u16Val, MS_BOOL bEnable, MS_U32 u32S2pOpt)
3917 {
3918
3919 #if (defined(TSO_20_ENABLE) && (TSP_TS_PAD_NUM > 1))
3920
3921 _TSP_ENTRY();
3922
3923 if(HAL_TSP_TsOuOutClockPhase(u16OutPad, u16Val, bEnable, u32S2pOpt) == TRUE)
3924 {
3925 _TSP_RETURN(DRVTSP_OK);
3926 }
3927 else
3928 {
3929 _TSP_RETURN(DRVTSP_FAIL);
3930 }
3931 #else
3932 return DRVTSP_FAIL;
3933 #endif
3934
3935 }
3936
3937 //-------------------------------------------------------------------------------------------------
3938 // Inverting bit order of TS parallel input
3939 // @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
3940 // @param eIf \b IN: TSP TS interface
3941 // @param bInvert \b IN: bit order invert [1:invert 0:not invert]
3942 // @return TSP_Result
3943 // @note
3944 //-------------------------------------------------------------------------------------------------
MDrv_TSP_Parl_BitOrderSwap(MS_U32 u32EngId,DrvTSP_If eIf,MS_BOOL bInvert)3945 TSP_Result MDrv_TSP_Parl_BitOrderSwap(MS_U32 u32EngId, DrvTSP_If eIf, MS_BOOL bInvert)
3946 {
3947 MS_U32 u32Flow = 0;
3948 _TSP_ENTRY();
3949 if (u32EngId>= TSP_ENGINE_NUM)
3950 {
3951 _TSP_RETURN(DRVTSP_FAIL);
3952 }
3953
3954 switch (eIf)
3955 {
3956 case E_DRVTSP_IF_TS0:
3957 u32Flow = 0;
3958 break;
3959 case E_DRVTSP_IF_TS1:
3960 u32Flow = 1;
3961 break;
3962 case E_DRVTSP_IF_TS2:
3963 u32Flow = 2;
3964 break;
3965 case E_DRVTSP_IF_TS3:
3966 u32Flow = 3;
3967 break;
3968 default:
3969 MS_ASSERT(0);
3970 _TSP_RETURN(DRVTSP_FAIL);
3971 }
3972 HAL_TSP_Parl_BitOrderSwap(u32EngId, u32Flow, bInvert);
3973 _TSP_RETURN(DRVTSP_OK);
3974 }
3975
3976 //-------------------------------------------------------------------------------------------------
3977 /// Reset audio/video fifo or not
3978 /// @return TSP_Result
3979 /// @note
3980 //-------------------------------------------------------------------------------------------------
MDrv_TSP_AVFifo_Reset(DrvTSP_FltType eFilterType,MS_BOOL bFlush)3981 TSP_Result MDrv_TSP_AVFifo_Reset(DrvTSP_FltType eFilterType, MS_BOOL bFlush)
3982 {
3983 _TSP_ENTRY();
3984 switch (eFilterType)
3985 {
3986 case E_DRVTSP_FLT_TYPE_VIDEO:
3987 HAL_TSP_Flush_AV_FIFO(0, bFlush);
3988 break;
3989 case E_DRVTSP_FLT_TYPE_AUDIO:
3990 HAL_TSP_Flush_AV_FIFO(1, bFlush);
3991 break;
3992 case E_DRVTSP_FLT_TYPE_AUDIO2:
3993 HAL_TSP_Flush_AV_FIFO(2, bFlush);
3994 break;
3995 case E_DRVTSP_FLT_TYPE_VIDEO3D:
3996 HAL_TSP_Flush_AV_FIFO(3, bFlush);
3997 break;
3998 case E_DRVTSP_FLT_TYPE_AUDIO3:
3999 HAL_TSP_Flush_AV_FIFO(4, bFlush);
4000 break;
4001 case E_DRVTSP_FLT_TYPE_AUDIO4:
4002 HAL_TSP_Flush_AV_FIFO(5, bFlush);
4003 break;
4004 default:
4005 _TSP_RETURN(DRVTSP_FAIL);
4006 }
4007 _TSP_RETURN(DRVTSP_OK);
4008 }
4009
MDrv_TSP_AVFifo_Status(DrvTSP_FltType eFilterType,MS_U32 * u32FifoLevel)4010 TSP_Result MDrv_TSP_AVFifo_Status(DrvTSP_FltType eFilterType, MS_U32 *u32FifoLevel)
4011 {
4012 *u32FifoLevel = 0xFFFFFFFFUL;
4013
4014 _TSP_ENTRY();
4015 switch (eFilterType)
4016 {
4017 case E_DRVTSP_FLT_TYPE_VIDEO:
4018 *u32FifoLevel = HAL_TSP_Get_AVFifoLevel(0);
4019 break;
4020 case E_DRVTSP_FLT_TYPE_AUDIO:
4021 *u32FifoLevel = HAL_TSP_Get_AVFifoLevel(1);
4022 break;
4023 case E_DRVTSP_FLT_TYPE_AUDIO2:
4024 *u32FifoLevel = HAL_TSP_Get_AVFifoLevel(2);
4025 break;
4026 case E_DRVTSP_FLT_TYPE_VIDEO3D:
4027 *u32FifoLevel = HAL_TSP_Get_AVFifoLevel(3);
4028 break;
4029 case E_DRVTSP_FLT_TYPE_AUDIO3:
4030 *u32FifoLevel = HAL_TSP_Get_AVFifoLevel(4);
4031 break;
4032 case E_DRVTSP_FLT_TYPE_AUDIO4:
4033 *u32FifoLevel = HAL_TSP_Get_AVFifoLevel(5);
4034 break;
4035 default:
4036 _TSP_RETURN(DRVTSP_FAIL);
4037 }
4038 _TSP_RETURN(DRVTSP_OK);
4039 }
4040
MDrv_TSP_AVFifo_BlockEnable(DrvTSP_FltType eFilterType,MS_BOOL bEnable)4041 TSP_Result MDrv_TSP_AVFifo_BlockEnable(DrvTSP_FltType eFilterType, MS_BOOL bEnable)
4042 {
4043 MS_BOOL bAVFIFO_BLK_Disable = !bEnable;
4044 MS_U32 u32Fifo = 0;
4045
4046 _TSP_ENTRY();
4047 switch (eFilterType)
4048 {
4049 case E_DRVTSP_FLT_TYPE_VIDEO:
4050 u32Fifo = TSP_FIFO_VD;
4051 break;
4052 case E_DRVTSP_FLT_TYPE_AUDIO:
4053 u32Fifo = TSP_FIFO_AU;
4054 break;
4055 case E_DRVTSP_FLT_TYPE_AUDIO2:
4056 u32Fifo = TSP_FIFO_AUB;
4057 break;
4058 case E_DRVTSP_FLT_TYPE_VIDEO3D:
4059 u32Fifo = TSP_FIFO_V3D;
4060 break;
4061 case E_DRVTSP_FLT_TYPE_AUDIO3:
4062 u32Fifo = TSP_FIFO_AUC;
4063 break;
4064 case E_DRVTSP_FLT_TYPE_AUDIO4:
4065 u32Fifo = TSP_FIFO_AUD;
4066 break;
4067 default:
4068 _TSP_RETURN(DRVTSP_FAIL);
4069 }
4070
4071 HAL_TSP_AVFIFO_Block_Disable(u32Fifo, bAVFIFO_BLK_Disable);
4072
4073 _TSP_RETURN(DRVTSP_OK);
4074 }
4075
MDrv_TSP_AVFifo_SourceSelect(DrvTSP_PKTDMXSrcType ePKTSrc,MS_U32 u32FifoType)4076 TSP_Result MDrv_TSP_AVFifo_SourceSelect(DrvTSP_PKTDMXSrcType ePKTSrc, MS_U32 u32FifoType)
4077 {
4078 _TSP_ENTRY();
4079 HAL_TSP_AVFIFO_Src_Select(u32FifoType, ePKTSrc);
4080
4081 if((ePKTSrc == E_DRVTSP_PKTSRC_DEMUXFILE) || (ePKTSrc == E_DRVTSP_PKTSRC_DEMUXMMFI0) ||
4082 (ePKTSrc == E_DRVTSP_PKTSRC_DEMUXMMFI1))
4083 {
4084 HAL_TSP_AVFIFO_Block_Disable(u32FifoType, FALSE);
4085 }
4086 else
4087 {
4088 HAL_TSP_AVFIFO_Block_Disable(u32FifoType, TRUE);
4089 }
4090 _TSP_RETURN(DRVTSP_OK);
4091 }
4092 //-------------------------------------------------------------------------------------------------
4093 /// Get Last General Error Return Code
4094 /// @return TSP_Result
4095 /// @note
4096 /// Last error return code is reset after calling this function.
4097 //-------------------------------------------------------------------------------------------------
MDrv_TSP_GetLastErr(void)4098 TSP_Result MDrv_TSP_GetLastErr(void)
4099 {
4100 TSP_Result ret;
4101 ret = (TSP_Result)(_ptsp_res->_u32LastErr);
4102 _ptsp_res->_u32LastErr = DRVTSP_OK;
4103 return ret;
4104 }
4105
4106 //-------------------------------------------------------------------------------------------------
4107 /// Get TSP Flt states
4108 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
4109 /// @param peState \b OUT: Flter status
4110 /// @return TSP_Result
4111 /// @note
4112 //-------------------------------------------------------------------------------------------------
MDrv_TSP_Flt_GetState(MS_U32 u32EngId,MS_U32 u32FltId,DrvTSP_FltState * peState)4113 TSP_Result MDrv_TSP_Flt_GetState(MS_U32 u32EngId, MS_U32 u32FltId, DrvTSP_FltState *peState)
4114 {
4115 _TSP_ENTRY();
4116 TSP_ASSERT2(TSP_SECFLT_NUM> u32FltId, TSP_DBG("[TSP_ERROR][%06d] Bad FltId %d\n", __LINE__, (unsigned int)u32FltId));
4117 if (_TSP_Flt_StateGet(0, u32FltId, peState))
4118 {
4119 _TSP_RETURN(DRVTSP_OK);
4120 }
4121 else
4122 {
4123 _TSP_RETURN(DRVTSP_FAIL);
4124 }
4125 }
4126
4127 //-------------------------------------------------------------------------------------------------
4128 /// Get TSP Flt states
4129 /// @param u32EngId \b IN: index of CA engine [ 0 .. (@ref DSCMB_ENGINE_NUM-1) ]
4130 /// @param pu32StartId \b OUT: pointer to store dscmb filter start ID
4131 /// @param pu32EndId \b OUT: pointer to store dscmb filter end ID
4132 /// @return TSP_Result
4133 /// @note
4134 //-------------------------------------------------------------------------------------------------
MDrv_TSP_GetDscmbFltId_Range(MS_U32 u32EngId,MS_U32 * pu32StartId,MS_U32 * pu32EndId)4135 TSP_Result MDrv_TSP_GetDscmbFltId_Range(MS_U32 u32EngId, MS_U32 *pu32StartId, MS_U32 *pu32EndId)
4136 {
4137 MS_U8 u8ii, u8ScmSrcTsif;
4138 MS_U32 u32ScmDest, u32FltSrc;
4139
4140 *pu32StartId = 0;
4141 *pu32EndId = 0;
4142
4143 _TSP_ENTRY();
4144
4145 HAL_TSP_CSA_Get_CACtrl(u32EngId, &u8ScmSrcTsif, &u32ScmDest);
4146
4147 switch(u8ScmSrcTsif)
4148 {
4149 case TSP_SRC_FROM_PKTDMX0:
4150 u32FltSrc = E_DRVTSP_FLT_SOURCE_TYPE_LIVE;
4151 break;
4152 case TSP_SRC_FROM_PKTDMXFL:
4153 u32FltSrc = E_DRVTSP_FLT_SOURCE_TYPE_FILE;
4154 break;
4155 case TSP_SRC_FROM_PKTDMX1:
4156 u32FltSrc = E_DRVTSP_FLT_SOURCE_TYPE_TS1;
4157 break;
4158 case TSP_SRC_FROM_PKTDMX2:
4159 u32FltSrc = E_DRVTSP_FLT_SOURCE_TYPE_TS2;
4160 break;
4161 default:
4162 _TSP_RETURN(DRVTSP_FAIL);
4163 }
4164
4165 for(u8ii = 0; u8ii < TSP_CA_ENGINE_NUM; u8ii++)
4166 {
4167 if(_ptsp_res->_DscmbFlt_State[u8ii].u32Src & u32FltSrc)
4168 {
4169
4170 *pu32StartId = _ptsp_res->_DscmbFlt_State[u8ii].u32Start;
4171 *pu32EndId = _ptsp_res->_DscmbFlt_State[u8ii].u32End;
4172 _TSP_RETURN(DRVTSP_OK);
4173 }
4174 }
4175
4176 _TSP_RETURN(DRVTSP_FAIL);
4177 }
4178
4179 //-------------------------------------------------------------------------------------------------
4180 /// Get Dscmbler engine id depended on input source
4181 /// @param eInputSrc \b IN: Input source
4182 /// @param pu32EngId \b OUT: pointer to store dscmb engine ID
4183 /// @return TSP_Result
4184 /// @note
4185 //-------------------------------------------------------------------------------------------------
MDrv_TSP_GetDscmbEngIdx_BySource(DrvTSP_PKTDMXSrcType eInputSrc,MS_U32 * pu32EngId)4186 TSP_Result MDrv_TSP_GetDscmbEngIdx_BySource(DrvTSP_PKTDMXSrcType eInputSrc, MS_U32* pu32EngId)
4187 {
4188 DrvTSP_FltType eFltType = 0;
4189 *pu32EngId = 0xFF;
4190
4191 switch (eInputSrc)
4192 {
4193 case E_DRVTSP_PKTSRC_DEMUX0:
4194 eFltType = E_DRVTSP_FLT_SOURCE_TYPE_LIVE;
4195 break;
4196 case E_DRVTSP_PKTSRC_DEMUX1:
4197 eFltType = E_DRVTSP_FLT_SOURCE_TYPE_TS1 | E_DRVTSP_FLT_SOURCE_TYPE_FILE1;
4198 break;
4199 case E_DRVTSP_PKTSRC_DEMUX2:
4200 eFltType = E_DRVTSP_FLT_SOURCE_TYPE_TS2 | E_DRVTSP_FLT_SOURCE_TYPE_FILE2;
4201 break;
4202 case E_DRVTSP_PKTSRC_DEMUXFILE:
4203 eFltType = E_DRVTSP_FLT_SOURCE_TYPE_FILE;
4204 break;
4205 default:
4206 return DRVTSP_FAIL;
4207 }
4208
4209 _TSP_ENTRY();
4210 *pu32EngId = ((MS_U32)_TSP_Get_DscmbEngId_ByFltSrc(eFltType)) & 0xFF;
4211 _TSP_RETURN(DRVTSP_OK);
4212
4213 }
4214
4215 //-------------------------------------------------------------------------------------------------
4216 /// Set/Get Dscmb engine control path
4217 /// @param u32EngId \b IN: index of CA engine [ 0 .. (@ref DSCMB_ENGINE_NUM-1) ]
4218 /// @param peInputSrc \b IN/OUT: Pointer to store Dscmb Engine input source
4219 /// @param bSet \b IN: Get or set dscmb eingine path
4220 /// @return TSP_Result
4221 /// @note
4222 //-------------------------------------------------------------------------------------------------
MDrv_TSP_Dscmb_Source(MS_U32 u32EngId,DrvTSP_PKTDMXSrcType * peInputSrc,MS_BOOL bSet)4223 TSP_Result MDrv_TSP_Dscmb_Source(MS_U32 u32EngId, DrvTSP_PKTDMXSrcType* peInputSrc, MS_BOOL bSet)
4224 {
4225 TSP_ASSERT(u32EngId < TSP_CA_ENGINE_NUM, TSP_DBG("[TSP_ERROR][%06d] Bad Dscmb Id %d\n", __LINE__, (int)u32EngId));
4226
4227 _TSP_ENTRY();
4228
4229 if(bSet == FALSE)
4230 {
4231 *peInputSrc = 0;
4232 if(_ptsp_res->_DscmbFlt_State[u32EngId].u32Src & E_DRVTSP_FLT_SOURCE_TYPE_LIVE)
4233 {
4234 *peInputSrc = E_DRVTSP_PKTSRC_DEMUX0;
4235 }
4236 else if(_ptsp_res->_DscmbFlt_State[u32EngId].u32Src & E_DRVTSP_FLT_SOURCE_TYPE_TS1)
4237 {
4238 *peInputSrc = E_DRVTSP_PKTSRC_DEMUX1;
4239 }
4240 else if(_ptsp_res->_DscmbFlt_State[u32EngId].u32Src & E_DRVTSP_FLT_SOURCE_TYPE_TS2)
4241 {
4242 *peInputSrc = E_DRVTSP_PKTSRC_DEMUX2;
4243 }
4244 else if(_ptsp_res->_DscmbFlt_State[u32EngId].u32Src & E_DRVTSP_FLT_SOURCE_TYPE_FILE)
4245 {
4246 *peInputSrc = E_DRVTSP_PKTSRC_DEMUXFILE;
4247 }
4248 _TSP_RETURN(DRVTSP_OK);
4249 }
4250 else
4251 {
4252 MS_U8 u8OrgCaEng = 0xFF, u8CaSrc = 0;
4253 DrvTSP_FltType eFltType = 0;
4254 MS_U32 u32CaDes = 0;
4255
4256 switch (*peInputSrc)
4257 {
4258 case E_DRVTSP_PKTSRC_DEMUX0:
4259 eFltType = E_DRVTSP_FLT_SOURCE_TYPE_LIVE;
4260 u8CaSrc = TSP_SRC_FROM_TSIF0_LIVE;
4261 u32CaDes = TSP_PKTDMX0_LIVE;
4262 break;
4263 case E_DRVTSP_PKTSRC_DEMUX1:
4264 eFltType = E_DRVTSP_FLT_SOURCE_TYPE_TS1 | E_DRVTSP_FLT_SOURCE_TYPE_FILE1;
4265 u8CaSrc = TSP_SRC_FROM_TSIF1;
4266 u32CaDes = TSP_PKTDMX1;
4267 break;
4268 case E_DRVTSP_PKTSRC_DEMUX2:
4269 eFltType = E_DRVTSP_FLT_SOURCE_TYPE_TS2 | E_DRVTSP_FLT_SOURCE_TYPE_FILE2;
4270 u8CaSrc = TSP_SRC_FROM_TSIF2;
4271 u32CaDes = TSP_PKTDMX2;
4272 break;
4273 case E_DRVTSP_PKTSRC_DEMUXFILE:
4274 eFltType = E_DRVTSP_FLT_SOURCE_TYPE_FILE;
4275 u8CaSrc = TSP_SRC_FROM_TSIF0_FILE;
4276 u32CaDes = TSP_PKTDMX0_FILE;
4277 break;
4278 default:
4279 _TSP_RETURN(DRVTSP_FAIL);
4280 }
4281
4282 _ptsp_res->_DscmbFlt_State[u32EngId].u32Src = eFltType;
4283 HAL_TSP_CSA_Set_CACtrl((MS_U8)u32EngId, u8CaSrc, u32CaDes);
4284
4285 u8OrgCaEng = _TSP_Get_DscmbEngId_ByFltSrc(eFltType);
4286 if((u8OrgCaEng < TSP_CA_ENGINE_NUM) && (u8OrgCaEng != (MS_U8)u32EngId))
4287 {
4288 _ptsp_res->_DscmbFlt_State[u8OrgCaEng].u32Src &= ~eFltType;
4289 HAL_TSP_CSA_Set_ScrmPath(u8OrgCaEng, 0);
4290 }
4291
4292 _TSP_RETURN(DRVTSP_OK);
4293 }
4294 }
4295
4296 //-------------------------------------------------------------------------------------------------
4297 /// Enable remove duplicate A/V packets
4298 /// @param bEnable \b IN: Enable or Disable
4299 /// @return TSP_Result
4300 /// @note
4301 //-------------------------------------------------------------------------------------------------
MDrv_TSP_RemoveDupAVPkt(MS_BOOL bEnable)4302 TSP_Result MDrv_TSP_RemoveDupAVPkt(MS_BOOL bEnable)
4303 {
4304 _TSP_ENTRY();
4305 HAL_TSP_RemoveDupAVPkt(bEnable);
4306 _TSP_RETURN(DRVTSP_OK);
4307 }
4308
4309 //-------------------------------------------------------------------------------------------------
4310 /// Enable remove duplicate A/V packets
4311 /// @param flttype \b IN: FIFO type
4312 /// @param bEnable \b IN: Enable or Disable
4313 /// @return TSP_Result
4314 /// @note
4315 //-------------------------------------------------------------------------------------------------
MDrv_TSP_RemoveDupAVFifoPkt(DrvTSP_FltType flttype,MS_BOOL bEnable)4316 TSP_Result MDrv_TSP_RemoveDupAVFifoPkt(DrvTSP_FltType flttype, MS_BOOL bEnable)
4317 {
4318 MS_U32 u32FifoIdx = 0;
4319
4320 _TSP_ENTRY();
4321
4322 if(flttype == E_DRVTSP_FLT_TYPE_VIDEO)
4323 {
4324 u32FifoIdx = 0;
4325 }
4326 else if(flttype == E_DRVTSP_FLT_TYPE_AUDIO)
4327 {
4328 u32FifoIdx = 1;
4329 }
4330 else if(flttype == E_DRVTSP_FLT_TYPE_AUDIO2)
4331 {
4332 u32FifoIdx = 2;
4333 }
4334 else if(flttype == E_DRVTSP_FLT_TYPE_VIDEO3D)
4335 {
4336 u32FifoIdx = 3;
4337 }
4338 #if (TSP_AUDIO3_AUDIO4_SUPPORT == 1)
4339 else if(flttype == E_DRVTSP_FLT_TYPE_AUDIO3)
4340 {
4341 u32FifoIdx = 4;
4342 }
4343 else if(flttype == E_DRVTSP_FLT_TYPE_AUDIO4)
4344 {
4345 u32FifoIdx = 5;
4346 }
4347 #endif
4348 else
4349 {
4350 _TSP_RETURN(DRVTSP_INVALID_PARAM);
4351 }
4352
4353 HAL_TSP_RemoveDupAVFifoPkt(u32FifoIdx, bEnable);
4354
4355 _TSP_RETURN(DRVTSP_OK);
4356 }
4357
4358 //-------------------------------------------------------------------------------------------------
4359 /// Enable or Disable to remove audio,or video error packets.
4360 /// @param bEnable \b IN: Enable or Disable
4361 /// @return TSP_Result
4362 /// @note
4363 //-------------------------------------------------------------------------------------------------
MDrv_TSP_TEI_RemoveErrorPkt(TSP_DRV_TEI_RmPktType eDrvPktType,MS_BOOL bEnable)4364 TSP_Result MDrv_TSP_TEI_RemoveErrorPkt(TSP_DRV_TEI_RmPktType eDrvPktType, MS_BOOL bEnable)
4365 {
4366 MS_U32 u32PktType = TSP_PKTDMX_NONE;
4367
4368 switch(eDrvPktType)
4369 {
4370 case E_TSP_DRV_TEI_REMOVE_PKT0_LIVE:
4371 u32PktType = TSP_PKTDMX0_LIVE;
4372 break;
4373 case E_TSP_DRV_TEI_REMOVE_PKT0_FILE:
4374 u32PktType = TSP_PKTDMX0_FILE;
4375 break;
4376 case E_TSP_DRV_TEI_REMOVE_PKT1:
4377 u32PktType = TSP_PKTDMX1;
4378 break;
4379 case E_TSP_DRV_TEI_REMOVE_PKT2:
4380 u32PktType = TSP_PKTDMX2;
4381 break;
4382 default:
4383 return DRVTSP_FAIL;
4384 }
4385
4386 _TSP_ENTRY();
4387
4388 HAL_TSP_TEI_RemoveErrorPkt(u32PktType, bEnable);
4389
4390 _TSP_RETURN(DRVTSP_OK);
4391 }
4392
4393
4394 //-------------------------------------------------------------------------------------------------
4395 /// Enable audio BD stream mode
4396 /// @param bEnable \b IN: Enable or Disable
4397 /// @return TSP_Result
4398 /// @note
4399 //-------------------------------------------------------------------------------------------------
MDrv_TSP_AU_BD_Mode_Enable(MS_BOOL bEnable)4400 TSP_Result MDrv_TSP_AU_BD_Mode_Enable(MS_BOOL bEnable)
4401 {
4402 if(HAL_TSP_AU_BD_Mode_Enable(bEnable))
4403 {
4404 return DRVTSP_OK;
4405 }
4406 else
4407 {
4408 return DRVTSP_NOT_SUPPORTED;
4409 }
4410 }
4411
4412 //-------------------------------------------------------------------------------------------------
4413 /// Enable or Disable STC64 bit mode. Defalut is STC33 mode.
4414 /// @param bEnable \b IN: STC64 system time mode enable
4415 /// @return TSP_Result
4416 /// @note
4417 //-------------------------------------------------------------------------------------------------
MDrv_TSP_STC64_Mode_Enable(MS_BOOL bEnable)4418 TSP_Result MDrv_TSP_STC64_Mode_Enable(MS_BOOL bEnable)
4419 {
4420 _TSP_ENTRY();
4421 HAL_TSP_STC64_Mode_En(bEnable);
4422 _TSP_RETURN(DRVTSP_OK);
4423 }
4424
4425 //-------------------------------------------------------------------------------------------------
4426 /// STC Clock Rate Adjust (27MHz clock)
4427 /// @param u32EngId \b IN: STC engine ID
4428 /// @param bUpClk \b IN: If TRUE, Clk will be faster, and if FALSE, Clk will be slower
4429 /// @param u32Percentage \b IN: The percentage of STC clock ratio
4430 /// @return TSP_Result
4431 /// @note
4432 /// StcClk = (InClk * (2^27) /Stc_CW) * 3.2
4433 /// Stc_CW = Stc_CW_Def / P
4434 //-------------------------------------------------------------------------------------------------
MDrv_TSP_STCClk_Adjust(MS_U32 u32EngId,MS_BOOL bUpClk,MS_U32 u32Percentage)4435 TSP_Result MDrv_TSP_STCClk_Adjust(MS_U32 u32EngId, MS_BOOL bUpClk, MS_U32 u32Percentage)
4436 {
4437 MS_U64 u64CW_New = 0;
4438
4439 _TSP_ENTRY();
4440
4441 u64CW_New = (((MS_U64)STC_SYNTH_DEFAULT) & 0xFFFFFFFFUL) * (((MS_U64)_ptsp_res->_u32StcAdjustUnit) & 0xFFFFFFFFUL) / (((MS_U64)u32Percentage) & 0xFFFFFFFFUL);
4442
4443 //printf("[%s](%d, %d, %d) CW %d\n", __FUNCTION__, (unsigned int)u32EngId, (unsigned int)bUpClk, (unsigned int)u32Percentage, (unsigned int)u64CW_New);
4444
4445 HAL_TSP_Stc_ctrl(u32EngId, (MS_U32)u64CW_New);
4446
4447 _TSP_RETURN(DRVTSP_OK);
4448 }
4449
4450 // Hidden interface. For Mstar use only
4451 //-------------------------------------------------------------------------------------------------
4452 // Set/Get TSP filter information
4453 // @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
4454 // @param pu32StartFlt \b IN/OUT: starting filter id which is availabe
4455 // @param pu32EndFlt \b IN/OUT: starting filter id which is availabe
4456 // @param bSet \b IN: TRUE set, and FALSE for get
4457 // @return TSP_Result
4458 // @note
4459 //-------------------------------------------------------------------------------------------------
MDrv_TSP_Flt_SetOwner(MS_U32 u32EngId,MS_U32 u32FltIdStart,MS_U32 u32FltIdEnd,MS_BOOL bOwner)4460 TSP_Result MDrv_TSP_Flt_SetOwner(MS_U32 u32EngId, MS_U32 u32FltIdStart, MS_U32 u32FltIdEnd, MS_BOOL bOwner)
4461 {
4462 MS_U32 i = 0;
4463
4464 _TSP_ENTRY();
4465 TSP_ASSERT2(0UL <= u32FltIdStart, TSP_DBG("[TSP_ERROR][%06d] Bad FltIdStart\n", __LINE__));
4466 TSP_ASSERT2(0UL <= u32FltIdEnd, TSP_DBG("[TSP_ERROR][%06d] Bad FltIdEnd\n", __LINE__));
4467 TSP_ASSERT2(u32FltIdEnd >= u32FltIdStart, TSP_DBG("[TSP_ERROR][%06d] u32FltIdEnd < u32FltIdStart\n", __LINE__));
4468 TSP_ASSERT2(TSP_SECFLT_NUM > u32FltIdStart, TSP_DBG("[TSP_ERROR][%06d] Bad FltIdStart\n", __LINE__));
4469 TSP_ASSERT2(TSP_SECFLT_NUM >= u32FltIdEnd, TSP_DBG("[TSP_ERROR][%06d] Bad FltIdEnd\n", __LINE__));
4470
4471 for (i = u32FltIdStart; (i <= u32FltIdEnd) && (i < TSP_SECFLT_NUM); i++)
4472 {
4473 if ((_ptsp_res->_TspState[u32EngId].FltState[i] != E_DRVTSP_FLT_STATE_FREE) &&
4474 (_ptsp_res->_TspState[u32EngId].FltState[i] != E_DRVTSP_FLT_STATE_NA))
4475 {
4476 MS_ASSERT(0);
4477 }
4478 if ((_ptsp_res->_TspState[u32EngId].SecFltState[i] != E_DRVTSP_FLT_STATE_FREE) &&
4479 (_ptsp_res->_TspState[u32EngId].SecFltState[i] != E_DRVTSP_FLT_STATE_NA))
4480 {
4481 MS_ASSERT(0);
4482 }
4483 if ((_ptsp_res->_TspState[u32EngId].SecBufState[i] != E_DRVTSP_FLT_STATE_FREE) &&
4484 (_ptsp_res->_TspState[u32EngId].SecBufState[i] != E_DRVTSP_FLT_STATE_NA))
4485 {
4486 MS_ASSERT(0);
4487 }
4488
4489 if (bOwner)
4490 {
4491 //reserverd 32 non-scramble filter for duplicate filter
4492 #ifdef DUP_PIDFLT_API
4493 if((i <= DSCMB2_FLT_END_ID) || (i >= DSCMB_FLT_SHAREKEY_END_ID))
4494 #endif
4495 #ifdef DUP_PIDFLT
4496 //reserverd 16 non-scramble filter for duplicate filter
4497 if((i <= DSCMB2_FLT_END_ID) || (i >= DSCMB_FLT_SHAREKEY_START_ID))
4498 #endif
4499 _ptsp_res->_TspState[u32EngId].FltState[i] = E_DRVTSP_FLT_STATE_FREE;
4500 _ptsp_res->_TspState[u32EngId].SecFltState[i] = E_DRVTSP_FLT_STATE_FREE;
4501 _ptsp_res->_TspState[u32EngId].SecBufState[i] = E_DRVTSP_FLT_STATE_FREE;
4502 HAL_TSP_SetOwner(u32EngId, i, TRUE);
4503 }
4504 else
4505 {
4506 _ptsp_res->_TspState[u32EngId].FltState[i] = E_DRVTSP_FLT_STATE_NA;
4507 _ptsp_res->_TspState[u32EngId].SecFltState[i] = E_DRVTSP_FLT_STATE_NA;
4508 _ptsp_res->_TspState[u32EngId].SecBufState[i] = E_DRVTSP_FLT_STATE_NA;
4509 HAL_TSP_SetOwner(u32EngId, i, FALSE);
4510 }
4511 }
4512 _TSP_RETURN(DRVTSP_OK);
4513 }
4514
4515 //-------------------------------------------------------------------------------------------------
4516 // Ask TSP to process section/pvr data for Non-OS driver. Calling this function in OS environment causes nothing
4517 // @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
4518 // @param u32FltId \b IN: Which filter id to process. 0xFFFFFFFF means process all filters (DMXID)
4519 // @param u32Timeout \b IN: Max time for TSP to process
4520 // @return TSP_Result
4521 // @note
4522 //-------------------------------------------------------------------------------------------------
MDrv_TSP_Proc(MS_U32 u32EngId,MS_U32 u32FltId,TSP_Result * pRet,DrvTSP_Event * pEvt)4523 TSP_Result MDrv_TSP_Proc(MS_U32 u32EngId, MS_U32 u32FltId, TSP_Result* pRet, DrvTSP_Event* pEvt) // for non-OS TSP scheduling
4524 {
4525 OSAL_TSP_ProcTypeParam Data;
4526 _TSP_ENTRY();
4527 TSP_ASSERT2(TSP_SECFLT_NUM > u32FltId, TSP_DBG("[TSP_ERROR][%06d] Bad FltId %u\n", __LINE__, (unsigned int)u32FltId));
4528 if (_ptsp_res->_TspState[u32EngId].FltState[u32FltId] == E_DRVTSP_FLT_STATE_NA)
4529 {
4530 _TSP_RETURN(DRVTSP_FAIL);
4531 }
4532 Data.u32FltId = u32FltId;
4533 Data.pRet = (void*)pRet;
4534 Data.bInfiniteWait = FALSE;
4535 Data.bFromTask = FALSE;
4536
4537 _TSP_IND_UNLOCK();
4538 OSAL_TSP_Proc(_TSP_Isr_ProcPoll, &Data, (MS_U32*)pEvt);
4539 _TSP_IND_LOCK();
4540
4541 _TSP_RETURN(DRVTSP_OK);
4542 }
4543
4544
4545 //-------------------------------------------------------------------------------------------------
4546 // Allocate STC engine.
4547 // @param pu32EngId \b OUT: STC engine id. If no free STC engine, it will be 0xFFFFFFFF and return FAIL.
4548 // @return TSP_Result
4549 // @note
4550 //-------------------------------------------------------------------------------------------------
MDrv_TSP_STC_Alloc(MS_U32 * pu32EngId)4551 TSP_Result MDrv_TSP_STC_Alloc(MS_U32 *pu32EngId)
4552 {
4553 TSP_Result ret;
4554
4555 _TSP_ENTRY();
4556
4557 ret = _TSP_STC_Alloc(0, pu32EngId);
4558
4559 _TSP_RETURN(ret);
4560 }
4561
4562
4563 //-------------------------------------------------------------------------------------------------
4564 // Free STC engine
4565 // @param u32EngId \b IN: index of STC engine to be free
4566 // @return TSP_Result
4567 // @note
4568 //-------------------------------------------------------------------------------------------------
MDrv_TSP_STC_Free(MS_U32 u32EngId)4569 TSP_Result MDrv_TSP_STC_Free(MS_U32 u32EngId)
4570 {
4571 TSP_Result ret = DRVTSP_FAIL;
4572
4573 _TSP_ENTRY();
4574
4575 ret = _TSP_STC_Free(u32EngId);
4576
4577 _TSP_RETURN(ret);
4578 }
4579
4580 //-------------------------------------------------------------------------------------------------
4581 // Free STC engine
4582 // @param u32PcrFltId \b IN: index of PCR PID filter
4583 // @param pu32EngId \b Out: index of STC engine which u32PcrFltId mapping to
4584 // @return TSP_Result
4585 // @note
4586 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PcrId_To_StcId(MS_U32 u32PcrFltId,MS_U32 * pu32EngId)4587 TSP_Result MDrv_TSP_PcrId_To_StcId(MS_U32 u32PcrFltId,MS_U32 *pu32EngId)
4588 {
4589 TSP_Result ret = DRVTSP_FAIL;
4590
4591 _TSP_ENTRY();
4592
4593 ret = _TSP_PcrId_To_StcId(u32PcrFltId, pu32EngId);
4594
4595 _TSP_RETURN(ret);
4596 }
4597
4598
4599 //-------------------------------------------------------------------------------------------------
4600 /// Get current system time clock (STC) of TSP
4601 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
4602 /// @param pu32STC_32 \b OUT: pointer of STC[32] return
4603 /// @param pu32STC \b OUT: pointer of STC[31:0] return
4604 /// @return TSP_Result
4605 //-------------------------------------------------------------------------------------------------
MDrv_TSP_GetSTC(MS_U32 u32EngId,MS_U32 * pu32STC_32,MS_U32 * pu32STC)4606 TSP_Result MDrv_TSP_GetSTC(MS_U32 u32EngId, MS_U32 *pu32STC_32, MS_U32 *pu32STC)
4607 {
4608 _TSP_ENTRY();
4609 HAL_TSP_STC_Update_Disable(u32EngId, TRUE);
4610 *pu32STC = HAL_TSP_GetSTC(u32EngId);
4611 *pu32STC_32 = HAL_TSP_GetSTC_32(u32EngId);
4612 HAL_TSP_STC_Update_Disable(u32EngId, FALSE);
4613
4614 _TSP_RETURN(DRVTSP_OK);
4615 }
4616
4617
4618 //-------------------------------------------------------------------------------------------------
4619 /// Set STC control
4620 /// @param u8Eng \b IN: STC Engine ID
4621 /// @param u8Opt \b IN: STC update control options
4622 /// 0x00 -> Update STC by TSP FW
4623 /// 0x01 -> Update STC by HK
4624 /// 0x02 -> Update STC Once when PCR reset
4625 /// @note
4626 //-------------------------------------------------------------------------------------------------
MDrv_TSP_STC_UpdateCtrl(MS_U8 u8Eng,MS_U8 u8Mode)4627 TSP_Result MDrv_TSP_STC_UpdateCtrl(MS_U8 u8Eng, MS_U8 u8Mode)
4628 {
4629 _TSP_ENTRY();
4630
4631 TSP_ASSERT2(TSP_STC_NUM> u8Eng, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u8Eng));
4632
4633 if (HAL_TSP_STC_UpdateCtrl(u8Eng, u8Mode))
4634 {
4635 _TSP_RETURN(DRVTSP_OK);
4636 }
4637 else
4638 {
4639 _TSP_RETURN(DRVTSP_FAIL);
4640 }
4641 }
4642
4643 //-------------------------------------------------------------------------------------------------
4644 /// Select STC Engine (Only support in driver version 3.0)
4645 /// @param eFltSrc \b IN: Fliter Source type
4646 /// @param u32StcEng \b IN: STC engine ID (0, 1)
4647 /// @return DMX_FILTER_STATUS_OK - Success
4648 /// @return DMX_FILTER_STATUS_ERROR - Failure
4649 /// @note
4650 //-------------------------------------------------------------------------------------------------
MDrv_TSP_STC_Select(DrvTSP_FltType eFltSrc,MS_U32 u32StcEng)4651 TSP_Result MDrv_TSP_STC_Select(DrvTSP_FltType eFltSrc, MS_U32 u32StcEng)
4652 {
4653 TSP_Result ret;
4654 MS_U32 i;
4655 _TSP_ENTRY();
4656
4657 TSP_ASSERT2(TSP_STC_NUM> u32StcEng, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32StcEng));
4658
4659 ret = _TSP_STC_Select(eFltSrc,u32StcEng);
4660
4661 for(i=0;i<TSP_STC_NUM;i++)
4662 {
4663 if(_ptsp_res->_TspStcState[i].bUsed)
4664 TSP_DBG("[TSP_WARNING][%06d] STC Allocate before STC Select!\n", __LINE__);
4665
4666 if(_ptsp_res->_TspStcState[i].u32SrcType == (eFltSrc & E_DRVTSP_FLT_SOURCE_TYPE_MASK))
4667 _ptsp_res->_TspStcState[u32StcEng].u32PcrFltId = _ptsp_res->_TspStcState[i].u32PcrFltId;
4668 }
4669
4670 _ptsp_res->_TspStcState[u32StcEng].u32SrcType = eFltSrc & E_DRVTSP_FLT_SOURCE_TYPE_MASK;
4671 _ptsp_res->_bStcAllocDisable = TRUE;
4672
4673 _TSP_RETURN(ret);
4674
4675 }
4676
4677 //-------------------------------------------------------------------------------------------------
4678 /// Add or subtract STC Offset
4679 // @param u32EngId \b IN: index of STC engine
4680 // @param u32Offset \b IN: STC offset value
4681 // @param bAdd \b IN: If TRUE, add the offset value; otherwise subtract the offset value
4682 // @return TSP_Result
4683 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SetSTCOffset(MS_U32 u32EngId,MS_U32 u32Offset,MS_BOOL bAdd)4684 TSP_Result MDrv_TSP_SetSTCOffset(MS_U32 u32EngId, MS_U32 u32Offset, MS_BOOL bAdd)
4685 {
4686 _TSP_ENTRY();
4687 HAL_TSP_SetSTCOffset(u32EngId, u32Offset, bAdd);
4688 _TSP_RETURN(DRVTSP_OK);
4689 }
4690
4691
4692 //-------------------------------------------------------------------------------------------------
4693 /// Get PRC of TSP
4694 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
4695 /// @param pu32Pcr_32 \b OUT: pointer of STC[32] return
4696 /// @param pu32Pcr \b OUT: pointer of STC[31:0] return
4697 /// @return TSP_Result
4698 //-------------------------------------------------------------------------------------------------
MDrv_TSP_GetPCR(MS_U32 u32EngId,MS_U32 * pu32Pcr_32,MS_U32 * pu32Pcr)4699 TSP_Result MDrv_TSP_GetPCR(MS_U32 u32EngId, MS_U32 *pu32Pcr_32, MS_U32 *pu32Pcr)
4700 {
4701 _TSP_ENTRY();
4702 if (u32EngId >= TSP_PCRFLT_NUM)
4703 {
4704 _TSP_RETURN(DRVTSP_FAIL);
4705 }
4706 if (HAL_TSP_GetPcr(u32EngId, pu32Pcr_32, pu32Pcr))
4707 {
4708 _TSP_RETURN(DRVTSP_OK);
4709 }
4710 _TSP_RETURN(DRVTSP_FAIL);
4711 }
4712
4713 // PIDFlt API
4714 //-------------------------------------------------------------------------------------------------
4715 /// Allocate a PID filter of a TSP unit
4716 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
4717 /// @param eFilterType \b IN: type of PID filter to be allocated
4718 /// @param pu32PidFltId \b OUT: pointer of PID filter id return
4719 /// @return TSP_Result
4720 /// @note
4721 /// These filter types have to select a section filter\n
4722 /// @ref E_DRVTSP_FLT_TYPE_SECTION\n
4723 /// @ref E_DRVTSP_FLT_TYPE_PCR\n
4724 /// @ref E_DRVTSP_FLT_TYPE_PES\n
4725 /// @note
4726 /// These filter types also have to setup section buffer for data output\n
4727 /// @ref E_DRVTSP_FLT_TYPE_SECTION\n
4728 /// @ref E_DRVTSP_FLT_TYPE_PES\n
4729 /// @sa MDrv_TSP_PidFlt_SelSecFlt, MDrv_TSP_SecFlt_SetBuffer
4730 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PidFlt_Alloc(MS_U32 u32EngId,DrvTSP_FltType eFilterType,MS_U32 * pu32PidFltId)4731 TSP_Result MDrv_TSP_PidFlt_Alloc(MS_U32 u32EngId, DrvTSP_FltType eFilterType, MS_U32 *pu32PidFltId)
4732 {
4733 _TSP_ENTRY();
4734
4735 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
4736
4737 #if (TSP_AUDIO3_AUDIO4_SUPPORT == 0) // if not support audio C & audio D FIFO
4738 TSP_ASSERT2((E_DRVTSP_FLT_TYPE_AUDIO3 != (eFilterType&~E_DRVTSP_FLT_MASK)) &&
4739 (E_DRVTSP_FLT_TYPE_AUDIO4 != (eFilterType&~E_DRVTSP_FLT_MASK)),
4740 TSP_DBG("[TSP_ERROR][%06d] Bad Filter Type %u\n", __LINE__, (unsigned int)eFilterType));
4741 #endif
4742
4743 *pu32PidFltId = 0xFFFFFFFFUL;
4744 if (!_TSP_PidFlt_Alloc(u32EngId, eFilterType, pu32PidFltId))
4745 {
4746 TSP_ASSERT2(0, TSP_DBG("[TSP_ERROR][%06d] Allocate Pid Filter fail\n", __LINE__));
4747 _TSP_RETURN(DRVTSP_FAIL);
4748 }
4749 _TSP_PidFlt_Init(u32EngId, *pu32PidFltId);
4750
4751 #ifndef HWPCR_ENABLE
4752 if (E_DRVTSP_FLT_TYPE_PCR == (eFilterType&~E_DRVTSP_FLT_MASK))
4753 {
4754 MS_U32 u32SecFltId = *pu32PidFltId;
4755 if (!_TSP_SecFlt_Alloc(u32EngId, eFilterType, &u32SecFltId))
4756 {
4757 TSP_ASSERT2(0, TSP_DBG("[TSP_ERROR][%06d] Allocate Section Filter fail\n", __LINE__));
4758 }
4759 HAL_TSP_PidFlt_SelSecFlt(u32EngId, *pu32PidFltId, u32SecFltId);
4760 _ptsp_res->_TspState[u32EngId].FltMap[*pu32PidFltId] = u32SecFltId;
4761 _TSP_SecFlt_SetType(u32EngId, u32SecFltId, _ptsp_res->_TspState[u32EngId].FltType[*pu32PidFltId]);
4762
4763 #ifdef DUP_PIDFLT_API
4764 if(_ptsp_res->_TspState[u32EngId].DupFlt[*pu32PidFltId] != 0xFFFFUL)
4765 {
4766 MS_U32 u32DupFlt = _ptsp_res->_TspState[u32EngId].DupFlt[*pu32PidFltId];
4767
4768 HAL_TSP_PidFlt_SelSecFlt(u32EngId, u32DupFlt, u32SecFltId);
4769 _ptsp_res->_TspState[u32EngId].FltMap[u32DupFlt] = u32SecFltId;
4770 }
4771 #endif
4772 }
4773 #endif
4774
4775 _TSP_RETURN(DRVTSP_OK);
4776 }
4777
4778 //-------------------------------------------------------------------------------------------------
4779 /// Free a PID filter of a TSP unit
4780 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
4781 /// @param u32PidFltId \b IN: index of PID filter to be free
4782 /// @return TSP_Result
4783 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PidFlt_Free(MS_U32 u32EngId,MS_U32 u32PidFltId)4784 TSP_Result MDrv_TSP_PidFlt_Free(MS_U32 u32EngId, MS_U32 u32PidFltId)
4785 {
4786 MS_U32 u32SecFltId, u32Flag = 0;
4787 TSP_Result tRes = DRVTSP_FAIL;
4788
4789 _TSP_ENTRY();
4790
4791 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
4792 // this API only free pidflt which had section
4793 TSP_ASSERT2(TSP_PIDFLT_NUM_ALL> u32PidFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFltId %d\n", __LINE__, (unsigned int)u32PidFltId));
4794
4795 //_TSP_IND_UNLOCK();
4796 if (E_DRVTSP_FLT_STATE_FREE == _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId])
4797 {
4798 _TSP_RETURN(DRVTSP_OK);
4799 }
4800
4801 // PVR pid filters and AV pid filter do not have SecFltEvtNotify, so call free function directly.
4802 u32SecFltId = _ptsp_res->_TspState[u32EngId].FltMap[u32PidFltId];
4803 if((u32SecFltId >= TSP_SECFLT_NUM) ||
4804 ((_ptsp_res->_TspState[u32EngId].FltType[u32PidFltId] & E_DRVTSP_FLT_TYPE_SECTION_MASK) == 0))
4805 {
4806 //_TSP_IND_LOCK();
4807 _TSP_PidFlt_Free(u32EngId, u32PidFltId, TRUE);
4808 _TSP_RETURN(DRVTSP_OK);
4809 }
4810
4811 if ((_ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecFltId] & E_DRVTSP_EVENT_CB_MASK) == E_DRVTSP_EVENT_CB_POLL)
4812 {
4813 //_TSP_IND_LOCK();
4814 _TSP_SecBuf_Free(0, u32SecFltId);
4815 _TSP_SecFlt_Free(0, u32SecFltId, TRUE);
4816 _TSP_PidFlt_Free(u32EngId, u32PidFltId, TRUE);
4817 _TSP_RETURN(DRVTSP_OK);
4818 }
4819 else if ((_ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecFltId] & E_DRVTSP_EVENT_CB_MASK) == E_DRVTSP_EVENT_CB_SELF)
4820 {
4821 if (E_DRVTSP_FLT_STATE_FREE == _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId])
4822 {
4823 _TSP_RETURN(DRVTSP_OK);
4824 }
4825
4826 #if 1
4827 if((_s32TspTaskId != -1) && (_s32TspTaskId == MsOS_GetOSThreadID()))
4828 {
4829 TSP_DBG("[TSP_ERROR][%06d] Don't call %s in Callback function!!!", __LINE__, __FUNCTION__);
4830 _TSP_RETURN(DRVTSP_FAIL);
4831 }
4832 #endif
4833
4834 if(_ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] & E_DRVTSP_FLT_STATE_CBRUN)
4835 {
4836 //ULOGD("TSP", "[%s][%d]Warning !! Filter %d callback is running %x! Try Again!\n", __FUNCTION__, __LINE__, (unsigned int)u32PidFltId, (unsigned int)stDrvState);
4837 _TSP_RETURN(DRVTSP_FAIL);
4838 }
4839
4840 _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] |= E_DRVTSP_FLT_STATE_FREEING;
4841 _TSP_GetSecRdyId(u32SecFltId, &u32Flag, OSAL_EVENT_OR_CLEAR);
4842 _TSP_GetSecOvfId(u32SecFltId, &u32Flag, OSAL_EVENT_OR_CLEAR);
4843 _TSP_SecBuf_Free(u32EngId, u32SecFltId);
4844 _TSP_SecFlt_Free(u32EngId, u32SecFltId, TRUE);
4845 _TSP_PidFlt_Free(u32EngId, u32PidFltId, TRUE);
4846
4847 _TSP_RETURN(DRVTSP_OK);
4848
4849 }
4850
4851 //_TSP_IND_LOCK();
4852 _TSP_RETURN(tRes);
4853 }
4854
4855
4856 //-------------------------------------------------------------------------------------------------
4857 /// Set PID to a PID filter
4858 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
4859 /// @param u32PidFltId \b IN: index of PID filter to be set
4860 /// @param u32PID \b IN: PID value
4861 /// @return TSP_Result
4862 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PidFlt_SetPid(MS_U32 u32EngId,MS_U32 u32PidFltId,MS_U16 u16PID)4863 TSP_Result MDrv_TSP_PidFlt_SetPid(MS_U32 u32EngId, MS_U32 u32PidFltId, MS_U16 u16PID)
4864 {
4865 _TSP_ENTRY();
4866 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
4867 TSP_ASSERT2(TSP_PIDFLT_NUM_ALL> u32PidFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFltId %u\n", __LINE__, (unsigned int)u32PidFltId));
4868 TSP_ASSERT2(E_DRVTSP_FLT_STATE_FREE!= _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId], TSP_DBG("[TSP_ERROR][%06d] Bad Flt state\n", __LINE__));
4869
4870 #ifdef HWPCR_ENABLE
4871 if(u32PidFltId >= TSP_PIDFLT_NUM)
4872 {
4873 HAL_TSP_PidFlt_SetHWPcrPid(u32PidFltId - TSP_PIDFLT_NUM, ((MS_U32)u16PID) & 0xFFFFUL);
4874 }
4875 else
4876 {
4877 #endif
4878 HAL_TSP_PidFlt_SetPid(u32EngId, u32PidFltId, ((MS_U32)u16PID) & 0xFFFFUL);
4879
4880 #ifdef DUP_PIDFLT
4881 if(_ptsp_res->_TspState[u32EngId].DupFlt[u32PidFltId] != 0xFFFFUL)
4882 {
4883 MS_U32 u32DupFlt = _ptsp_res->_TspState[u32EngId].DupFlt[u32PidFltId];
4884 HAL_TSP_PidFlt_SetPid(u32EngId, u32DupFlt, ((MS_U32)u16PID & 0xFFFFUL));
4885 //ULOGD("TSP", "[%s][%d] dup id %ld, pid %x\n", __FUNCTION__, __LINE__, u32DupFlt, u16PID);
4886 }
4887 #endif
4888
4889 #ifdef HWPCR_ENABLE
4890 }
4891 #endif
4892
4893 _TSP_RETURN(DRVTSP_OK);
4894 }
4895
4896 //-------------------------------------------------------------------------------------------------
4897 /// Set PID to a PID filter
4898 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
4899 /// @param u32PidFltId \b IN: index of PID filter to be set
4900 /// @param pu32PID \b OUT: the output PID
4901 /// @return TSP_Result
4902 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PidFlt_GetPid(MS_U32 u32EngId,MS_U32 u32PidFltId,MS_U32 * pu32PID)4903 TSP_Result MDrv_TSP_PidFlt_GetPid(MS_U32 u32EngId, MS_U32 u32PidFltId, MS_U32* pu32PID)
4904 {
4905 _TSP_ENTRY();
4906
4907 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
4908 TSP_ASSERT2(TSP_PIDFLT_NUM_ALL> u32PidFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFltId %u\n", __LINE__, (unsigned int)u32PidFltId));
4909 //TSP_ASSERT2(E_DRVTSP_FLT_STATE_FREE!= _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId], TSP_DBG("[TSP_ERROR][%06d] Bad Flt state\n", __LINE__));
4910
4911 #ifdef HWPCR_ENABLE
4912 if(u32PidFltId >= TSP_PIDFLT_NUM)
4913 {
4914 *pu32PID = HAL_TSP_PidFlt_GetHWPcrPid(u32PidFltId - TSP_PIDFLT_NUM);
4915 }
4916 else
4917 {
4918 #endif
4919 *pu32PID = HAL_TSP_PidFlt_GetPid(u32EngId, u32PidFltId);
4920
4921 #ifdef HWPCR_ENABLE
4922 }
4923 #endif
4924 _TSP_RETURN(DRVTSP_OK);
4925 }
4926
4927
4928 //-------------------------------------------------------------------------------------------------
4929 /// Select section filter of PID filter
4930 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
4931 /// @param u32PidFltId \b IN: index of PID filter\n
4932 /// @param u32SecFltId \b IN: index of section filter
4933 /// @return TSP_Result
4934 /// @note
4935 /// The PID filter and section filter pair is one-to-one mapping. User has to
4936 /// allocate other PID filters if user have more than one section filter for same
4937 /// PID packet.\n
4938 /// @sa MDrv_TSP_PidFlt_Alloc
4939 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PidFlt_SelSecFlt(MS_U32 u32EngId,MS_U32 u32PidFltId,MS_U32 u32SecFltId)4940 TSP_Result MDrv_TSP_PidFlt_SelSecFlt(MS_U32 u32EngId, MS_U32 u32PidFltId, MS_U32 u32SecFltId)
4941 {
4942 _TSP_ENTRY();
4943
4944 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
4945 TSP_ASSERT2(TSP_SECFLT_NUM> u32PidFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFltId %u\n", __LINE__, (unsigned int)u32PidFltId));
4946 TSP_ASSERT2(E_DRVTSP_FLT_STATE_FREE!= _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId], TSP_DBG("[TSP_ERROR][%06d] Bad Flt state\n", __LINE__));
4947 TSP_ASSERT2(TSP_SECFLT_NUM> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] SecFltId= %u\n", __LINE__, (unsigned int)u32SecFltId));
4948
4949 HAL_TSP_PidFlt_SelSecFlt(u32EngId, u32PidFltId, u32SecFltId);
4950 _ptsp_res->_TspState[u32EngId].FltMap[u32PidFltId] = u32SecFltId;
4951 _TSP_SecFlt_SetType(u32EngId, u32SecFltId, _ptsp_res->_TspState[u32EngId].FltType[u32PidFltId]);
4952
4953 #ifdef DUP_PIDFLT_API
4954 if(_ptsp_res->_TspState[u32EngId].DupFlt[u32PidFltId] != 0xFFFFUL)
4955 {
4956 MS_U32 u32DupFlt = _ptsp_res->_TspState[u32EngId].DupFlt[u32PidFltId];
4957
4958 HAL_TSP_PidFlt_SelSecFlt(u32EngId, u32DupFlt, u32SecFltId);
4959 _ptsp_res->_TspState[u32EngId].FltMap[u32DupFlt] = u32SecFltId;
4960 }
4961 #endif
4962
4963 _TSP_RETURN(DRVTSP_OK);
4964 }
4965
4966 //-------------------------------------------------------------------------------------------------
4967 /// Set PID filter input source directly
4968 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
4969 /// @param u32PidFltId \b IN: index of filter to be enable
4970 /// @param eFltSrc \b IN: Filter input source
4971 /// @return TSP_Result
4972 /// @note
4973 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PidFlt_SetInputSrc(MS_U32 u32EngId,MS_U32 u32PidFltId,DrvTSP_FltType eFltSrc)4974 TSP_Result MDrv_TSP_PidFlt_SetInputSrc(MS_U32 u32EngId, MS_U32 u32PidFltId, DrvTSP_FltType eFltSrc)
4975 {
4976 _TSP_ENTRY();
4977
4978 switch(eFltSrc & E_DRVTSP_FLT_SOURCE_TYPE_MASK)
4979 {
4980 case E_DRVTSP_FLT_SOURCE_TYPE_LIVE:
4981 HAL_TSP_PidFlt_SelFltSource(u32EngId, u32PidFltId, TSP_PIDFLT_IN_PIDFLT0);
4982 break;
4983 case E_DRVTSP_FLT_SOURCE_TYPE_FILE:
4984 HAL_TSP_PidFlt_SelFltSource(u32EngId, u32PidFltId, TSP_PIDFLT_IN_PIDFLT_FILE);
4985 break;
4986 case E_DRVTSP_FLT_SOURCE_TYPE_TS1:
4987 case E_DRVTSP_FLT_SOURCE_TYPE_FILE1:
4988 HAL_TSP_PidFlt_SelFltSource(u32EngId, u32PidFltId, TSP_PIDFLT_IN_PIDFLT1);
4989 break;
4990 case E_DRVTSP_FLT_SOURCE_TYPE_TS2:
4991 case E_DRVTSP_FLT_SOURCE_TYPE_FILE2:
4992 HAL_TSP_PidFlt_SelFltSource(u32EngId, u32PidFltId, TSP_PIDFLT_IN_PIDFLT2);
4993 break;
4994
4995 #ifdef TS3_IF_SUPPORT
4996 case E_DRVTSP_FLT_SOURCE_TYPE_TSCB:
4997 HAL_TSP_PidFlt_SelFltSource(u32EngId, u32PidFltId, TSP_PIDFLT_IN_PIDFLT_CB);
4998 break;
4999 #endif
5000
5001 default:
5002 _TSP_RETURN(DRVTSP_INVALID_PARAM);
5003
5004 }
5005
5006 #ifdef MERGE_STR_SUPPORT
5007 HAL_TSP_PidFlt_SetFltSrcStreamID(u32EngId, u32PidFltId, (eFltSrc & E_DRVTSP_FLT_SOURCEID_MASK) >> E_DRVTSP_FLT_SOURCEID_SHIFT);
5008 _ptsp_res->_TspState[u32EngId].FltSrcId[u32PidFltId] = (eFltSrc & 0x00000F00UL) >> E_DRVTSP_FLT_SOURCEID_SHIFT;
5009 #endif
5010
5011 _ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId] = eFltSrc;
5012
5013 _TSP_RETURN(DRVTSP_OK);
5014
5015 }
5016
5017
MDrv_TSP_PidFlt_SetFltRushPass(MS_U32 u32EngId,MS_U32 u32PidFltId,MS_U8 u8Enable)5018 TSP_Result MDrv_TSP_PidFlt_SetFltRushPass(MS_U32 u32EngId, MS_U32 u32PidFltId, MS_U8 u8Enable)
5019 {
5020 _TSP_ENTRY();
5021 TSP_ASSERT2(TSP_PIDFLT_NUM_ALL> u32PidFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFltId %u\n", __LINE__, (unsigned int)u32PidFltId));
5022 TSP_ASSERT2(E_DRVTSP_FLT_STATE_FREE!= _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId], TSP_DBG("[TSP_ERROR][%06d] Bad Flt state\n", __LINE__));
5023
5024 HAL_TSP_PidFlt_SetFltRushPass(u32EngId, u32PidFltId, u8Enable);
5025
5026 _TSP_RETURN(DRVTSP_OK);
5027 }
5028
5029 //-------------------------------------------------------------------------------------------------
5030 /// Enable PID filter
5031 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5032 /// @param u32PidFltId \b IN: index of filter to be enable
5033 /// @param bEnable \b IN: TRUE(enable), FALSE(disable)
5034 /// @return TSP_Result
5035 /// @note
5036 /// When PID filter enable, the section buffer pointer will be reset to buffer start address,
5037 /// overflow condition will be resolved if exist.
5038 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PidFlt_Enable(MS_U32 u32EngId,MS_U32 u32PidFltId,MS_BOOL bEnable)5039 TSP_Result MDrv_TSP_PidFlt_Enable(MS_U32 u32EngId, MS_U32 u32PidFltId, MS_BOOL bEnable)
5040 {
5041 MS_U32 u32AVSrc = 0;
5042
5043 #ifdef TSP_LIVE_AV_BLOCK_EN
5044 MS_BOOL bAVFIFO_BLK_Disable = FALSE;
5045 #else
5046 MS_BOOL bAVFIFO_BLK_Disable = TRUE;
5047 #endif
5048
5049 _TSP_STR_ENTRY();
5050
5051 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
5052 TSP_ASSERT2(TSP_PIDFLT_NUM_ALL> u32PidFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFltId %u\n", __LINE__, (unsigned int)u32PidFltId));
5053 TSP_ASSERT2(E_DRVTSP_FLT_STATE_FREE!= _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId], TSP_DBG("[TSP_ERROR][%06d] Bad Flt state\n", __LINE__));
5054
5055 if (!bEnable)
5056 {
5057 if (!HAS_FLAG(_ptsp_res->_TspState[u32EngId].FltState[u32PidFltId], E_DRVTSP_FLT_STATE_ENABLE))
5058 {
5059 // TSP_DBG("[TSP_WARNNING][%06d] disable an inactive PidFlt %d\n", __LINE__, u32PidFltId);
5060 _TSP_STR_RETURN(DRVTSP_OK);
5061 }
5062
5063 _TSP_PidFlt_Disable(u32EngId, u32PidFltId);
5064 _TSP_STR_RETURN(DRVTSP_OK);
5065 }
5066
5067 if (HAS_FLAG(_ptsp_res->_TspState[u32EngId].FltState[u32PidFltId], E_DRVTSP_FLT_STATE_ENABLE))
5068 {
5069 // TSP_DBG("[TSP_WARNNING][%06d] Enable an active PidFlt %d\n", __LINE__, u32PidFltId);
5070 _TSP_STR_RETURN(DRVTSP_OK);
5071 }
5072
5073 switch(_ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId])
5074 {
5075 case E_DRVTSP_FLT_SOURCE_TYPE_LIVE:
5076 u32AVSrc = E_DRVTSP_PKTSRC_DEMUX0;
5077 break;
5078 case E_DRVTSP_FLT_SOURCE_TYPE_FILE:
5079 u32AVSrc = E_DRVTSP_PKTSRC_DEMUXFILE;
5080 bAVFIFO_BLK_Disable = FALSE;
5081 break;
5082 case E_DRVTSP_FLT_SOURCE_TYPE_FILE1:
5083 u32AVSrc = E_DRVTSP_PKTSRC_DEMUX1;
5084 bAVFIFO_BLK_Disable = FALSE;
5085 break;
5086 case E_DRVTSP_FLT_SOURCE_TYPE_TS1:
5087 u32AVSrc = E_DRVTSP_PKTSRC_DEMUX1;
5088 break;
5089 case E_DRVTSP_FLT_SOURCE_TYPE_FILE2:
5090 u32AVSrc = E_DRVTSP_PKTSRC_DEMUX2;
5091 bAVFIFO_BLK_Disable = FALSE;
5092 break;
5093 case E_DRVTSP_FLT_SOURCE_TYPE_TS2:
5094 u32AVSrc = E_DRVTSP_PKTSRC_DEMUX2;
5095 break;
5096 default:
5097 break;
5098 }
5099
5100 if (E_DRVTSP_FLT_TYPE_PVR == _ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
5101 {
5102 HAL_TSP_PidFlt_SelFltOutput(u32EngId, u32PidFltId, TSP_PIDFLT_OUT_PVR1);
5103 }
5104 #if (TSP_PVR_IF_NUM >= 2)
5105 else if (E_DRVTSP_FLT_TYPE_PVR1 == _ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
5106 {
5107 HAL_TSP_PidFlt_SelFltOutput(u32EngId, u32PidFltId, TSP_PIDFLT_OUT_PVR2);
5108 }
5109 #endif
5110 #ifdef TS3_IF_SUPPORT
5111 else if (E_DRVTSP_FLT_TYPE_CB == _ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
5112 {
5113 HAL_TSP_PidFlt_SelFltOutput(u32EngId, u32PidFltId, TSP_PIDFLT_OUT_CB);
5114 }
5115 #endif
5116 else if (E_DRVTSP_FLT_TYPE_VIDEO == _ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
5117 {
5118 HAL_TSP_AVFIFO_Src_Select(TSP_FIFO_VD, u32AVSrc);
5119 HAL_TSP_AVFIFO_Block_Disable(TSP_FIFO_VD, bAVFIFO_BLK_Disable);
5120 HAL_TSP_PidFlt_SelFltOutput(u32EngId, u32PidFltId, TSP_PIDFLT_OUT_VFIFO);
5121 }
5122 else if (E_DRVTSP_FLT_TYPE_AUDIO == _ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
5123 {
5124 HAL_TSP_AVFIFO_Src_Select(TSP_FIFO_AU, u32AVSrc);
5125 HAL_TSP_AVFIFO_Block_Disable(TSP_FIFO_AU, bAVFIFO_BLK_Disable);
5126 HAL_TSP_PidFlt_SelFltOutput(u32EngId, u32PidFltId, TSP_PIDFLT_OUT_AFIFO);
5127 }
5128 else if (E_DRVTSP_FLT_TYPE_AUDIO2 == _ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
5129 {
5130 HAL_TSP_AVFIFO_Src_Select(TSP_FIFO_AUB, u32AVSrc);
5131 HAL_TSP_AVFIFO_Block_Disable(TSP_FIFO_AUB, bAVFIFO_BLK_Disable);
5132 HAL_TSP_PidFlt_SelFltOutput(u32EngId, u32PidFltId, TSP_PIDFLT_OUT_AFIFO2);
5133 }
5134 #if (TSP_AUDIO3_AUDIO4_SUPPORT == 1)
5135 else if (E_DRVTSP_FLT_TYPE_AUDIO3 == _ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
5136 {
5137 HAL_TSP_AVFIFO_Src_Select(TSP_FIFO_AUC, u32AVSrc);
5138 HAL_TSP_AVFIFO_Block_Disable(TSP_FIFO_AUC, bAVFIFO_BLK_Disable);
5139 HAL_TSP_PidFlt_SelFltOutput(u32EngId, u32PidFltId, TSP_PIDFLT_OUT_AFIFO3);
5140 }
5141 else if (E_DRVTSP_FLT_TYPE_AUDIO4 == _ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
5142 {
5143 HAL_TSP_AVFIFO_Src_Select(TSP_FIFO_AUD, u32AVSrc);
5144 HAL_TSP_AVFIFO_Block_Disable(TSP_FIFO_AUD, bAVFIFO_BLK_Disable);
5145 HAL_TSP_PidFlt_SelFltOutput(u32EngId, u32PidFltId, TSP_PIDFLT_OUT_AFIFO4);
5146 }
5147 #endif
5148 else if (E_DRVTSP_FLT_TYPE_VIDEO3D == _ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
5149 {
5150 HAL_TSP_AVFIFO_Src_Select(TSP_FIFO_V3D, u32AVSrc);
5151 HAL_TSP_AVFIFO_Block_Disable(TSP_FIFO_V3D, bAVFIFO_BLK_Disable);
5152 HAL_TSP_PidFlt_SelFltOutput(u32EngId, u32PidFltId, TSP_PIDFLT_OUT_VFIFO3D);
5153 }
5154 #ifdef HWPCR_ENABLE
5155 else if (E_DRVTSP_FLT_TYPE_PCR == _ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
5156 {
5157 MS_U32 u32Idx = u32PidFltId - TSP_PIDFLT_NUM;
5158
5159 HAL_TSP_HWPcr_SelSrc(u32Idx, u32AVSrc);
5160
5161 #ifdef MERGE_STR_SUPPORT
5162 HAL_TSP_HWPcr_SetSrcId(u32Idx, _ptsp_res->_TspState[u32EngId].FltSrcId[u32PidFltId]);
5163 #endif
5164
5165 #if (TSP_HWPCR_BY_HK == 1)
5166 _ptsp_res->TSPHwPcrParams._u8ResetPcr[u32Idx] = 3;
5167 _ptsp_res->TSPHwPcrParams._u32PrevStcBase[u32Idx] = 0;
5168 _ptsp_res->TSPHwPcrParams._u32PrevPllControl[u32Idx] = 0;
5169 #endif
5170
5171 HAL_TSP_HWPcr_Reset(u32Idx, TRUE);
5172 #if (TSP_HWPCR_BY_HK == 1)
5173 HAL_TSP_HWPcr_Reset(u32Idx, FALSE);
5174 HAL_TSP_HWPcr_Int_Enable(u32Idx, TRUE);
5175 _TSP_SetHwPcrNotifyId(u32Idx);
5176 #endif
5177
5178 HAL_TSP_PidFlt_HWPcrFlt_Enable(u32Idx, TRUE);
5179 _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId]|= E_DRVTSP_FLT_STATE_ENABLE;
5180
5181 _TSP_STR_RETURN(DRVTSP_OK);
5182 }
5183 #endif
5184 else
5185 {
5186 MS_U32 u32SecFltId;
5187
5188 TSP_ASSERT2(TSP_SECFLT_NUM> u32PidFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFltId %u\n", __LINE__, (unsigned int)u32PidFltId));
5189
5190 //u32SecFltId = HAL_TSP_PidFlt_GetSecFlt(u32EngId, u32PidFltId);
5191 u32SecFltId = _ptsp_res->_TspState[0].FltMap[u32PidFltId];
5192 TSP_ASSERT2(TSP_SECFLT_NUM> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] SecFltId= %u\n", __LINE__, (unsigned int)u32SecFltId));
5193
5194 // reset ver/crc check
5195 #ifndef DUP_PIDFLT
5196 if (_ptsp_res->_TspState[u32EngId].FltType[u32PidFltId] == E_DRVTSP_FLT_TYPE_SECTION_VER)
5197 #else
5198 if (_ptsp_res->_TspState[u32EngId].FltType[u32PidFltId] & E_DRVTSP_FLT_TYPE_SECTION_MASK)
5199 #endif
5200 {
5201 HAL_TSP_SecFlt_VerReset(u32SecFltId);
5202 }
5203
5204 switch (_ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
5205 {
5206 case E_DRVTSP_FLT_TYPE_SECTION:
5207 case E_DRVTSP_FLT_TYPE_PES:
5208 case E_DRVTSP_FLT_TYPE_PACKET:
5209 case E_DRVTSP_FLT_TYPE_TELETEXT:
5210 case E_DRVTSP_FLT_TYPE_SECTION_VER:
5211 case E_DRVTSP_FLT_TYPE_SECTION_NO_PUSI:
5212 //TSP_ASSERT2(TSP_SECBUF_NUM> u32SecBufId, TSP_DBG("[TSP_ERROR][%06d] SecBufId= %ld\n", __LINE__, u32SecBufId));
5213 HAL_TSP_SecBuf_ResetBuffer(u32EngId, u32SecFltId);
5214 HAL_TSP_SecFlt_ResetState(u32EngId, u32SecFltId);
5215 HAL_TSP_SecFlt_SetRmnCount(u32EngId, u32SecFltId, 0);
5216 //HAL_TSP_Reset_SecDisCont_PktCount(u32PidFltId);
5217 HAL_TSP_PidFlt_SelFltOutput(u32EngId, u32PidFltId, TSP_PIDFLT_OUT_SECFLT);
5218 break;
5219 case E_DRVTSP_FLT_TYPE_EMM:
5220 case E_DRVTSP_FLT_TYPE_ECM:
5221 HAL_TSP_SecFlt_ResetState(u32EngId, u32SecFltId);
5222 HAL_TSP_SecFlt_SetRmnCount(u32EngId, u32SecFltId, 0);
5223 HAL_TSP_SecBuf_ResetBuffer(u32EngId, u32SecFltId);
5224 //HAL_TSP_Reset_SecDisCont_PktCount(u32PidFltId);
5225 HAL_TSP_PidFlt_SelFltOutput(u32EngId, u32PidFltId, TSP_PIDFLT_OUT_SECFLT);
5226 break;
5227 case E_DRVTSP_FLT_TYPE_PCR:
5228 HAL_TSP_SecFlt_PcrReset(u32EngId, u32SecFltId);
5229 HAL_TSP_PidFlt_SelFltOutput(u32EngId, u32PidFltId, TSP_PIDFLT_OUT_SECFLT_AF);
5230 break;
5231 default:
5232 break;
5233 }
5234 }
5235
5236
5237 #ifdef MERGE_STR_SUPPORT
5238 HAL_TSP_PidFlt_SetFltSrcStreamID(u32EngId, u32PidFltId, _ptsp_res->_TspState[u32EngId].FltSrcId[u32PidFltId]);
5239 #endif
5240
5241 switch(_ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId])
5242 {
5243 case E_DRVTSP_FLT_SOURCE_TYPE_LIVE:
5244 HAL_TSP_PidFlt_SelFltSource(u32EngId, u32PidFltId, TSP_PIDFLT_IN_PIDFLT0);
5245 break;
5246 case E_DRVTSP_FLT_SOURCE_TYPE_FILE:
5247 HAL_TSP_PidFlt_SelFltSource(u32EngId, u32PidFltId, TSP_PIDFLT_IN_PIDFLT_FILE);
5248 break;
5249 case E_DRVTSP_FLT_SOURCE_TYPE_TS1:
5250 case E_DRVTSP_FLT_SOURCE_TYPE_FILE1:
5251 HAL_TSP_PidFlt_SelFltSource(u32EngId, u32PidFltId, TSP_PIDFLT_IN_PIDFLT1);
5252 break;
5253 case E_DRVTSP_FLT_SOURCE_TYPE_TS2:
5254 case E_DRVTSP_FLT_SOURCE_TYPE_FILE2:
5255 HAL_TSP_PidFlt_SelFltSource(u32EngId, u32PidFltId, TSP_PIDFLT_IN_PIDFLT2);
5256 break;
5257 #ifdef TS3_IF_SUPPORT
5258 case E_DRVTSP_FLT_SOURCE_TYPE_TSCB:
5259 HAL_TSP_PidFlt_SelFltSource(u32EngId, u32PidFltId, TSP_PIDFLT_IN_PIDFLT_CB);
5260 break;
5261 #endif
5262 default:
5263 break;
5264 }
5265
5266 _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId]|= E_DRVTSP_FLT_STATE_ENABLE;
5267
5268 #ifdef DUP_PIDFLT
5269 if(_ptsp_res->_TspState[u32EngId].DupFlt[u32PidFltId] != 0xFFFFUL)
5270 {
5271 MS_U32 u32DupFlt = _ptsp_res->_TspState[u32EngId].DupFlt[u32PidFltId];
5272
5273 HAL_TSP_PidFlt_SelFltOutput(u32EngId, u32DupFlt, TSP_PIDFLT_OUT_SECFLT);
5274 switch(_ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId])
5275 {
5276 case E_DRVTSP_FLT_SOURCE_TYPE_LIVE:
5277 HAL_TSP_PidFlt_SelFltSource(u32EngId, u32DupFlt, TSP_PIDFLT_IN_PIDFLT0);
5278 break;
5279 case E_DRVTSP_FLT_SOURCE_TYPE_FILE:
5280 HAL_TSP_PidFlt_SelFltSource(u32EngId, u32DupFlt, TSP_PIDFLT_IN_PIDFLT_FILE);
5281 break;
5282 case E_DRVTSP_FLT_SOURCE_TYPE_TS1:
5283 case E_DRVTSP_FLT_SOURCE_TYPE_FILE1:
5284 HAL_TSP_PidFlt_SelFltSource(u32EngId, u32DupFlt, TSP_PIDFLT_IN_PIDFLT1);
5285 break;
5286 case E_DRVTSP_FLT_SOURCE_TYPE_TS2:
5287 case E_DRVTSP_FLT_SOURCE_TYPE_FILE2:
5288 HAL_TSP_PidFlt_SelFltSource(u32EngId, u32DupFlt, TSP_PIDFLT_IN_PIDFLT2);
5289 break;
5290 case E_DRVTSP_FLT_SOURCE_TYPE_TSCB:
5291 HAL_TSP_PidFlt_SelFltSource(u32EngId, u32DupFlt, TSP_PIDFLT_IN_PIDFLT_CB);
5292 break;
5293 default:
5294 break;
5295 }
5296 _ptsp_res->_TspState[u32EngId].FltState[u32DupFlt]|= E_DRVTSP_FLT_STATE_ENABLE;
5297
5298 //ULOGD("TSP", "[%s][%d] dup id %u\n", __FUNCTION__, __LINE__, u32DupFlt);
5299 }
5300 #endif
5301
5302 _TSP_STR_RETURN(DRVTSP_OK);
5303 }
5304
5305 //-------------------------------------------------------------------------------------------------
5306 /// Get current PID filter status
5307 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5308 /// @param u32PidFltId \b IN: index of PID filter
5309 /// @param peState \b OUT: current ORed state flag of PID filter\n
5310 /// E_DRVTSP_FLT_STATE_ALLOC\n
5311 /// E_DRVTSP_FLT_STATE_ENABLE\n
5312 /// E_DRVTSP_FLT_STATE_SCRAMBLED ([VENUS]: TS level scramble status)
5313 /// @return TSP_Result
5314 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PidFlt_GetState(MS_U32 u32EngId,MS_U32 u32PidFltId,DrvTSP_FltState * peState)5315 TSP_Result MDrv_TSP_PidFlt_GetState(MS_U32 u32EngId, MS_U32 u32PidFltId, DrvTSP_FltState *peState)
5316 {
5317 _TSP_ENTRY();
5318 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
5319 TSP_ASSERT2(TSP_PIDFLT_NUM_ALL> u32PidFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFltId %u\n", __LINE__, (unsigned int)u32PidFltId));
5320 if (_TSP_PidFlt_StateGet(u32EngId, u32PidFltId, peState))
5321 {
5322 _TSP_RETURN(DRVTSP_OK);
5323 }
5324 else
5325 {
5326 _TSP_RETURN(DRVTSP_FAIL);
5327 }
5328 }
5329
5330 //-------------------------------------------------------------------------------------------------
5331 /// Check current PID filter owner
5332 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5333 /// @param u32PidFltId \b IN: index of PID filter
5334 /// @return TSP_Result
5335 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PidFlt_ChkOwner(MS_U32 u32EngId,MS_U32 u32PidFltId)5336 TSP_Result MDrv_TSP_PidFlt_ChkOwner(MS_U32 u32EngId, MS_U32 u32PidFltId)
5337 {
5338 _TSP_ENTRY();
5339
5340 if (_ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] == E_DRVTSP_FLT_STATE_NA)
5341 {
5342 _TSP_RETURN(DRVTSP_FAIL);
5343 }
5344
5345 _TSP_RETURN(DRVTSP_OK);
5346 }
5347
5348 //-------------------------------------------------------------------------------------------------
5349 /// Change PID filter source
5350 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5351 /// @param eFilterType \b IN: index of filter to be enable
5352 /// @param bEnable \b IN: New filter source type & filter source Id to change
5353 /// @return TSP_Result
5354 /// @note
5355 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PidFlt_ChangeSource(MS_U32 u32EngId,MS_U32 u32PidFltId,DrvTSP_FltType eFilterType)5356 TSP_Result MDrv_TSP_PidFlt_ChangeSource(MS_U32 u32EngId, MS_U32 u32PidFltId, DrvTSP_FltType eFilterType)
5357 {
5358 DrvTSP_FltType eFltSrc = eFilterType&E_DRVTSP_FLT_SOURCE_TYPE_MASK;
5359
5360 _TSP_ENTRY();
5361
5362 if (eFltSrc == E_DRVTSP_FLT_SOURCE_TYPE_LIVE)
5363 {
5364 _ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId] = E_DRVTSP_FLT_SOURCE_TYPE_LIVE;
5365 }
5366 else if (eFltSrc == E_DRVTSP_FLT_SOURCE_TYPE_FILE)
5367 {
5368 _ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId] = E_DRVTSP_FLT_SOURCE_TYPE_FILE;
5369 }
5370 else if (eFltSrc == E_DRVTSP_FLT_SOURCE_TYPE_TS1)
5371 {
5372 _ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId] = E_DRVTSP_FLT_SOURCE_TYPE_TS1;
5373 }
5374 else if (eFltSrc == E_DRVTSP_FLT_SOURCE_TYPE_TS2)
5375 {
5376 _ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId] = E_DRVTSP_FLT_SOURCE_TYPE_TS2;
5377 }
5378 else if (eFltSrc == E_DRVTSP_FLT_SOURCE_TYPE_TSCB)
5379 {
5380 _ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId] = E_DRVTSP_FLT_SOURCE_TYPE_TSCB;
5381 }
5382 else if (eFltSrc == E_DRVTSP_FLT_SOURCE_TYPE_FILE1)
5383 {
5384 _ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId] = E_DRVTSP_FLT_SOURCE_TYPE_FILE1;
5385 }
5386 else if (eFltSrc == E_DRVTSP_FLT_SOURCE_TYPE_FILE2)
5387 {
5388 _ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId] = E_DRVTSP_FLT_SOURCE_TYPE_FILE2;
5389 }
5390
5391 #ifdef MERGE_STR_SUPPORT
5392 _ptsp_res->_TspState[u32EngId].FltSrcId[u32PidFltId] = (eFilterType & E_DRVTSP_FLT_SOURCEID_MASK) >> E_DRVTSP_FLT_SOURCEID_SHIFT;
5393 #endif
5394
5395 _TSP_RETURN(DRVTSP_OK);
5396 }
5397
5398 //-------------------------------------------------------------------------------------------------
5399 /// Get PID filter scramble status
5400 /// @param FltSrc \b IN : Filter source
5401 /// @param u32FltGroupId \b IN : Pid filter group id, every 32 filter for 1 group. 0: filter 0~31, 1: 32~63, 2: 64~95, 3: 96~127
5402 /// @param PidFltId \b IN : Pid filter id for getting. If 0xFFFFFFFF, means getting the status of all filters of the same group
5403 /// @param pu32ScmbSts \b OUT : The scrmabling status of pid filter. If getting all group status, every bit means one status of every filter
5404 /// If only checking one filter, 1 means scrambled status and 0 means non-scrambled status
5405 /// @return TSP_Result
5406 /// @note
5407 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PidFlt_GetScmbSts(DrvTSP_FltType FltSrc,MS_U32 u32FltGroupId,MS_U32 PidFltId,MS_U32 * pu32ScmbSts)5408 TSP_Result MDrv_TSP_PidFlt_GetScmbSts(DrvTSP_FltType FltSrc, MS_U32 u32FltGroupId, MS_U32 PidFltId, MS_U32 *pu32ScmbSts)
5409 {
5410 MS_U32 u32Src = 0;
5411
5412 _TSP_ENTRY();
5413
5414 *pu32ScmbSts = 0;
5415
5416 switch(FltSrc & E_DRVTSP_FLT_SOURCE_TYPE_MASK)
5417 {
5418 case E_DRVTSP_FLT_SOURCE_TYPE_LIVE:
5419 u32Src = 0;
5420 break;
5421 case E_DRVTSP_FLT_SOURCE_TYPE_FILE:
5422 u32Src = 1;
5423 break;
5424 case E_DRVTSP_FLT_SOURCE_TYPE_TS1:
5425 case E_DRVTSP_FLT_SOURCE_TYPE_FILE1:
5426 u32Src = 2;
5427 break;
5428 case E_DRVTSP_FLT_SOURCE_TYPE_TS2:
5429 case E_DRVTSP_FLT_SOURCE_TYPE_FILE2:
5430 u32Src = 3;
5431 break;
5432 default:
5433 _TSP_RETURN(DRVTSP_INVALID_PARAM);
5434 }
5435
5436 *pu32ScmbSts = HAL_TSP_Scmb_Status(u32Src, u32FltGroupId, PidFltId);
5437
5438 _TSP_RETURN(DRVTSP_OK);
5439 }
5440
5441 // SecFlt API
5442 //-------------------------------------------------------------------------------------------------
5443 /// Allocate a section filter of a PID filter
5444 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5445 /// @param pu32SecFltId \b OUT: pointer of section filter id return
5446 /// @return TSP_Result
5447 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SecFlt_Alloc(MS_U32 u32EngId,MS_U32 * pu32SecFltId)5448 TSP_Result MDrv_TSP_SecFlt_Alloc(MS_U32 u32EngId, MS_U32 *pu32SecFltId)
5449 {
5450 MS_U32 u32SecBufId;
5451
5452 _TSP_ENTRY();
5453
5454 TSP_ASSERT2(TSP_ENGINE_NUM > u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
5455 TSP_ASSERT2(pu32SecFltId, TSP_DBG("[TSP_ERROR][%06d] NULL pointer\n", __LINE__));
5456
5457 if (FALSE== _TSP_SecFlt_Alloc(u32EngId, E_DRVTSP_FLT_TYPE_SECTION, pu32SecFltId))
5458 {
5459 TSP_ASSERT2(0, TSP_DBG("[TSP_ERROR][%06d] Allocate section filter fail\n", __LINE__));
5460 }
5461 TSP_ASSERT2(TSP_SECFLT_NUM > *pu32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %u\n", __LINE__, (unsigned int)(*pu32SecFltId)));
5462 u32SecBufId = *pu32SecFltId;
5463
5464 #ifdef MSOS_TYPE_LINUX_KERNEL
5465 MS_U32 u32ii;
5466
5467 for(u32ii = 0; u32ii < DRVTSP_MAX_PROCESS_NUM; u32ii++)
5468 {
5469 if(_u32KPrcEvtTblUseFlag & (1 << u32ii))
5470 {
5471 if(_stKModePrcEvtTbl[u32ii].tgid == current->tgid)
5472 {
5473 _ptsp_res->_TspState[u32EngId].s32TspEvtId[u32SecBufId] = _stKModePrcEvtTbl[u32ii].s32TspEvtId;
5474 break;
5475 }
5476 }
5477 }
5478 #else
5479 _ptsp_res->_TspState[u32EngId].s32TspEvtId[u32SecBufId] = _s32TspEventId;
5480 #endif
5481
5482 //printf("[%s][%d] u32SecBufId %d , s32TspEvtId %x\n", __FUNCTION__, __LINE__, (int)u32SecBufId, (int) _ptsp_res->_TspState[u32EngId].s32TspEvtId[u32SecBufId]);
5483
5484 if (FALSE == _TSP_SecBuf_Alloc(u32EngId, &u32SecBufId))
5485 {
5486 TSP_ASSERT2(0, TSP_DBG("[TSP_ERROR][%06d] Allocate section buffer fail\n", __LINE__));
5487 }
5488 TSP_ASSERT2(TSP_SECBUF_NUM > u32SecBufId, TSP_DBG("[TSP_ERROR][%06d] Bad SecBufId %u\n", __LINE__, (unsigned int)u32SecBufId));
5489 TSP_ASSERT2(u32SecBufId == *pu32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFltId/SecFltId alignment\n", __LINE__));
5490 _TSP_SecBuf_Init(u32EngId, u32SecBufId);
5491 HAL_TSP_SecFlt_SelSecBuf(0, *pu32SecFltId, u32SecBufId, TRUE);
5492 _TSP_RETURN(DRVTSP_OK);
5493 }
5494
5495 //-------------------------------------------------------------------------------------------------
5496 /// Free a section filter of a PID filter
5497 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5498 /// @param u32SecFltId \b IN: section filter of TSP to be free
5499 /// @return TSP_Result
5500 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SecFlt_Free(MS_U32 u32EngId,MS_U32 u32SecFltId)5501 TSP_Result MDrv_TSP_SecFlt_Free(MS_U32 u32EngId, MS_U32 u32SecFltId)
5502 {
5503 _TSP_ENTRY();
5504
5505 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
5506 TSP_ASSERT2(TSP_SECFLT_NUM> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %u\n", __LINE__, (unsigned int)u32SecFltId));
5507 TSP_ASSERT2(E_DRVTSP_FLT_STATE_FREE!= _ptsp_res->_TspState[u32EngId].SecFltState[u32SecFltId],
5508 TSP_DBG("[TSP_ERROR][%06d] Bad SecFlt state\n", __LINE__));
5509
5510 _TSP_SecBuf_Free(u32EngId, u32SecFltId);
5511 _TSP_SecFlt_Free(u32EngId, u32SecFltId, TRUE);
5512
5513 _TSP_RETURN(DRVTSP_OK);
5514 }
5515
5516 //-------------------------------------------------------------------------------------------------
5517 //[Reserved]
5518 // Set section filtering mode
5519 // @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5520 // @param u32SecFltId \b IN: section filter of TSP to be free
5521 // @param eSecFltMode \b IN: continue/one-shot mode of section filter
5522 // @return TSP_Result
5523 // @attention
5524 // One-shot filter has the disadvantage of interrupt lost becuase it stops filter, a timeout
5525 // to check filter status is better for usage.
5526 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SecFlt_SetMode(MS_U32 u32EngId,MS_U32 u32SecFltId,DrvTSP_FltMode eSecFltMode)5527 TSP_Result MDrv_TSP_SecFlt_SetMode(MS_U32 u32EngId, MS_U32 u32SecFltId, DrvTSP_FltMode eSecFltMode)
5528 {
5529 MS_U32 uMode = 0;
5530
5531 _TSP_ENTRY();
5532
5533 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
5534 TSP_ASSERT2(TSP_SECFLT_NUM> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %u\n", __LINE__, (unsigned int)u32SecFltId));
5535
5536 if (eSecFltMode & E_DRVTSP_FLT_MODE_ONESHOT)
5537 {
5538 uMode |= TSP_SECFLT_MODE_ONESHOT;
5539 }
5540
5541 if (eSecFltMode & E_DRVTSP_FLT_MODE_CRCCHK)
5542 {
5543 uMode |= TSP_SECFLT_MODE_CRCCHK;
5544 }
5545
5546 _ptsp_res->_TspState[u32EngId].SecFltMode[u32SecFltId] = eSecFltMode;
5547
5548 HAL_TSP_SecFlt_SetMode(u32EngId, u32SecFltId, uMode);
5549
5550 #ifdef DUP_PIDFLT //only duplicate one-shot mode section filter
5551 if((eSecFltMode & E_DRVTSP_FLT_MODE_ONESHOT) == 0)
5552 {
5553 MS_U32 u32ii, u32OrgPidFlt = u32SecFltId;
5554
5555 //Suggest original pid filter id = section filter id
5556 if(_ptsp_res->_TspState[u32EngId].FltMap[u32SecFltId] != u32SecFltId)
5557 {
5558 for(u32OrgPidFlt = 0; u32OrgPidFlt < TSP_PIDFLT_NUM; u32OrgPidFlt++)
5559 {
5560 if(_ptsp_res->_TspState[u32EngId].FltMap[u32OrgPidFlt] == u32SecFltId)
5561 {
5562 break;
5563 }
5564 }
5565 if(u32OrgPidFlt == TSP_PIDFLT_NUM)
5566 {
5567 ULOGD("TSP", "[%s][%d] No mapping Pid filter\n", __FUNCTION__, __LINE__);
5568 _TSP_RETURN(DRVTSP_OK);
5569 }
5570 }
5571
5572 for(u32ii = (DSCMB2_FLT_END_ID + 1); u32ii < DSCMB_FLT_SHAREKEY_START_ID; u32ii++)
5573 {
5574 if(_ptsp_res->_TspState[u32EngId].FltState[u32ii] == E_DRVTSP_FLT_STATE_NA)
5575 {
5576 MS_U32 u32OrgPid = HAL_TSP_PidFlt_GetPid(u32EngId, u32OrgPidFlt);
5577
5578 _TSP_PidFlt_Init(u32EngId, u32ii);
5579 HAL_TSP_PidFlt_SelSecFlt(u32EngId, u32ii, u32SecFltId);
5580 _ptsp_res->_TspState[u32EngId].FltMap[u32ii] = u32SecFltId;
5581 if(u32OrgPid != DRVTSP_PID_NULL)
5582 {
5583 HAL_TSP_PidFlt_SetPid(u32EngId, u32ii, u32OrgPid);
5584 }
5585 _ptsp_res->_TspState[u32EngId].DupFlt[u32OrgPidFlt] = u32ii;
5586 _ptsp_res->_TspState[u32EngId].FltState[u32ii] = E_DRVTSP_FLT_STATE_ALLOC;
5587 _ptsp_res->_TspState[u32EngId].FltType[u32ii] = _ptsp_res->_TspState[u32EngId].FltType[u32OrgPidFlt];
5588 _ptsp_res->_TspState[u32EngId].FltSource[u32ii] = _ptsp_res->_TspState[u32EngId].FltSource[u32OrgPidFlt];
5589 _ptsp_res->_TspState[u32EngId].FltMap[u32ii] = u32SecFltId;
5590 //ULOGD("TSP", "[%s] duplcate id %ld %ld, pid %lx\n", __FUNCTION__, u32OrgPidFlt, u32ii, u32OrgPid);
5591 break;
5592 }
5593 }
5594 }
5595 #endif
5596
5597 _TSP_RETURN(DRVTSP_OK);
5598 }
5599
5600
5601 //-------------------------------------------------------------------------------------------------
5602 /// Set Match/Mask filter pattern of section filter
5603 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5604 /// @param u32SecFltId \b IN: index of filter to be set pattern
5605 /// @param pu8Match \b IN: pointer of filter pattern (in @ref DRVTSP_FILTER_DEPTH bytes)
5606 /// @param pu8Mask \b IN: pointer of pattern bitmask (in @ref DRVTSP_FILTER_DEPTH bytes)
5607 /// @param bNotMatch \b IN: negative the result of comparion of filter
5608 /// @return TSP_Result
5609 /// note: match mask -- must set 0 to be compare (customer request)
5610 /// not match mask -- must set 1 to compare
5611 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SecFlt_SetPattern(MS_U32 u32EngId,MS_U32 u32SecFltId,MS_U8 * pu8Match,MS_U8 * pu8Mask,MS_U8 * pu8NotMask)5612 TSP_Result MDrv_TSP_SecFlt_SetPattern(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_U8 *pu8Match, MS_U8 *pu8Mask, MS_U8 *pu8NotMask)
5613 {
5614 if(pu8Match == NULL || pu8Mask == NULL || pu8NotMask == NULL)
5615 {
5616 return (DRVTSP_INVALID_PARAM);
5617 }
5618
5619 _TSP_ENTRY();
5620
5621 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
5622 TSP_ASSERT2(TSP_SECFLT_NUM> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %u\n", __LINE__, (unsigned int)u32SecFltId));
5623
5624 MS_U8 i = 0;
5625 for (i = 0 ; i < 16 ; i++)
5626 {
5627 *(pu8Mask+i) = 0xFF^(*(pu8Mask+i));
5628 }
5629
5630 HAL_TSP_SecFlt_SetMask(u32EngId, u32SecFltId, pu8Mask);
5631 HAL_TSP_SecFlt_SetMatch(u32EngId, u32SecFltId, pu8Match);
5632 HAL_TSP_SecFlt_SetNMask(u32EngId, u32SecFltId, pu8NotMask);
5633 _TSP_RETURN(DRVTSP_OK);
5634 }
5635
5636 #ifdef CONFIG_UTOPIA_PROC_DBG_SUPPORT
5637 //-------------------------------------------------------------------------------------------------
5638 /// Get Match/Mask filter pattern of section filter
5639 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5640 /// @param u32SecFltId \b IN: index of filter to be set pattern
5641 /// @param pu8Match \b IN: pointer of filter pattern (in @ref DRVTSP_FILTER_DEPTH bytes)
5642 /// @param pu8Mask \b IN: pointer of pattern bitmask (in @ref DRVTSP_FILTER_DEPTH bytes)
5643 /// @param bNotMatch \b IN: negative the result of comparion of filter
5644 /// @return TSP_Result
5645 /// note: match mask -- must set 0 to be compare (customer request)
5646 /// not match mask -- must set 1 to compare
5647 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SecFlt_GetPattern(MS_U32 u32EngId,MS_U32 u32SecFltId,MS_U8 * pu8Match,MS_U8 * pu8Mask,MS_U8 * pu8NotMask)5648 TSP_Result MDrv_TSP_SecFlt_GetPattern(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_U8 *pu8Match, MS_U8 *pu8Mask, MS_U8 *pu8NotMask)
5649 {
5650 if(pu8Match == NULL || pu8Mask == NULL || pu8NotMask == NULL)
5651 {
5652 return (DRVTSP_INVALID_PARAM);
5653 }
5654
5655 _TSP_ENTRY();
5656
5657 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
5658 TSP_ASSERT2(TSP_SECFLT_NUM> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %u\n", __LINE__, (unsigned int)u32SecFltId));
5659
5660 HAL_TSP_SecFlt_GetMask(u32EngId, u32SecFltId, pu8Mask);
5661 HAL_TSP_SecFlt_GetMatch(u32EngId, u32SecFltId, pu8Match);
5662
5663 MS_U8 i = 0;
5664 for (i = 0 ; i < 16 ; i++)
5665 {
5666 *(pu8Mask+i) = 0xFF^(*(pu8Mask+i));
5667 }
5668
5669 _TSP_RETURN(DRVTSP_OK);
5670 }
5671 #endif
5672
5673 //-------------------------------------------------------------------------------------------------
5674 /// Reset the section buffer read/write pointer to start address and resolve overflow condition
5675 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5676 /// @param u32SecFltId \b IN: index of section buffer to be reset
5677 /// @return TSP_Result
5678 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SecFlt_ResetBuffer(MS_U32 u32EngId,MS_U32 u32SecFltId)5679 TSP_Result MDrv_TSP_SecFlt_ResetBuffer(MS_U32 u32EngId, MS_U32 u32SecFltId)
5680 {
5681 _TSP_ENTRY();
5682 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
5683 TSP_ASSERT2(TSP_SECFLT_NUM> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %u\n", __LINE__, (unsigned int)u32SecFltId));
5684
5685 // Richard: Be careful since it works based the assumption that SecFltId is equal to SecBufId
5686 HAL_TSP_SecBuf_ResetBuffer(u32EngId, u32SecFltId);
5687 HAL_TSP_SecFlt_ResetState(u32EngId, u32SecFltId);
5688 HAL_TSP_SecFlt_ResetEmmIdx(u32EngId, u32SecFltId);
5689 _TSP_RETURN(DRVTSP_OK);
5690 }
5691
5692 //-------------------------------------------------------------------------------------------------
5693 /// Set buffer start address and buffer size to section buffer
5694 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5695 /// @param u32SecFltId \b IN: index of section buffer to be set
5696 /// @param u32StartAddr \b IN: start address of section buffer
5697 /// @param u32BufSize \b IN: size of section buffer
5698 /// @return TSP_Result
5699 /// @note
5700 /// Buffer start address and buffer size should be 128-bit (16-byte) aligned.\n
5701 /// @sa MDrv_TSP_PidFlt_Alloc
5702 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SecFlt_SetBuffer(MS_U32 u32EngId,MS_U32 u32SecFltId,MS_PHY phyStartAddr,MS_U32 u32BufSize)5703 TSP_Result MDrv_TSP_SecFlt_SetBuffer(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_PHY phyStartAddr, MS_U32 u32BufSize)
5704 {
5705 _TSP_ENTRY();
5706
5707 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
5708 TSP_ASSERT2(TSP_SECFLT_NUM> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %u\n", __LINE__, (unsigned int)u32SecFltId));
5709 HAL_TSP_SecBuf_SetBuffer(u32EngId, u32SecFltId, phyStartAddr, u32BufSize);
5710 _TSP_RETURN(DRVTSP_OK);
5711 }
5712
5713 //-------------------------------------------------------------------------------------------------
5714 /// Set request data size to trigger interrupt
5715 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5716 /// @param u32SecFltId \b IN: index of section buffer to be set
5717 /// @param u32ReqCount \b IN: received data size to trigger interrupt
5718 /// @return TSP_Result
5719 /// @note
5720 /// TSP always calls section callback function when a completed section data is
5721 /// ready at section buffer.
5722 /// It can set a request value other than 0 and TSP will also notify user when
5723 /// request size of data is ready at buffer. Only support @ref E_DRVTSP_FLT_TYPE_PES.
5724 /// @sa MDrv_TSP_SecFlt_Notify
5725 /// @attention
5726 /// The maximum request count is 0xFFFF
5727 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SecFlt_SetReqCount(MS_U32 u32EngId,MS_U32 u32SecFltId,MS_U32 u32ReqCount)5728 TSP_Result MDrv_TSP_SecFlt_SetReqCount(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_U32 u32ReqCount)
5729 {
5730 _TSP_ENTRY();
5731
5732 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
5733 TSP_ASSERT2(TSP_SECFLT_NUM> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %u\n", __LINE__, (unsigned int)u32SecFltId));
5734 HAL_TSP_SecFlt_SetReqCount(u32EngId, u32SecFltId, u32ReqCount);
5735 _TSP_RETURN(DRVTSP_OK);
5736 }
5737
5738 //-------------------------------------------------------------------------------------------------
5739 /// Set ECM index
5740 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5741 /// @param u32SecFltId \b IN: index of section buffer
5742 /// @param u32EcmIdx \b IN: Index of ECM
5743 /// @return TSP_Result
5744 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SecFlt_SetEcmIdx(MS_U32 u32EngId,MS_U32 u32SecFltId,MS_U32 u32EcmIdx)5745 TSP_Result MDrv_TSP_SecFlt_SetEcmIdx(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_U32 u32EcmIdx)
5746 {
5747 _TSP_ENTRY();
5748
5749 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
5750 TSP_ASSERT2(TSP_SECFLT_NUM> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %u\n", __LINE__, (unsigned int)u32SecFltId));
5751 HAL_TSP_SecFlt_SetEcmIdx(u32EngId, u32SecFltId, u32EcmIdx);
5752 _TSP_RETURN(DRVTSP_OK);
5753 }
5754
5755 //-------------------------------------------------------------------------------------------------
5756 /// Get buffer start address of setction buffer
5757 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5758 /// @param u32SecFltId \b IN: index of section buffer
5759 /// @param pu32BufStart \b OUT: pointer of buffer start address return
5760 /// @return TSP_Result
5761 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SecFlt_GetBufStart(MS_U32 u32EngId,MS_U32 u32SecFltId,MS_PHY * pphyBufStart)5762 TSP_Result MDrv_TSP_SecFlt_GetBufStart(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_PHY *pphyBufStart)
5763 {
5764 _TSP_ENTRY();
5765
5766 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
5767 TSP_ASSERT2(TSP_SECFLT_NUM> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %u\n", __LINE__, (unsigned int)u32SecFltId));
5768 TSP_ASSERT2(pphyBufStart, TSP_DBG("[TSP_ERROR][%06d] NULL pointer\n", __LINE__));
5769
5770 if (E_DRVTSP_FLT_STATE_FREE == _ptsp_res->_TspState[u32EngId].SecFltState[u32SecFltId])
5771 {
5772 _TSP_RETURN(DRVTSP_FAIL);
5773 }
5774 *pphyBufStart = (MS_PHY)HAL_TSP_SecBuf_GetBufStart(u32EngId, u32SecFltId) & 0xFFFFFFFFUL;
5775 _TSP_RETURN(DRVTSP_OK);
5776 }
5777
5778 //-------------------------------------------------------------------------------------------------
5779 /// Get buffer size of section buffer
5780 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5781 /// @param u32SecFltId \b IN: index of section buffer
5782 /// @param pu32BufSize \b OUT: pointer of buffer size return
5783 /// @return TSP_Result
5784 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SecFlt_GetBufSize(MS_U32 u32EngId,MS_U32 u32SecFltId,MS_U32 * pu32BufSize)5785 TSP_Result MDrv_TSP_SecFlt_GetBufSize(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_U32 *pu32BufSize)
5786 {
5787 _TSP_ENTRY();
5788
5789 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
5790 TSP_ASSERT2(TSP_SECFLT_NUM> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %u\n", __LINE__, (unsigned int)u32SecFltId));
5791 TSP_ASSERT2(pu32BufSize, TSP_DBG("[TSP_ERROR][%06d] NULL pointer\n", __LINE__));
5792
5793 *pu32BufSize = 0;
5794 if (E_DRVTSP_FLT_STATE_FREE == _ptsp_res->_TspState[u32EngId].SecFltState[u32SecFltId])
5795 {
5796 _TSP_RETURN(DRVTSP_FAIL);
5797 }
5798 *pu32BufSize= (MS_U32)(HAL_TSP_SecBuf_GetBufEnd(u32EngId, u32SecFltId)-
5799 HAL_TSP_SecBuf_GetBufStart(u32EngId, u32SecFltId));
5800 _TSP_RETURN(DRVTSP_OK);
5801 }
5802
5803 //-------------------------------------------------------------------------------------------------
5804 /// Get current read address of section buffer
5805 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5806 /// @param u32SecFltId \b IN: index of section buffer
5807 /// @param pphyReadAddr \b OUT: pointer of address return
5808 /// @return TSP_Result
5809 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SecFlt_GetReadAddr(MS_U32 u32EngId,MS_U32 u32SecFltId,MS_PHY * pphyReadAddr)5810 TSP_Result MDrv_TSP_SecFlt_GetReadAddr(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_PHY *pphyReadAddr)
5811 {
5812 _TSP_ENTRY();
5813
5814 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
5815 TSP_ASSERT2(TSP_SECFLT_NUM> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %u\n", __LINE__, (unsigned int)u32SecFltId));
5816 TSP_ASSERT2(pphyReadAddr, TSP_DBG("[TSP_ERROR][%06d] NULL pointer\n", __LINE__));
5817
5818 if (E_DRVTSP_FLT_STATE_FREE == _ptsp_res->_TspState[u32EngId].SecFltState[u32SecFltId])
5819 {
5820 _TSP_RETURN(DRVTSP_FAIL);
5821 }
5822
5823 // move write point to read point while E_DRVTSP_FLT_MODE_AUTO_ADDR mode
5824 if (_ptsp_res->_TspState[u32EngId].SecFltMode[u32SecFltId]&E_DRVTSP_FLT_MODE_AUTO_ADDR)
5825 {
5826 HAL_TSP_SecBuf_SetBufRead(u32EngId, u32SecFltId, HAL_TSP_SecBuf_GetBufWrite(u32EngId, u32SecFltId));
5827 }
5828 *pphyReadAddr= HAL_TSP_SecBuf_GetBufRead(u32EngId, u32SecFltId);
5829 _TSP_RETURN(DRVTSP_OK);
5830 }
5831
5832 //-------------------------------------------------------------------------------------------------
5833 /// Get current section data write address of section buffer
5834 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5835 /// @param u32SecFltId \b IN: index of section buffer
5836 /// @param pphyWriteAddr \b OUT: pointer of address return
5837 /// @return TSP_Result
5838 /// @note
5839 /// User can get current write address to know where is the end of section data
5840 /// received in the section buffer.
5841 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SecFlt_GetWriteAddr(MS_U32 u32EngId,MS_U32 u32SecFltId,MS_PHY * pphyWriteAddr)5842 TSP_Result MDrv_TSP_SecFlt_GetWriteAddr(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_PHY *pphyWriteAddr)
5843 {
5844 _TSP_ENTRY();
5845
5846 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
5847 TSP_ASSERT2(TSP_SECFLT_NUM> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %u\n", __LINE__, (unsigned int)u32SecFltId));
5848 TSP_ASSERT2(pphyWriteAddr, TSP_DBG("[TSP_ERROR][%06d] NULL pointer\n", __LINE__));
5849
5850 if (E_DRVTSP_FLT_STATE_FREE == _ptsp_res->_TspState[u32EngId].SecFltState[u32SecFltId])
5851 {
5852 _TSP_RETURN(DRVTSP_FAIL);
5853 }
5854
5855 // move write point to read point while E_DRVTSP_FLT_MODE_AUTO_ADDR mode
5856 if (_ptsp_res->_TspState[u32EngId].SecFltMode[u32SecFltId]&E_DRVTSP_FLT_MODE_AUTO_ADDR)
5857 {
5858 HAL_TSP_SecBuf_SetBufRead(u32EngId, u32SecFltId, HAL_TSP_SecBuf_GetBufWrite(u32EngId, u32SecFltId));
5859 }
5860 *pphyWriteAddr= HAL_TSP_SecBuf_GetBufWrite(u32EngId, u32SecFltId);
5861 _TSP_RETURN(DRVTSP_OK);
5862 }
5863
5864 //-------------------------------------------------------------------------------------------------
5865 /// Set current read address of section buffer
5866 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5867 /// @param u32SecFltId \b IN: index of section buffer
5868 /// @param phyReadAddr \b IN: address of read pointer
5869 /// @return TSP_Result
5870 /// @note
5871 /// User can update the read address to notify TSP where is the end of section
5872 /// data already read back by user.
5873 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SecFlt_SetReadAddr(MS_U32 u32EngId,MS_U32 u32SecFltId,MS_PHY phyReadAddr)5874 TSP_Result MDrv_TSP_SecFlt_SetReadAddr(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_PHY phyReadAddr)
5875 {
5876 _TSP_ENTRY();
5877 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
5878 TSP_ASSERT2(TSP_SECFLT_NUM> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %u\n", __LINE__, (unsigned int)u32SecFltId));
5879
5880 if (E_DRVTSP_FLT_STATE_FREE == _ptsp_res->_TspState[u32EngId].SecFltState[u32SecFltId])
5881 {
5882 _TSP_RETURN(DRVTSP_FAIL);
5883 }
5884 HAL_TSP_SecBuf_SetBufRead(u32EngId, u32SecFltId, phyReadAddr);
5885 _TSP_RETURN(DRVTSP_OK);
5886 }
5887
5888 //-------------------------------------------------------------------------------------------------
5889 /// Subscribe event notification callback function for specified section filter
5890 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5891 /// @param u32SecFltId \b IN: index of section buffer
5892 /// @param eEvents \b IN: events need to be subscribed\n
5893 /// @ref E_DRVTSP_EVENT_DATA_READY\n
5894 /// @ref E_DRVTSP_EVENT_BUF_OVERFLOW
5895 /// @param pfCallback \b IN: callback function (NULL to disable)
5896 /// @return TSP_Result
5897 /// @note
5898 /// This function register a callback function for a section filter to TSP.
5899 /// TSP calls callback function each time when data is ready in section buffer.\n
5900 /// Data ready of section filter:\n
5901 /// @ref E_DRVTSP_FLT_TYPE_SECTION : a section ready\n
5902 /// @ref E_DRVTSP_FLT_TYPE_PES : PES packet ready or received data over than request size.
5903 /// @sa MDrv_TSP_SecFlt_SetReqCount
5904 /// @attention
5905 /// Callback function resides in OS TSP interrupt context, it recommends
5906 /// that callback function should not take too much time to block the system.
5907 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SecFlt_Notify(MS_U32 u32EngId,MS_U32 u32SecFltId,DrvTSP_Event eEvents,P_DrvTSP_EvtCallback pfCallback)5908 TSP_Result MDrv_TSP_SecFlt_Notify(MS_U32 u32EngId, MS_U32 u32SecFltId, DrvTSP_Event eEvents, P_DrvTSP_EvtCallback pfCallback)
5909 {
5910 _TSP_ENTRY();
5911
5912 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
5913 TSP_ASSERT2(TSP_SECFLT_NUM> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %u\n", __LINE__, (unsigned int)u32SecFltId));
5914
5915 if ((eEvents & (E_DRVTSP_EVENT_DATA_READY | E_DRVTSP_EVENT_BUF_OVERFLOW | E_DRVTSP_EVENT_SEC_CRCERR)) == 0)
5916 {
5917 _TSP_RETURN(DRVTSP_FAIL);
5918 }
5919
5920 _ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecFltId] = eEvents;
5921 _ptsp_res->_TspState[u32EngId].SecFltCallback[u32SecFltId] = pfCallback;
5922
5923 _TSP_RETURN(DRVTSP_OK);
5924 }
5925
5926 //-------------------------------------------------------------------------------------------------
5927 //[Reserved]
5928 // Get current section filter status
5929 // @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5930 // @param u32SecFltId \b IN: index of section filter
5931 // @param peState \b OUT: current ORed state flag of section filter
5932 // E_DRVTSP_FLT_STATE_ALLOC\n
5933 // E_DRVTSP_FLT_STATE_ENABLE\n
5934 // E_DRVTSP_FLT_STATE_OVERFLOW
5935 // @return TSP_Result
5936 // @note
5937 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SecFlt_GetState(MS_U32 u32EngId,MS_U32 u32SecFltId,DrvTSP_FltState * peState)5938 TSP_Result MDrv_TSP_SecFlt_GetState(MS_U32 u32EngId, MS_U32 u32SecFltId, DrvTSP_FltState *peState)
5939 {
5940 _TSP_ENTRY();
5941
5942 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
5943 TSP_ASSERT2(TSP_SECFLT_NUM> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %u\n", __LINE__, (unsigned int)u32SecFltId));
5944 TSP_ASSERT2(peState, TSP_DBG("[TSP_ERROR][%06d] NULL pointer\n", __LINE__));
5945
5946 if (_TSP_SecFlt_StateGet(u32EngId, u32SecFltId, peState))
5947 {
5948 _TSP_RETURN(DRVTSP_OK);
5949 }
5950 else
5951 {
5952 _TSP_RETURN(DRVTSP_FAIL);
5953 }
5954 }
5955
MDrv_TSP_TTX_SecFlt_GetWriteAddr(MS_U32 u32EngId,MS_U32 u32SecFltId,MS_PHY * pphyWriteAddr)5956 TSP_Result MDrv_TSP_TTX_SecFlt_GetWriteAddr(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_PHY *pphyWriteAddr)
5957 {
5958 TSP_ASSERT(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %u\n", __LINE__, (unsigned int)u32EngId));
5959 TSP_ASSERT(TSP_SECFLT_NUM> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %u\n", __LINE__, (unsigned int)u32SecFltId));
5960 TSP_ASSERT(pphyWriteAddr, TSP_DBG("[TSP_ERROR][%06d] NULL pointer\n", __LINE__));
5961 // move write point to read point while E_DRVTSP_FLT_MODE_AUTO_ADDR mode
5962
5963 if (_ptsp_res->_TspState[u32EngId].SecFltMode[u32SecFltId]&E_DRVTSP_FLT_MODE_AUTO_ADDR)
5964 {
5965 HAL_TSP_SecBuf_SetBufRead_tmp(u32EngId, u32SecFltId, HAL_TSP_SecBuf_GetBufWrite_tmp(u32EngId, u32SecFltId));
5966 }
5967 *pphyWriteAddr= HAL_TSP_SecBuf_GetBufWrite_tmp(u32EngId, u32SecFltId);
5968 return DRVTSP_OK;
5969 }
5970
5971 // PVR API
5972 // Channel Browser API
5973 //-------------------------------------------------------------------------------------------------
5974 /// Set Channel Browser record buffer start addresses and buffer size
5975 /// @param u8PVRId \b IN:PVR ID
5976 /// @param phyBufStart0 \b IN: start address of PVR buffer 0
5977 /// @param phyBufStart1 \b IN: start address of PVR buffer 1
5978 /// @param u32BufSize0 \b IN: size of PVR buffer 0
5979 /// @param u32BufSize1 \b IN: size of PVR buffer 1
5980 /// @return TSP_Result
5981 /// @note: PVR1 only has single buffer
5982 /// Buffer start address and size should be 128-bit (16-byte) aligned\n
5983 /// The maximum support size is 0xFFFF0 (1048560 bytes).
5984 /// @sa MDrv_TSP_PVR_Notify
5985 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PVR_Eng_SetBuffer(MS_U8 u8PVRId,MS_PHY phyBufStart0,MS_PHY phyBufStart1,MS_U32 u32BufSize0,MS_U32 u32BufSize1)5986 TSP_Result MDrv_TSP_PVR_Eng_SetBuffer(MS_U8 u8PVRId, MS_PHY phyBufStart0, MS_PHY phyBufStart1, MS_U32 u32BufSize0, MS_U32 u32BufSize1)
5987 {
5988 TSP_ASSERT(u8PVRId < ((MS_U8)TSP_PVR_IF_NUM), TSP_DBG("[TSP_ERROR][%06d] Bad PVR Engine ID\n", __LINE__));
5989
5990 _TSP_ENTRY();
5991 HAL_TSP_PVR_SetBuffer(u8PVRId, phyBufStart0, phyBufStart1, u32BufSize0, u32BufSize1);
5992 _TSP_RETURN(DRVTSP_OK);
5993
5994 }
5995
5996 //-------------------------------------------------------------------------------------------------
5997 /// Set Channel Browser record mode and START/STOP recording.
5998 /// @param u8PVRId \b IN:PVR ID
5999 /// @param eRecMode \b IN: mode of recording
6000 /// @param bStart \b IN: TRUE(START), FALSE(STOP)
6001 /// @return TSP_Result
6002 /// @note
6003 /// Parameter eRecMode will be ignored when bStart is FALSE(STOP)\n
6004 /// @note
6005 /// It's a synchronous function. When STOP, it flushs internal record fifo
6006 /// and update current PVR record buffer write address before function return.\n
6007 /// User can call MDrv_TSP_PVR1_GetWriteAddr to get the final valid data address
6008 /// after recording.
6009 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PVR_Eng_Start(MS_U8 u8PVRId,DrvTSP_RecMode eRecMode,MS_BOOL bStart)6010 TSP_Result MDrv_TSP_PVR_Eng_Start(MS_U8 u8PVRId, DrvTSP_RecMode eRecMode, MS_BOOL bStart)
6011 {
6012 TSP_ASSERT(u8PVRId < ((MS_U8)TSP_PVR_IF_NUM), TSP_DBG("[TSP_ERROR][%06d] Bad PVR Engine ID\n", __LINE__));
6013 _TSP_ENTRY();
6014
6015 if (bStart)
6016 {
6017 HAL_TSP_PVR_All(u8PVRId, (HAS_FLAG(eRecMode, 0x02UL))? TRUE: FALSE, (HAS_FLAG(eRecMode, 0x02UL))? TRUE: FALSE, TRUE);
6018
6019 HAL_TSP_PVR_Enable(u8PVRId, TRUE);
6020 }
6021 else
6022 {
6023 HAL_TSP_PVR_Enable(u8PVRId, FALSE);
6024 HAL_TSP_PVR_WaitFlush(u8PVRId);
6025 }
6026
6027 _TSP_RETURN(DRVTSP_OK);
6028 }
6029
6030 //-------------------------------------------------------------------------------------------------
6031 /// Get final write address of Channel Browser record buffer
6032 /// @param u8PVRId \b IN:PVR ID
6033 /// @param pphy2WriteAddr \b OUT: pointer of address return
6034 /// @return TSP_Result
6035 /// @note
6036 /// User can get current write address to know where is the end of section data
6037 /// received in the section buffer.
6038 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PVR_Eng_GetWriteAddr(MS_U8 u8PVRId,MS_PHY * pphy2WriteAddr)6039 TSP_Result MDrv_TSP_PVR_Eng_GetWriteAddr(MS_U8 u8PVRId, MS_PHY *pphy2WriteAddr)
6040 {
6041 TSP_ASSERT(u8PVRId < ((MS_U8)TSP_PVR_IF_NUM), TSP_DBG("[TSP_ERROR][%06d] Bad PVR Engine ID\n", __LINE__));
6042 _TSP_ENTRY();
6043 *pphy2WriteAddr = HAL_TSP_PVR_GetBufWrite(u8PVRId);
6044 _TSP_RETURN(DRVTSP_OK);
6045 }
6046
6047 //-------------------------------------------------------------------------------------------------
6048 /// Subscribe event notification callback function for Channel Browser record buffer
6049 /// @param u8PVRId \b IN:PVR ID
6050 /// @param eEvents \b IN: events need to be subscribed\n
6051 /// @ref E_DRVTSP_EVENT_CBBUF_FULL
6052 /// @param pfCallback \b IN: callback function (NULL to disable)
6053 /// @return TSP_Result
6054 /// @note
6055 /// TSP Channel Browser recording uses single buffer mechanism. This function register a callback
6056 /// function for recording. TSP calls callback function each time when one of
6057 /// single buffer is full and ring to buffer start to record.\n
6058 /// @ref E_DRVTSP_FLT_TYPE_CB
6059 /// @attention
6060 /// Callback function resides in OS TSP interrupt context, it recommends
6061 /// that callback function should not take too much time to block the system.
6062 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PVR_Eng_Notify(MS_U8 u8PVRId,DrvTSP_Event eEvents,P_DrvTSP_EvtCallback pfCallback)6063 TSP_Result MDrv_TSP_PVR_Eng_Notify(MS_U8 u8PVRId, DrvTSP_Event eEvents, P_DrvTSP_EvtCallback pfCallback)
6064 {
6065 if(u8PVRId >= TSP_PVR_IF_NUM)
6066 return DRVTSP_FAIL;
6067
6068 _TSP_ENTRY();
6069
6070 if (pfCallback)
6071 {
6072 switch(u8PVRId)
6073 {
6074 case 0:
6075 HAL_TSP_Int_Enable(TSP_HWINT_HW_PVR1_MASK);
6076 break;
6077 case 1:
6078 HAL_TSP_Int2_Enable(TSP_HWINT_HW_PVR2_MASK);
6079 break;
6080 #if (TSP_PVR_IF_NUM > 2)
6081 case 2:
6082 HAL_TSP_Int2_Enable(TSP_HWINT_HW_PVRCB_MASK);
6083 break;
6084 #endif
6085 default:
6086 _TSP_RETURN(DRVTSP_FAIL);
6087 }
6088 _TSP_SetPvrNotifyId(u8PVRId);
6089 }
6090 else
6091 {
6092 switch(u8PVRId)
6093 {
6094 case 0:
6095 HAL_TSP_Int_Disable(TSP_HWINT_HW_PVR1_MASK);
6096 break;
6097 case 1:
6098 HAL_TSP_Int2_Disable(TSP_HWINT_HW_PVR2_MASK);
6099 break;
6100 #if (TSP_PVR_IF_NUM > 2)
6101 case 2:
6102 HAL_TSP_Int2_Disable(TSP_HWINT_HW_PVRCB_MASK);
6103 break;
6104 #endif
6105 default:
6106 _TSP_RETURN(DRVTSP_FAIL);
6107 }
6108 _TSP_RemovePvrNotifyId(u8PVRId);
6109 }
6110
6111 _ptsp_res->_PvrEvtNotify[u8PVRId] = eEvents;
6112 _ptsp_res->_PvrCallback[u8PVRId] = pfCallback;
6113
6114 #ifdef MSOS_TYPE_LINUX_KERNEL
6115 MS_U32 u32ii;
6116
6117 for(u32ii = 0; u32ii < DRVTSP_MAX_PROCESS_NUM; u32ii++)
6118 {
6119 if(_u32KPrcEvtTblUseFlag & (1 << u32ii))
6120 {
6121 if(_stKModePrcEvtTbl[u32ii].tgid == current->tgid)
6122 {
6123 _ptsp_res->_s32PvrEvtId[u8PVRId] = _stKModePrcEvtTbl[u32ii].s32TspEvtId;
6124 break;
6125 }
6126 }
6127 }
6128 #else
6129 _ptsp_res->_s32PvrEvtId[u8PVRId] = _s32TspEventId;
6130 #endif
6131
6132 _TSP_RETURN(DRVTSP_OK);
6133
6134 }
6135
MDrv_TSP_PVR_Eng_SetPacketMode(MS_U8 u8PVRId,MS_BOOL bSet)6136 TSP_Result MDrv_TSP_PVR_Eng_SetPacketMode(MS_U8 u8PVRId, MS_BOOL bSet)
6137 {
6138 TSP_ASSERT(u8PVRId < TSP_PVR_IF_NUM, TSP_DBG("[TSP_ERROR][%06d] Bad PVR Engine ID\n", __LINE__));
6139 _TSP_ENTRY();
6140 HAL_TSP_PVR_PacketMode(u8PVRId, bSet);
6141 _TSP_RETURN(DRVTSP_OK);
6142 }
6143
6144 //-------------------------------------------------------------------------------------------------
6145 /// Select PVR source
6146 /// @param u8PVRId \b IN:PVR ID
6147 /// @param ePktSrc \b IN: PVR packet demux source type
6148 /// @return TSP_Result
6149 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PVR_Eng_SelSrc(MS_U8 u8PVRId,DrvTSP_PKTDMXSrcType ePktSrc)6150 TSP_Result MDrv_TSP_PVR_Eng_SelSrc(MS_U8 u8PVRId, DrvTSP_PKTDMXSrcType ePktSrc)
6151 {
6152 _TSP_ENTRY();
6153 HAL_TSP_PVR_Src_Select(u8PVRId, (MS_U32)ePktSrc);
6154 _TSP_RETURN(DRVTSP_OK);
6155 }
6156
6157 //-------------------------------------------------------------------------------------------------
6158 /// Enable/Disable PVR FIFO block mode
6159 /// @param u8PVRId \b IN:PVR ID
6160 /// @param ePktSrc \b IN: PVR packet demux source type
6161 /// @return TSP_Result
6162 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PVR_BlockEnable(MS_U8 u8PVRId,MS_BOOL bEnable)6163 TSP_Result MDrv_TSP_PVR_BlockEnable(MS_U8 u8PVRId, MS_BOOL bEnable)
6164 {
6165 _TSP_ENTRY();
6166 HAL_TSP_PVR_Fifo_Block_Disable(u8PVRId, !bEnable);
6167 _TSP_RETURN(DRVTSP_OK);
6168 }
6169
6170 //-------------------------------------------------------------------------------------------------
6171 /// Channel Browser time stamp set
6172 /// @param u8PVRId \b IN:PVR ID
6173 /// @param u32Stamp \b IN: Channel Browser time stamp
6174 /// @return TSP_Result
6175 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PVR_Eng_TimeStampSetRecordStamp(MS_U8 u8PVRId,MS_U32 u32Stamp)6176 TSP_Result MDrv_TSP_PVR_Eng_TimeStampSetRecordStamp(MS_U8 u8PVRId, MS_U32 u32Stamp)
6177 {
6178 _TSP_ENTRY();
6179 HAL_TSP_SetPVRTimeStamp(u8PVRId, u32Stamp);
6180 _TSP_RETURN(DRVTSP_OK);
6181 }
6182
6183 //-------------------------------------------------------------------------------------------------
6184 /// Channel Browser time stamp get
6185 /// @param u8PVRId \b IN:PVR ID
6186 /// @param pu32Stamp \b OUT: pointer of Channel Browser time stamp
6187 /// @return TSP_Result
6188 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PVR_Eng_TimeStampGetRecordStamp(MS_U8 u8PVRId,MS_U32 * u32Stamp)6189 TSP_Result MDrv_TSP_PVR_Eng_TimeStampGetRecordStamp(MS_U8 u8PVRId, MS_U32* u32Stamp)
6190 {
6191 _TSP_ENTRY();
6192 *u32Stamp = HAL_TSP_GetPVRTimeStamp(u8PVRId);
6193 _TSP_RETURN(DRVTSP_OK);
6194 }
6195
6196 //-------------------------------------------------------------------------------------------------
6197 /// Playback time stamp Set
6198 /// @param pu32Stamp \b IN: Playback time stamp
6199 /// @return TSP_Result
6200 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PVR_TimeStampSetPlaybackStamp(MS_U32 u32Stamp)6201 TSP_Result MDrv_TSP_PVR_TimeStampSetPlaybackStamp(MS_U32 u32Stamp)
6202 {
6203 _TSP_ENTRY();
6204 HAL_TSP_SetPlayBackTimeStamp(u32Stamp);
6205 _TSP_RETURN(DRVTSP_OK);
6206 }
6207
6208 //-------------------------------------------------------------------------------------------------
6209 /// Playback time stamp get
6210 /// @param pu32Stamp \b OUT: pointer of Playback time stamp
6211 /// @return TSP_Result
6212 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PVR_TimeStampGetPlaybackStamp(MS_U32 * u32Stamp)6213 TSP_Result MDrv_TSP_PVR_TimeStampGetPlaybackStamp(MS_U32* u32Stamp)
6214 {
6215 _TSP_ENTRY();
6216 * u32Stamp = HAL_TSP_GetPlayBackTimeStamp();
6217 _TSP_RETURN(DRVTSP_OK);
6218 }
6219
6220 //-------------------------------------------------------------------------------------------------
6221 /// PVR time stamp Enable/Disable
6222 /// @param pu32Stamp \b IN: Enable/Disable time stamp
6223 /// @return TSP_Result
6224 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PVR_TimeStamp(MS_BOOL bEnable)6225 TSP_Result MDrv_TSP_PVR_TimeStamp(MS_BOOL bEnable)
6226 {
6227 _TSP_ENTRY();
6228 if (bEnable)
6229 {
6230 HAL_TSP_FileIn_Set(TRUE);
6231 //HAL_TSP_ResetTimeStamp();
6232 }
6233 else
6234 {
6235 HAL_TSP_FileIn_Set(FALSE);
6236 }
6237 _TSP_RETURN(DRVTSP_OK);
6238 }
6239
6240 //-------------------------------------------------------------------------------------------------
6241 /// Playback time stamp clock set
6242 /// @param u8EngId \b IN:playback ID
6243 /// @param eClk \b IN: clock source type
6244 /// @return TSP_Result
6245 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PVR_Eng_SetPlaybackStampClk(MS_U32 u32EngId,MS_U32 u32Clk)6246 TSP_Result MDrv_TSP_PVR_Eng_SetPlaybackStampClk(MS_U32 u32EngId, MS_U32 u32Clk)
6247 {
6248 HAL_TSP_SetPlayBackTimeStampClk(u32EngId, u32Clk);
6249 return DRVTSP_OK;
6250 }
6251
6252 //-------------------------------------------------------------------------------------------------
6253 /// PVR time stamp clock set
6254 /// @param u8PvrId \b IN:PVR ID
6255 /// @param eClk \b IN: clock source type
6256 /// @return TSP_Result
6257 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PVR_Eng_SetRecordStampClk(MS_U32 u32PvrId,MS_U32 u32Clk)6258 TSP_Result MDrv_TSP_PVR_Eng_SetRecordStampClk(MS_U32 u32PvrId, MS_U32 u32Clk)
6259 {
6260 HAL_TSP_SetPVRTimeStampClk(u32PvrId, u32Clk);
6261 return DRVTSP_OK;
6262 }
6263
6264 //-------------------------------------------------------------------------------------------------
6265 /// Check if PVR Engine is started
6266 /// @param u8PvrId \b IN:PVR ID
6267 /// @param pbIsStart \b OUT: Pointer to store started status
6268 /// @return TSP_Result
6269 //-------------------------------------------------------------------------------------------------
MDrv_TSP_PVR_Eng_IsStart(MS_U32 u32PvrId,MS_BOOL * pbIsStart)6270 TSP_Result MDrv_TSP_PVR_Eng_IsStart(MS_U32 u32PvrId, MS_BOOL *pbIsStart)
6271 {
6272 if(pbIsStart == NULL)
6273 return DRVTSP_FAIL;
6274
6275 *pbIsStart = HAL_TSP_PVR_IsEnabled(u32PvrId);
6276
6277 return DRVTSP_OK;
6278 }
6279
6280 //--- PVRCA API
6281 // if the same PID is allocated, set record flag directly
MDrv_TSP_PVRCA_Close(MS_U8 u8PVRId)6282 TSP_Result MDrv_TSP_PVRCA_Close(MS_U8 u8PVRId)
6283 {
6284 return (DRVTSP_OK);
6285 }
6286
6287 // File API
6288 //-------------------------------------------------------------------------------------------------
6289 /// Memory to TSP stream control : Stream start address
6290 /// @param u32StreamAddr \b IN: pointer of transport stream in memory
6291 /// @return TSP_Result
6292 //-------------------------------------------------------------------------------------------------
MDrv_TSP_File_SetAddr(MS_PHY phyStreamAddr)6293 TSP_Result MDrv_TSP_File_SetAddr(MS_PHY phyStreamAddr)
6294 {
6295 _TSP_ENTRY();
6296 HAL_TSP_CmdQ_TsDma_SetAddr(phyStreamAddr);
6297 _TSP_RETURN(DRVTSP_OK);
6298 }
6299
6300 //-------------------------------------------------------------------------------------------------
6301 /// Memory to TSP stream control : Stream data size
6302 /// @param u32StreamSize \b IN: size of transport stream data to be copied
6303 /// @return TSP_Result
6304 // @note u32StreamSize must be larger than 16
6305 //-------------------------------------------------------------------------------------------------
MDrv_TSP_File_SetSize(MS_U32 u32StreamSize)6306 TSP_Result MDrv_TSP_File_SetSize(MS_U32 u32StreamSize)
6307 {
6308 if(u32StreamSize <= 16)
6309 {
6310 return DRVTSP_FAIL;
6311 }
6312
6313 _TSP_ENTRY();
6314 if (HAL_TSP_CmdQ_TsDma_SetSize(u32StreamSize))
6315 {
6316 _TSP_RETURN(DRVTSP_OK);
6317 }
6318 else
6319 {
6320 _TSP_RETURN(DRVTSP_FAIL);
6321 }
6322 }
6323
6324 //-------------------------------------------------------------------------------------------------
6325 //[Reserved]
6326 // Memory to TSP stream command : Update Stream STC
6327 // @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
6328 // @param u32STC_32 \b IN: STC[32] for next input stream
6329 // @param u32STC \b IN: STC[31:0] for next input stream
6330 // @return TSP_Result
6331 // @note M2T Command Size: 3
6332 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SetSTC(MS_U32 u32EngId,MS_U32 u32STC_32,MS_U32 u32STC)6333 TSP_Result MDrv_TSP_SetSTC(MS_U32 u32EngId, MS_U32 u32STC_32, MS_U32 u32STC)
6334 {
6335 _TSP_ENTRY();
6336
6337 //[HW TODO][HW LIMIT]
6338 // STC register mapping is different between MCU and CPU.
6339 HAL_TSP_SetSTC(u32EngId, u32STC, u32STC_32);
6340 _TSP_RETURN(DRVTSP_OK);
6341 }
6342
6343 //-------------------------------------------------------------------------------------------------
6344 /// Memory to TSP stream control : Start stream input
6345 /// @param eM2tMode \b IN: input source control of filein
6346 /// @return TSP_Result
6347 /// @note Filein Command Size: 1
6348 /// @sa MDrv_TSP_GetM2tSlot
6349 //-------------------------------------------------------------------------------------------------
MDrv_TSP_File_Start(DrvTSP_FileinMode eFileinMode)6350 TSP_Result MDrv_TSP_File_Start(DrvTSP_FileinMode eFileinMode)
6351 {
6352 _TSP_ENTRY();
6353 // @FIXME: Good to assume enum and register definition identical?
6354 //if (E_DRVTSP_FILEIN_MODE_ENG0_TS != eFileinMode)
6355 {
6356 HAL_TSP_PS_Path_Enable((MS_U32)eFileinMode);
6357 }
6358 HAL_TSP_CmdQ_TsDma_Start((MS_U32)eFileinMode);
6359
6360 HAL_TSP_filein_enable(TRUE); //enable cmdQ after cmds are set
6361
6362 _TSP_RETURN(DRVTSP_OK);
6363 }
6364
6365 //-------------------------------------------------------------------------------------------------
6366 /// Memory to TSP stream control : Stop stream input
6367 /// @return TSP_Result
6368 //-------------------------------------------------------------------------------------------------
MDrv_TSP_File_Stop(void)6369 TSP_Result MDrv_TSP_File_Stop(void)
6370 {
6371 MS_U8 u8ii;
6372 MS_U8 u8ScmSrcTsif;
6373 MS_U32 u32ScmDest;
6374
6375 _TSP_ENTRY();
6376
6377 HAL_TSP_filein_enable(FALSE);
6378
6379 HAL_TSP_PS_Path_Disable();
6380
6381 for(u8ii = 0; u8ii < ((MS_U8)TSP_CA_ENGINE_NUM); u8ii++)
6382 {
6383 HAL_TSP_CSA_Get_CACtrl(u8ii, &u8ScmSrcTsif, &u32ScmDest);
6384
6385 if(u32ScmDest & TSP_PKTDMX0_FILE)
6386 {
6387 HAL_TSP_CSA_Set_CACtrl(u8ii, TSP_SRC_FROM_PKTDMX0, TSP_PKTDMX0_LIVE);
6388 break;
6389 }
6390 if(u8ScmSrcTsif & TSP_SRC_FROM_PKTDMX0)
6391 {
6392 HAL_TSP_CSA_Set_CACtrl(u8ii, u8ScmSrcTsif, u32ScmDest|TSP_PKTDMX0_LIVE);
6393 break;
6394 }
6395 }
6396
6397 HAL_TSP_filein_enable(FALSE);
6398
6399 _TSP_RETURN(DRVTSP_OK);
6400 }
6401
6402 //-------------------------------------------------------------------------------------------------
6403 /// Memory to TSP stream control : pause stream input
6404 /// @return TSP_Result
6405 //-------------------------------------------------------------------------------------------------
MDrv_TSP_File_Pause(void)6406 TSP_Result MDrv_TSP_File_Pause(void)
6407 {
6408 _TSP_ENTRY();
6409 HAL_TSP_TsDma_Pause();
6410 _TSP_RETURN(DRVTSP_OK);
6411
6412 }
6413
6414 //-------------------------------------------------------------------------------------------------
6415 /// Memory to TSP stream control : resume stream input
6416 /// @return TSP_Result
6417 //-------------------------------------------------------------------------------------------------
MDrv_TSP_File_Resume(void)6418 TSP_Result MDrv_TSP_File_Resume(void)
6419 {
6420
6421 _TSP_ENTRY();
6422 HAL_TSP_TsDma_Resume();
6423 _TSP_RETURN(DRVTSP_OK);
6424 }
6425
6426 //-------------------------------------------------------------------------------------------------
6427 /// Get current file in state
6428 /// @return DrvTSP_M2tStatus
6429 /// @sa MDrv_TSP_GetM2tSlot
6430 //-------------------------------------------------------------------------------------------------
MDrv_TSP_File_GetState(DrvTSP_FileinState * peFileinState)6431 TSP_Result MDrv_TSP_File_GetState(DrvTSP_FileinState* peFileinState)
6432 {
6433 MS_U32 state, cmdcnt;
6434
6435 _TSP_ENTRY();
6436
6437 state = HAL_TSP_CmdQ_TsDma_GetState();
6438 cmdcnt = HAL_TSP_CmdQ_CmdCount();
6439
6440 if (state & TSP_CTRL1_FILEIN_PAUSE)
6441 {
6442 *peFileinState = E_DRVTSP_FILEIN_STATE_PAUSE;
6443 }
6444 else if ((state & TSP_TSDMA_CTRL_START) || cmdcnt)
6445 {
6446 *peFileinState = E_DRVTSP_FILEIN_STATE_BUSY;
6447 }
6448 else
6449 {
6450 *peFileinState = E_DRVTSP_FILEIN_STATE_IDLE;
6451 }
6452 _TSP_RETURN(DRVTSP_OK);
6453
6454 }
6455
6456 //-------------------------------------------------------------------------------------------------
6457 /// Set Memory to TSP Stream Input Rate
6458 /// @param u32Div2 \b IN: Divider of M2T stream input rate ([1 .. 31], default 10)
6459 /// @return TSP_Result
6460 /// @note
6461 /// <b>input_rate = stream_rate / (u32Div2 * 2)</b>\n
6462 /// @note
6463 /// It's not recommend to change input rate at run-time, because it conflict with
6464 /// the internal stream synchornization mechanism.
6465 /// @sa MDrv_TSP_GetM2tSlot
6466 //-------------------------------------------------------------------------------------------------
MDrv_TSP_File_SetRate(MS_U32 u32Div2)6467 TSP_Result MDrv_TSP_File_SetRate(MS_U32 u32Div2)
6468 {
6469 _TSP_ENTRY();
6470
6471 //[HW TODO][HW LIMIT]
6472 // TsDma pause can be access by TSP CPU
6473 // TsDma pause it's hard to control because read/write in different register
6474 // When setting TsDma it should be disable interrupt to prevent ISR access
6475 // but it still can't prevent TSP_cpu access at the same time.
6476 //[SW PATCH] Add a special firmware command to lock TSP_cpu DMA pause/resume.
6477
6478 OSAL_TSP_IntDisable();
6479 HAL_TSP_TsDma_SetDelay(u32Div2);
6480 OSAL_TSP_IntEnable();
6481
6482 _TSP_RETURN(DRVTSP_OK);
6483 }
6484
6485 //-------------------------------------------------------------------------------------------------
6486 /// Set packet size to TSP file
6487 /// @param PacketMode \b IN: Mode of TSP file packet mode (192, 204, 188)
6488 /// @return TSP_Result
6489 /// @note
6490 //-------------------------------------------------------------------------------------------------
MDrv_TSP_File_SetPacketMode(DrvTSP_PacketMode PKT_Mode)6491 TSP_Result MDrv_TSP_File_SetPacketMode(DrvTSP_PacketMode PKT_Mode)
6492 {
6493 _TSP_ENTRY();
6494
6495 HAL_TSP_filein_enable(FALSE); //disable cmdQ before cmds are set
6496
6497 switch (PKT_Mode)
6498 {
6499 case E_DRVTSP_PKTMODE_188:
6500 HAL_TSP_SetPKTSize(0xBBUL);
6501 break;
6502 case E_DRVTSP_PKTMODE_192:
6503 HAL_TSP_SetPKTSize(0xBFUL);
6504 break;
6505 case E_DRVTSP_PKTMODE_204:
6506 HAL_TSP_SetPKTSize(0xCBUL);
6507 break;
6508 case E_DRVTSP_PKTMODE_130:
6509 HAL_TSP_SetPKTSize(0x82UL);
6510 break;
6511 case E_DRVTSP_PKTMODE_134:
6512 HAL_TSP_SetPKTSize(0x86UL);
6513 break;
6514 default:
6515 break;
6516 }
6517
6518 HAL_TSP_PS_Path_Disable();
6519
6520 _TSP_RETURN(DRVTSP_OK);
6521 }
6522
6523 //-------------------------------------------------------------------------------------------------
6524 /// Get the number of empty slot of M2T command
6525 /// @param pu32EmptySlot \b OUT: pointer of empty slot count return
6526 /// @return TSP_Result
6527 /// @note
6528 /// M2T is a command queue command, it can be queued by TSP when another M2T command
6529 /// is executing by TSP. The queued commands will be executed by order (FIFO)
6530 /// when previous M2T command execution is finished.
6531 /// @note
6532 /// User should call GetM2TSlot to make sure there is enough empty M2T command slot
6533 /// before sending any M2T command. (Each command has different command size)
6534 /// @sa MDrv_TSP_M2T_SetAddr, MDrv_TSP_M2T_SetSize, MDrv_TSP_M2T_Start,
6535 //[Reserved] MDrv_TSP_M2T_SetSTC
6536 //-------------------------------------------------------------------------------------------------
MDrv_TSP_File_CMDQ_GetSlot(MS_U32 * pu32EmptySlot)6537 TSP_Result MDrv_TSP_File_CMDQ_GetSlot(MS_U32 *pu32EmptySlot)
6538 {
6539 _TSP_ENTRY();
6540 *pu32EmptySlot = HAL_TSP_CmdQ_EmptyCount();
6541 _TSP_RETURN(DRVTSP_OK);
6542 }
6543
6544 //-------------------------------------------------------------------------------------------------
6545 /// Reset command queue
6546 /// @return TSP_Result
6547 /// @note
6548 /// SW patch--wait command queue empty
6549 /// wait HW ECO
6550 //-------------------------------------------------------------------------------------------------
MDrv_TSP_File_CMDQ_Reset(void)6551 TSP_Result MDrv_TSP_File_CMDQ_Reset(void)
6552 {
6553 MS_BOOL bRet;
6554
6555 _TSP_ENTRY();
6556 bRet = HAL_TSP_CmdQ_Reset();
6557 if (TRUE == bRet)
6558 {
6559 _TSP_RETURN(DRVTSP_OK);
6560 }
6561 _TSP_RETURN(DRVTSP_FAIL);
6562 }
6563
6564 //--------------------------------------------------------------------------------------------------
6565 /// Get command queue fifo level
6566 /// @param pu8FifoLevel \b OUT: fifo level, 0~3
6567 /// @return TSP_Result
6568 /// @note
6569 //--------------------------------------------------------------------------------------------------
MDrv_TSP_CmdQFifo_Status(MS_U8 * pu8FifoLevel)6570 TSP_Result MDrv_TSP_CmdQFifo_Status(MS_U8 *pu8FifoLevel)
6571 {
6572 _TSP_ENTRY();
6573
6574 *pu8FifoLevel = HAL_TSP_Get_CmdQFifoLevel();
6575
6576 _TSP_RETURN(DRVTSP_OK);
6577 }
6578
6579 //-------------------------------------------------------------------------------------------------
6580 /// Enable timestamp block scheme
6581 /// @return TSP_Result
6582 /// @note
6583 //-------------------------------------------------------------------------------------------------
MDrv_TSP_File_192BlockScheme_En(MS_BOOL bEnable)6584 TSP_Result MDrv_TSP_File_192BlockScheme_En(MS_BOOL bEnable)
6585 {
6586 _TSP_ENTRY();
6587 HAL_TSP_FileIn_192BlockScheme_En(bEnable);
6588 _TSP_RETURN(DRVTSP_OK);
6589 }
6590
6591 //-------------------------------------------------------------------------------------------------
6592 /// Enable PS path
6593 /// @param eM2tMode \b IN: input source control of filein
6594 /// @return TSP_Result
6595 //-------------------------------------------------------------------------------------------------
MDrv_TSP_File_PS_Path_Enable(DrvTSP_FileinMode eFileinMode)6596 TSP_Result MDrv_TSP_File_PS_Path_Enable(DrvTSP_FileinMode eFileinMode)
6597 {
6598 _TSP_ENTRY();
6599 HAL_TSP_PS_Path_Enable((MS_U32)eFileinMode);
6600 _TSP_RETURN(DRVTSP_OK);
6601 }
6602
MDrv_TSP_File_TSIFSrcSel(DrvTSP_FltType eFltSrc,MS_BOOL bFileMode)6603 TSP_Result MDrv_TSP_File_TSIFSrcSel(DrvTSP_FltType eFltSrc, MS_BOOL bFileMode)
6604 {
6605 MS_U32 u32Src = 0;
6606
6607 _TSP_ENTRY();
6608
6609 #ifdef MERGE_STR_SUPPORT
6610 if(eFltSrc == E_DRVTSP_FLT_SOURCE_TYPE_FILE)
6611 {
6612 HAL_TSP_TSIFFI_SrcSelect(bFileMode);
6613 _TSP_RETURN(DRVTSP_OK);
6614 }
6615 #endif
6616
6617 #if (TSP_IF_NUM > 1)
6618 if(eFltSrc == E_DRVTSP_FLT_SOURCE_TYPE_TS1)
6619 {
6620 if(bFileMode == TRUE)
6621 {
6622 u32Src = TSP_PIDFLT1_USE_TSIF_MMFI0;
6623 }
6624 else
6625 {
6626 u32Src = TSP_PIDFLT1_USE_TSIF1;
6627 }
6628 }
6629 else if(eFltSrc == E_DRVTSP_FLT_SOURCE_TYPE_TS2)
6630 {
6631 if(bFileMode == TRUE)
6632 {
6633 u32Src = TSP_PIDFLT2_USE_TSIF_MMFI1;
6634 }
6635 else
6636 {
6637 u32Src = TSP_PIDFLT2_USE_TSIF2;
6638 }
6639 }
6640 #endif
6641
6642 HAL_TSP_PidFlt_Src_Select(u32Src);
6643 _TSP_RETURN(DRVTSP_OK);
6644 }
6645
6646 // Legacy
6647 //-------------------------------------------------------------------------------------------------
6648 /// Get Scmb states
6649 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
6650 /// @param pScmbLevel \b IN: TS interface setting
6651 /// @return TSP_Result
6652 /// @note
6653 //-------------------------------------------------------------------------------------------------
MDrv_TSP_Scmb_Status(MS_U32 u32EngId,DrvTSP_Scmb_Level * pScmbLevel)6654 TSP_Result MDrv_TSP_Scmb_Status(MS_U32 u32EngId, DrvTSP_Scmb_Level* pScmbLevel)
6655 {
6656 _TSP_ENTRY();
6657 *pScmbLevel= E_DRVTSP_SCMB_NONE;
6658
6659 if(HAL_TSP_Scmb_Status(0UL, 0UL, 0xFFFFFFFFUL))
6660 {
6661 *pScmbLevel= E_DRVTSP_SCMB_TS;
6662 _TSP_RETURN(DRVTSP_OK);
6663 }
6664 if(HAL_TSP_Scmb_Status(0UL, 1UL, 0xFFFFFFFFUL))
6665 {
6666 *pScmbLevel= E_DRVTSP_SCMB_TS;
6667 _TSP_RETURN(DRVTSP_OK);
6668 }
6669 if(HAL_TSP_Scmb_Status(0UL, 2UL, 0xFFFFFFFFUL))
6670 {
6671 *pScmbLevel= E_DRVTSP_SCMB_TS;
6672 _TSP_RETURN(DRVTSP_OK);
6673 }
6674 if(HAL_TSP_Scmb_Status(0UL, 3UL, 0xFFFFFFFFUL))
6675 {
6676 *pScmbLevel= E_DRVTSP_SCMB_TS;
6677 _TSP_RETURN(DRVTSP_OK);
6678 }
6679 _TSP_RETURN(DRVTSP_OK);
6680 }
6681
MDrv_TSP_GetCap(DrvTSP_Cap eCap,void * pOutput)6682 TSP_Result MDrv_TSP_GetCap(DrvTSP_Cap eCap, void* pOutput)
6683 {
6684 *((MS_U32*)pOutput) = 0UL;
6685
6686 if (eCap >= E_DRVTSP_CAP_NULL)
6687 return DRVTSP_FAIL;
6688
6689 if(eCap == E_DRVTSP_CAP_RESOURCE_SIZE)
6690 {
6691 *((MS_U32*)pOutput) = sizeof(TSP_RESOURCE_PRIVATE);
6692 return DRVTSP_OK;
6693 }
6694
6695 if(HAL_TSP_GetCap((MS_U32)eCap, pOutput))
6696 {
6697 return DRVTSP_OK;
6698 }
6699 else
6700 {
6701 return DRVTSP_FAIL;
6702 }
6703 }
6704
MDrv_TSP_GetStatus(DrvTSP_HW_Status * HW_Status,DrvTSP_SW_Status * SW_Status)6705 TSP_Result MDrv_TSP_GetStatus(DrvTSP_HW_Status *HW_Status, DrvTSP_SW_Status *SW_Status)
6706 {
6707 _TSP_ENTRY();
6708 if (HAL_TSP_Alive())
6709 {
6710 *HW_Status = E_DRVTSP_HW_ALIVE;
6711 }
6712 else
6713 {
6714 *HW_Status = E_DRVTSP_HW_DEALIVE;
6715 }
6716 *SW_Status = _ptsp_res->_TspState[0].TSPStatus;
6717
6718 _TSP_RETURN(DRVTSP_OK);
6719 }
6720
MDrv_TSP_SetDbgLevel(DrvTSP_DbgLevel DbgLevel)6721 TSP_Result MDrv_TSP_SetDbgLevel(DrvTSP_DbgLevel DbgLevel)
6722 {
6723 //TSP_DBG("[%s][%d] DbgLevel %u \n", __FUNCTION__, __LINE__, DbgLevel);
6724 _u32TSPDGBLevel = DbgLevel;
6725
6726 return DRVTSP_OK;
6727 }
6728
MDrv_TSP_GetTSIFStatus(DrvTSP_If eIf,DrvTSP_If_Set * pIfSet,MS_U16 * pu16Clk)6729 TSP_Result MDrv_TSP_GetTSIFStatus(DrvTSP_If eIf, DrvTSP_If_Set* pIfSet, MS_U16* pu16Clk)
6730 {
6731 TSP_Result Res = DRVTSP_OK;
6732 MS_U16 u16pad = 0, u16clk = 0;
6733
6734 _TSP_STR_ENTRY();
6735
6736 switch(eIf)
6737 {
6738 case E_DRVTSP_IF_TS0:
6739 HAL_TSP_GetTSIF_Status(0, &u16pad, &u16clk, &(pIfSet->bExtSync), &(pIfSet->bParallel));
6740 break;
6741 case E_DRVTSP_IF_TS1:
6742 HAL_TSP_GetTSIF_Status(1, &u16pad, &u16clk, &(pIfSet->bExtSync), &(pIfSet->bParallel));
6743 break;
6744 case E_DRVTSP_IF_TS2:
6745 HAL_TSP_GetTSIF_Status(2, &u16pad, &u16clk, &(pIfSet->bExtSync), &(pIfSet->bParallel));
6746 break;
6747 case E_DRVTSP_IF_TS3:
6748 HAL_TSP_GetTSIF_Status(3, &u16pad, &u16clk, &(pIfSet->bExtSync), &(pIfSet->bParallel));
6749 break;
6750 #ifdef MERGE_STR_SUPPORT
6751 case E_DRVTSP_IF_FI:
6752 HAL_TSP_GetTSIF_Status(0x80, &u16pad, &u16clk, &(pIfSet->bExtSync), &(pIfSet->bParallel));
6753 break;
6754 #endif
6755 default:
6756 _TSP_STR_RETURN(DRVTSP_NOT_SUPPORTED);
6757 }
6758
6759 *pu16Clk = u16clk;
6760
6761 switch(u16pad)
6762 {
6763 case TSP_MUX_INDEMOD:
6764 if((u16clk & CLKGEN0_TSP_CLK_MASK) != TSP_CLK_INDEMOD)
6765 Res = DRVTSP_FUNC_ERROR;
6766 pIfSet->ePad = E_DRVTSP_PAD_DEMOD;
6767 break;
6768 case TSP_MUX_TS0:
6769 if((u16clk & CLKGEN0_TSP_CLK_MASK) != TSP_CLK_TS0)
6770 Res = DRVTSP_FUNC_ERROR;
6771 pIfSet->ePad = E_DRVTSP_PAD_EXT_INPUT0;
6772 break;
6773 #if (TSP_TS_PAD_NUM >= 2)
6774 case TSP_MUX_TS1:
6775 if((u16clk & CLKGEN0_TSP_CLK_MASK) != TSP_CLK_TS1)
6776 Res = DRVTSP_FUNC_ERROR;
6777 pIfSet->ePad = E_DRVTSP_PAD_EXT_INPUT1;
6778 break;
6779 #endif
6780 #if (TSP_TS_PAD_NUM >= 3)
6781 case TSP_MUX_TS2:
6782 if((u16clk & CLKGEN0_TSP_CLK_MASK) != TSP_CLK_TS2)
6783 Res = DRVTSP_FUNC_ERROR;
6784 pIfSet->ePad = E_DRVTSP_PAD_EXT_INPUT2;
6785 break;
6786 case TSP_MUX_TSCB:
6787 if((u16clk & CLKGEN0_TSP_CLK_MASK) != TSP_CLK_TSCB)
6788 Res = DRVTSP_FUNC_ERROR;
6789 pIfSet->ePad = E_DRVTSP_PAD_EXT_INPUT3;
6790 break;
6791 #endif
6792 #if defined(TSP_MUX_TS3)
6793 case TSP_MUX_TS3:
6794 if((u16clk & CLKGEN0_TSP_CLK_MASK) != TSP_CLK_TS3)
6795 Res = DRVTSP_FUNC_ERROR;
6796 pIfSet->ePad = E_DRVTSP_PAD_EXT_INPUT3;
6797 break;
6798 #endif
6799 #if defined(TSP_MUX_TS4)
6800 case TSP_MUX_TS4:
6801 if((u16clk & CLKGEN0_TSP_CLK_MASK) != TSP_CLK_TS4)
6802 Res = DRVTSP_FUNC_ERROR;
6803 pIfSet->ePad = E_DRVTSP_PAD_EXT_INPUT4;
6804 break;
6805 #endif
6806 #if defined(TSP_MUX_TS5)
6807 case TSP_MUX_TS5:
6808 if((u16clk & CLKGEN0_TSP_CLK_MASK) != TSP_CLK_TS5)
6809 Res = DRVTSP_FUNC_ERROR;
6810 pIfSet->ePad = E_DRVTSP_PAD_EXT_INPUT5;
6811 break;
6812 #endif
6813 #if defined(TSP_MUX_TSO)
6814 case TSP_MUX_TSO:
6815 if((u16clk & CLKGEN0_TSP_CLK_MASK) != TSP_CLK_TSOOUT)
6816 Res = DRVTSP_FUNC_ERROR;
6817 pIfSet->ePad = E_DRVTSP_PAD_TSO;
6818 break;
6819 #endif
6820 default:
6821 break;
6822 }
6823
6824 pIfSet->bClkInv = ((u16clk & TSP_CLK_INVERSE) == TSP_CLK_INVERSE);
6825
6826 _TSP_STR_RETURN(Res);
6827 }
6828
6829 //-------------------------------------------------------------------------------------------------
6830 /// Get TSP driver version
6831 /// @param <IN> \b const MS_U8 **pVerString :
6832 /// @param <RET> \b : when get ok, return the pointer to the driver version
6833 //-------------------------------------------------------------------------------------------------
MDrv_TSP_GetLibVer(const MSIF_Version ** ppVersion)6834 TSP_Result MDrv_TSP_GetLibVer(const MSIF_Version **ppVersion)
6835 {
6836 // No mutex check, it can be called before Init
6837 if (!ppVersion)
6838 {
6839 return DRVTSP_FAIL;
6840 }
6841
6842 *ppVersion = &_drv_tsp_version;
6843
6844 return DRVTSP_OK;
6845 }
6846
MDrv_TSP_Alive(MS_U32 u32EngId)6847 TSP_Result MDrv_TSP_Alive(MS_U32 u32EngId)
6848 {
6849 _TSP_ENTRY();
6850 if (HAL_TSP_Alive())
6851 {
6852 _TSP_RETURN(DRVTSP_OK);
6853 }
6854 else
6855 {
6856 _TSP_RETURN(DRVTSP_FAIL);
6857 }
6858 }
6859
MDrv_TSP_IsAccess(MS_U32 u32Try)6860 inline TSP_Result MDrv_TSP_IsAccess(MS_U32 u32Try)
6861 {
6862 return (HAL_TSP_TTX_IsAccess(u32Try))? DRVTSP_OK: DRVTSP_FAIL;
6863 }
6864
MDrv_TSP_UnlockAccess(void)6865 inline TSP_Result MDrv_TSP_UnlockAccess(void)
6866 {
6867 HAL_TSP_TTX_UnlockAccess();
6868 return DRVTSP_OK;
6869 }
6870
6871
6872 // Following are 2 private function used to solve annoying interrupt thread disappearing problem when fork.
6873 // Should not be exposed to general users.
MDrv_TSP_CloseInterrupt(void)6874 MS_BOOL MDrv_TSP_CloseInterrupt(void)
6875 {
6876 // IntDisable
6877 // IntDetach
6878 OSAL_TSP_IntDisable();
6879 OSAL_TSP_IntDetach();
6880
6881 return TRUE;
6882 }
6883
6884 //-------------------------------------------------------------------------------------------------
6885 /// Initialize lib resource API
6886 /// @param pu32ResMemAddr \b IN: Pointer to store resource memory address
6887 /// @return TSP_Result
6888 /// @note
6889 //-------------------------------------------------------------------------------------------------
MDrv_TSP_InitLibResource(void * pResMemAddr)6890 TSP_Result MDrv_TSP_InitLibResource(void *pResMemAddr)
6891 {
6892 TSP_ASSERT((pResMemAddr != 0),
6893 TSP_DBG("[TSP_ERROR][%s][%06d] pointer is NULL!\n", __FUNCTION__, __LINE__));
6894
6895 MS_VIRT virtBank, virtBank1;
6896 MS_PHY u32BankSize;
6897 MS_PHY u32BankSize1;
6898
6899 _ptsp_res = (TSP_RESOURCE_PRIVATE*)pResMemAddr;
6900
6901 if(_ptsp_res->_bSWInitReady != TRUE)
6902 {
6903 if(_TSP_InitResource(_ptsp_res) == FALSE)
6904 return DRVTSP_FAIL;
6905 }
6906
6907 // For multi-process use case. (different process should set the value of bank again)
6908 if(_bBankInit == FALSE)
6909 {
6910 if (FALSE == MDrv_MMIO_GetBASE(&virtBank, &u32BankSize, MS_MODULE_TSP))
6911 {
6912 MS_CRITICAL_MSG(TSP_DBG("MDrv_MMIO_GetBASE fail\n"));
6913 MS_ASSERT(0);
6914 }
6915 if (FALSE == MDrv_MMIO_GetBASE(&virtBank1, &u32BankSize1, MS_MODULE_PM))
6916 {
6917 MS_CRITICAL_MSG(TSP_DBG("MDrv_MMIO_GetBASE fail\n"));
6918 MS_ASSERT(0);
6919 }
6920
6921 HAL_TSP_SetBank(virtBank, virtBank1);
6922 _bBankInit = TRUE;
6923 }
6924
6925 return DRVTSP_OK;
6926 }
6927
6928 //-------------------------------------------------------------------------------------------------
6929 /// Initialize TSP driver and TSP engine
6930 /// @return TSP_Result
6931 /// @note
6932 /// It should be called before calling any other TSP DDI functions.
6933 /// Driver task is in @ref E_TASK_PRI_SYS level.
6934 //-------------------------------------------------------------------------------------------------
MDrv_TSP_Init(MS_PHY phyFWAddr,MS_U32 u32FWSize)6935 TSP_Result MDrv_TSP_Init(MS_PHY phyFWAddr, MS_U32 u32FWSize)
6936 {
6937 MS_DEBUG_MSG(TSP_DBG ("******************start TSP init*********************************\n"));
6938 TSP_Result bRet;
6939
6940 #ifdef SECURE_PVR_ENABLE
6941 if(MDrv_TSP_Ree_TeeCmdSystem_Init() == DRVTSP_FAIL)
6942 {
6943 MS_DEBUG_MSG(TSP_DBG ("[%s] Register Mailbox failed!\n", __FUNCTION__));
6944 return DRVTSP_FAIL;
6945 }
6946 #endif //SECURE_PVR_ENABLE
6947
6948 //if already init, set the same HK parameter & interrupt num to this process, and attached Isr for this new process
6949 #ifndef MSOS_TYPE_LINUX_KERNEL
6950 if((_ptsp_res->_bSWInitReady == TRUE) && (_s32TspTaskId != -1))
6951 {
6952 return MDrv_TSP_Reinit(_bIsHK);
6953 }
6954 #endif //MSOS_TYPE_LINUX_KERNEL
6955
6956 _ptsp_res->_phyFwAddr = phyFWAddr;
6957 _ptsp_res->_u32FwSize = u32FWSize;
6958 if (DRVTSP_OK != (bRet = _TSP_Init(TRUE, FALSE)))
6959 {
6960 return bRet;
6961 }
6962 MS_DEBUG_MSG(TSP_DBG ("**********************End TSP init*****************************\n"));
6963
6964 return DRVTSP_OK;
6965 }
6966
6967 //-------------------------------------------------------------------------------------------------
6968 /// Initialize TSP driver for hal parameters init and attaching Isr
6969 /// @return TSP_Result
6970 /// @note
6971 /// Only for the second process to init
6972 /// Driver task is in @ref E_TASK_PRI_SYS level.
6973 //-------------------------------------------------------------------------------------------------
MDrv_TSP_Reinit(MS_BOOL bHK)6974 TSP_Result MDrv_TSP_Reinit(MS_BOOL bHK)
6975 {
6976 MS_VIRT virtTspBank, virtTspBank1;
6977 MS_PHY u32TspBankSize;
6978 MS_PHY u32TspBankSize1;
6979 MS_U8 u8ii = 0, u8tmp;
6980
6981 _bIsHK = bHK;
6982 _u32IntNum = (bHK) ? E_INT_IRQ_TSP2HK : E_INT_FIQ_TSP2AEON; // use this once MHEG5 using utopia msos
6983
6984 if (FALSE == MDrv_MMIO_GetBASE(&virtTspBank, &u32TspBankSize, MS_MODULE_TSP))
6985 {
6986 MS_CRITICAL_MSG(TSP_DBG("MDrv_MMIO_GetBASE fail\n"));
6987 MS_ASSERT(0);
6988 }
6989 if (FALSE == MDrv_MMIO_GetBASE(&virtTspBank1, &u32TspBankSize1, MS_MODULE_PM))
6990 {
6991 MS_CRITICAL_MSG(TSP_DBG("MDrv_MMIO_GetBASE fail\n"));
6992 MS_ASSERT(0);
6993 }
6994
6995 HAL_TSP_SetBank(virtTspBank, virtTspBank1);
6996
6997 HAL_TSP_STC64_Mode_En(TRUE);
6998
6999 _s32ExtMutexId = OSAL_TSP_MutexCreate((MS_U8*)tsp_ext_mutex);
7000
7001 if(_u32LibMode != DRVTSP_CMD_LIB_MODE_KRN)
7002 {
7003 _s32TspEventId = OSAL_TSP_EventCreate((MS_U8*)tsp_event);
7004 }
7005
7006 u8tmp = (MS_U8)((TSP_SECFLT_NUM+31UL)>>5UL);
7007 for (u8ii = 0; u8ii < u8tmp; u8ii++)
7008 {
7009 _s32TspSecRdyId[u8ii] = OSAL_TSP_EventCreate((MS_U8*)tsp_secRdy);
7010 _s32TspSecOvfId[u8ii] = OSAL_TSP_EventCreate((MS_U8*)tsp_crcerr);
7011 _s32TspSecCrcId[u8ii] = OSAL_TSP_EventCreate((MS_U8*)tsp_secovf);
7012 _s32TspFltDisableId[u8ii] = OSAL_TSP_EventCreate((MS_U8*)tsp_fltdis);
7013 _u32SecNotifyId[u8ii] = 0;
7014 }
7015
7016 u8tmp = (MS_U8)((TSP_PVR_IF_NUM+31UL)>>5UL);
7017 for (u8ii = 0; u8ii < u8tmp; u8ii++)
7018 {
7019 _u32PvrNotifyId[u8ii] = 0;
7020 }
7021
7022 #if (defined(HWPCR_ENABLE) && (TSP_HWPCR_BY_HK == 1))
7023 u8tmp = (MS_U8)((TSP_PCRFLT_NUM+31UL)>>5UL);
7024 for (u8ii = 0; u8ii < u8tmp; u8ii++)
7025 {
7026 _u32HwPcrNotifyId[u8ii] = 0;
7027 }
7028 #endif
7029
7030 if(_u32LibMode != DRVTSP_CMD_LIB_MODE_KRN)
7031 {
7032 _s32TspTaskId = OSAL_TSP_TaskCreate(_TSP_Isr_Proc_Task, (MS_U8*)tsp_isr_task);
7033 }
7034
7035 _ptsp_res->_u32ProcessNum++;
7036
7037
7038 // IntDisable
7039 // IntDetach
7040 OSAL_TSP_IntDisable();
7041 //#ifndef MSOS_TYPE_LINUX_KERNEL
7042 OSAL_TSP_IntDetach();
7043 //#endif
7044
7045 OSAL_TSP_IntAttach(_TSP_Isr);
7046 //#ifndef MSOS_TYPE_LINUX_KERNEL
7047 OSAL_TSP_IntEnable();
7048 //#endif
7049
7050 return DRVTSP_OK;
7051 }
7052
MDrv_TSP_Reset(void)7053 TSP_Result MDrv_TSP_Reset(void)
7054 {
7055 _TSP_RegStateReset();
7056 HAL_TSP_Reset(0);
7057 return DRVTSP_OK;
7058 }
7059
MDrv_TSP_OpenInterrupt(void)7060 MS_BOOL MDrv_TSP_OpenInterrupt(void)
7061 {
7062 OSAL_TSP_IntAttach(_TSP_Isr);
7063 OSAL_TSP_IntEnable();
7064 return TRUE;
7065 }
7066
MDrv_TSP_BurstLen(MS_U32 u32Len)7067 TSP_Result MDrv_TSP_BurstLen(MS_U32 u32Len)
7068 {
7069 _TSP_ENTRY();
7070 HAL_TSP_SetDMABurstLen(u32Len);
7071 _TSP_RETURN(DRVTSP_OK);
7072 }
7073
MDrv_TSP_GetFileInTimeStamp(MS_U32 * u32TSLen)7074 TSP_Result MDrv_TSP_GetFileInTimeStamp(MS_U32* u32TSLen)
7075 {
7076 _TSP_ENTRY();
7077 *u32TSLen = HAL_TSP_GetFileInTimeStamp();
7078 _TSP_RETURN(DRVTSP_OK);
7079 }
7080
MDrv_TSP_GetDbgPortInfo(MS_U32 u32DbgSel,MS_U32 * u32DbgInfo)7081 TSP_Result MDrv_TSP_GetDbgPortInfo(MS_U32 u32DbgSel,MS_U32* u32DbgInfo)
7082 {
7083 _TSP_ENTRY();
7084 *u32DbgInfo = HAL_TSP_GetDBGPortInfo(u32DbgSel);
7085 _TSP_RETURN(DRVTSP_OK);
7086 }
7087
7088 //[LEGACY] //[OBSOLETE]
MDrv_TSP_SetHK(MS_BOOL bIsHK)7089 TSP_Result MDrv_TSP_SetHK(MS_BOOL bIsHK)
7090 {
7091 //_TSP_ENTRY();
7092 _bIsHK = bIsHK;
7093 _u32IntNum = ((bIsHK) ? E_INT_IRQ_TSP2HK : E_INT_FIQ_TSP2AEON); // use this once MHEG5 using utopia msos
7094
7095 return DRVTSP_OK;
7096 //_TSP_RETURN(DRVTSP_OK);
7097 }
7098 //[LEGACY] //[OBSOLETE]
7099
MDrv_TSP_Get_FW_VER(MS_U32 * u32FWVer)7100 TSP_Result MDrv_TSP_Get_FW_VER(MS_U32* u32FWVer)
7101 {
7102 MS_U32 _u32fw;
7103 _u32fw = HAL_TSP_Get_FW_VER();
7104 *u32FWVer = _u32fw;
7105 return DRVTSP_OK;
7106 }
7107
MDrv_TSP_WriteProtect_Enable(MS_BOOL bEnable,MS_PHY * pphyStartAddr,MS_PHY * pphyEndAddr)7108 void MDrv_TSP_WriteProtect_Enable(MS_BOOL bEnable, MS_PHY* pphyStartAddr, MS_PHY* pphyEndAddr)
7109 {
7110 HAL_TSP_WriteProtect_Enable(bEnable, pphyStartAddr, pphyEndAddr);
7111 }
7112
MDrv_TSP_OrzWriteProtect_Enable(MS_BOOL bEnable,MS_PHY phyStartAddr,MS_PHY phyEndAddr)7113 void MDrv_TSP_OrzWriteProtect_Enable(MS_BOOL bEnable, MS_PHY phyStartAddr, MS_PHY phyEndAddr)
7114 {
7115 HAL_TSP_OrzWriteProtect_Enable(bEnable, phyStartAddr, phyEndAddr);
7116 }
7117
MDrv_TSP_TSIF_Enable(DrvTSP_If tsif,MS_BOOL bEnable)7118 TSP_Result MDrv_TSP_TSIF_Enable(DrvTSP_If tsif, MS_BOOL bEnable)
7119 {
7120 _TSP_ENTRY();
7121 switch (tsif)
7122 {
7123 case E_DRVTSP_IF_TS0:
7124 HAL_TSP_TSIF0_Enable(bEnable);
7125 break;
7126 case E_DRVTSP_IF_TS1:
7127 HAL_TSP_TSIF1_Enable(bEnable);
7128 break;
7129 default:
7130 ULOGE("TSP", "[%s][%d] IF not support\n",__FUNCTION__, __LINE__);
7131 break;
7132 }
7133 _TSP_RETURN(DRVTSP_OK);
7134 }
7135
MDrv_TSP_ReadDropPktCnt(MS_U16 * pu16ADropCnt,MS_U16 * pu16VDropCnt)7136 TSP_Result MDrv_TSP_ReadDropPktCnt(MS_U16* pu16ADropCnt, MS_U16* pu16VDropCnt)
7137 {
7138 _TSP_ENTRY();
7139
7140 if(HAL_TSP_Read_DropPktCnt(pu16ADropCnt, pu16VDropCnt) == TRUE)
7141 {
7142 _TSP_RETURN(DRVTSP_OK);
7143 }
7144 else
7145 {
7146 _TSP_RETURN(DRVTSP_FAIL);
7147 }
7148 }
7149
MDrv_TSP_Get_Intr_Count(MS_U32 * pu32Count)7150 TSP_Result MDrv_TSP_Get_Intr_Count(MS_U32* pu32Count)
7151 {
7152 *pu32Count = _ptsp_res->_u32DbgIntrCount;
7153 return DRVTSP_OK;
7154 }
7155
_DumpFwMsg(void)7156 static void _DumpFwMsg(void)
7157 {
7158 MS_S32 tmp = 0;
7159 MS_S32 len = 0;
7160 MS_VIRT vptr = 0;
7161 char p8buf[256];
7162 p8buf[255] = '\0';
7163 char* p = 0;
7164
7165 MS_PHY phyWritePos = *(volatile MS_PHY*)MS_PA2KSEG1(_FwDbgInfo.phyBufAddr);
7166 vptr = MS_PA2KSEG1(_FwDbgInfo.phyBufAddr) + _FwDbgInfo.phyReadPos;
7167 p = (char*)vptr;
7168 //ULOGD("TSP", "_pFwDbgInfo->phyBufAddr = 0x%x\n", (unsigned int)_FwDbgInfo.phyBufAddr);
7169 //ULOGD("TSP", "_pFwDbgInfo->phyReadPos = 0x%x\n", (unsigned int)_FwDbgInfo.phyReadPos);
7170 //ULOGD("TSP", "_pFwDbgInfo->phyWritePos = 0x%x\n", (unsigned int)phyWritePos);
7171 if(phyWritePos > _FwDbgInfo.u32Size)
7172 {
7173 TSP_DBG("[%s], WARN : write pointer incorrect!!!\n", __FUNCTION__);
7174 return;
7175 }
7176
7177 if(phyWritePos > _FwDbgInfo.phyReadPos)
7178 {
7179 while(1)
7180 {
7181 len = (phyWritePos - _FwDbgInfo.phyReadPos) > 255 ? 255 : (phyWritePos - _FwDbgInfo.phyReadPos);
7182 if((tmp = snprintf(p8buf, len, "%s", p)) == 0)
7183 break;
7184 tmp++;
7185 p+=tmp;
7186 _FwDbgInfo.phyReadPos += tmp;
7187 ULOGD("TSP", "[TSP] %s", p8buf);
7188 }
7189 }
7190 else if(phyWritePos < _FwDbgInfo.phyReadPos)
7191 {
7192 while(1)
7193 {
7194 len = (_FwDbgInfo.u32Size - _FwDbgInfo.phyReadPos) > 255? 255 : (_FwDbgInfo.u32Size - _FwDbgInfo.phyReadPos);
7195 if((tmp = snprintf(p8buf, len, "%s", p)) == 0)
7196 break;
7197 tmp++;
7198 p+=tmp;
7199 _FwDbgInfo.phyReadPos += tmp;
7200 ULOGD("TSP", "[TSP] %s", p8buf);
7201 }
7202
7203 _FwDbgInfo.phyReadPos = (MS_PHY)sizeof(MS_U32);
7204 vptr = MS_PA2KSEG1(_FwDbgInfo.phyBufAddr) + _FwDbgInfo.phyReadPos;
7205 p = (char*)vptr;
7206 while(1)
7207 {
7208 len = (phyWritePos - _FwDbgInfo.phyReadPos) > 255 ? 255 : (phyWritePos - _FwDbgInfo.phyReadPos);
7209 if((tmp = snprintf(p8buf, len, "%s", p)) == 0)
7210 break;
7211 tmp++;
7212 p+=tmp;
7213 _FwDbgInfo.phyReadPos += tmp;
7214 ULOGD("TSP", "[TSP] %s", p8buf);
7215 }
7216 }
7217 }
7218
MDrv_TSP_SetFwDBGParam(MS_PHY phyAddr,MS_U32 u32Size,MS_U32 u32DbgWord)7219 TSP_Result MDrv_TSP_SetFwDBGParam(MS_PHY phyAddr, MS_U32 u32Size, MS_U32 u32DbgWord)
7220 {
7221 TSP_ASSERT((phyAddr != 0) && (u32Size != 0),
7222 TSP_DBG("[TSP_ERROR][%06d] memory information for debug buffer incorrect address : %u, size : %u\n", __LINE__, (unsigned int)phyAddr, (unsigned int)u32Size));
7223
7224 _TSP_ENTRY();
7225
7226 HAL_TSP_OrzWriteProtect_Enable(FALSE, 0, 0);
7227 if(HAL_TSP_SetFwDbgMem(phyAddr, u32Size) && HAL_TSP_SetFwDbgWord(u32DbgWord))
7228 {
7229 _FwDbgInfo.bEnable = TRUE;
7230 _FwDbgInfo.phyBufAddr = phyAddr;
7231 _FwDbgInfo.u32Size = u32Size;
7232 _FwDbgInfo.phyReadPos = (MS_PHY)sizeof(MS_U32);
7233 _TSP_RETURN(DRVTSP_OK);
7234 }
7235 else
7236 {
7237 TSP_DBG("********HAL_TSP_SetFwDbgMem fail**************\n");
7238 _TSP_RETURN(DRVTSP_FAIL);
7239 }
7240 }
7241
MDrv_TSP_ResetFileinTimestamp(void)7242 TSP_Result MDrv_TSP_ResetFileinTimestamp(void)
7243 {
7244 HAL_TSP_ResetTimeStamp();
7245 return DRVTSP_OK;
7246 }
7247
7248 //-------------------------------------------------------------------------------------------------
7249 /// Enable PS path
7250 /// @param pphyReadAddr \b OUT: Pointer to store file-in current reand pointer
7251 /// @return TSP_Result
7252 //-------------------------------------------------------------------------------------------------
MDrv_TSP_File_GetReadAddr(MS_PHY * pphyReadAddr)7253 TSP_Result MDrv_TSP_File_GetReadAddr(MS_PHY *pphyReadAddr)
7254 {
7255 _TSP_ENTRY();
7256 if(!HAL_TSP_GetFilinReadAddr(pphyReadAddr))
7257 {
7258 _TSP_RETURN(DRVTSP_NOT_SUPPORTED);
7259 }
7260 _TSP_RETURN(DRVTSP_OK);
7261 }
7262
7263 //-------------------------------------------------------------------------------------------------
7264 /// Set Virtual Queue buffer
7265 /// @param phyVQBaseAddr \b IN: Virtual Queue memorry address
7266 /// @param u32VQBufLen_192PKT \b IN: Number of packets for Virtual Queue (192 bytes per packet)
7267 /// @return TSP_Result
7268 /// @note
7269 //-------------------------------------------------------------------------------------------------
MDrv_TSP_SetVQueBuf(MS_PHY phyVQBaseAddr,MS_U32 u32VQBufLen)7270 TSP_Result MDrv_TSP_SetVQueBuf(MS_PHY phyVQBaseAddr, MS_U32 u32VQBufLen)
7271 {
7272 MS_U8 u8ii = 0;
7273 #ifndef SECURE_PVR_ENABLE
7274 MS_U32 u32VQSize = 0;
7275 MS_PHY phyVQBufStart = phyVQBaseAddr;
7276 MS_U32 u32MiuAlign = 0;
7277
7278 _TSP_STR_ENTRY();
7279
7280 if(HAL_TSP_GetCap(HAL_TSP_CAP_VQ_ALIGN, (void*)&u32MiuAlign) == FALSE)
7281 {
7282 _TSP_STR_RETURN(DRVTSP_FAIL);
7283 }
7284
7285 u32VQSize = ((u32VQBufLen / u32MiuAlign) / TSP_VQ_NUM) * u32MiuAlign ; //miu alignment
7286
7287 for(u8ii = 0; u8ii < ((MS_U8)TSP_VQ_NUM); u8ii++)
7288 {
7289 HAL_TSP_SetVQBuffer(u8ii, phyVQBufStart, u32VQSize);
7290 HAL_TSP_VQueue_Reset(u8ii);
7291 phyVQBufStart += u32VQSize;
7292 }
7293
7294 #else
7295 _ptsp_res->_stSecBuf.u32BufId = 0;
7296 _ptsp_res->_stSecBuf.u32BufOpt = 0;
7297 _ptsp_res->_stSecBuf.u32BufSize = u32VQBufLen;
7298 _ptsp_res->_stSecBuf.phyBufAddr = phyVQBaseAddr;
7299 if(MDrv_TSP_Ree_SendTeeCmd(E_DRVTSP_REE_TO_TEE_CMD_SET_VqBuf, (void*)(&(_ptsp_res->_stSecBuf)), sizeof(DrvTSP_SecureBuf)) != DRVTSP_OK)
7300 {
7301 TSP_DBG("[MDRV TSP][%06d] Set VQ buf fail!\n", __LINE__);
7302 _TSP_STR_RETURN(DRVTSP_FAIL);
7303 }
7304 for(u8ii = 0; u8ii < ((MS_U8)TSP_VQ_NUM); u8ii++)
7305 {
7306 HAL_TSP_VQueue_Reset(u8ii);
7307 }
7308
7309 #endif //SECURE_PVR_ENABLE
7310
7311 _TSP_STR_RETURN(DRVTSP_OK);
7312 }
7313
7314 //-------------------------------------------------------------------------------------------------
7315 /// Enable/Disable Virtual Quere
7316 /// @param bEnable \b IN: Virtual Queue memorry Enable flag
7317 /// @return TSP_Result
7318 /// @note
7319 //-------------------------------------------------------------------------------------------------
MDrv_TSP_VQueEnable(MS_BOOL bEnable)7320 TSP_Result MDrv_TSP_VQueEnable(MS_BOOL bEnable)
7321 {
7322 _TSP_STR_ENTRY();
7323 HAL_TSP_VQueue_Enable(bEnable);
7324 _TSP_STR_RETURN(DRVTSP_OK);
7325 }
7326
7327 //-------------------------------------------------------------------------------------------------
7328 /// Reset Virtual Quere
7329 /// @param u8VQID \b IN: Virtual Queue Index. 0: TS0, 1: File, 2: TS1, 3: TS3
7330 /// @return TSP_Result
7331 //-------------------------------------------------------------------------------------------------
MDrv_TSP_VQueReset(MS_U8 u8VQID)7332 TSP_Result MDrv_TSP_VQueReset(MS_U8 u8VQID)
7333 {
7334 _TSP_ENTRY();
7335 HAL_TSP_VQueue_Reset(u8VQID);
7336 _TSP_RETURN(DRVTSP_OK);
7337 }
7338
7339 //-------------------------------------------------------------------------------------------------
7340 /// Enable Virtual Quere Overflow interrupt
7341 /// @return TSP_Result
7342 //-------------------------------------------------------------------------------------------------
MDrv_TSP_VQueue_OverflowInt_En(MS_BOOL bEnable)7343 TSP_Result MDrv_TSP_VQueue_OverflowInt_En(MS_BOOL bEnable)
7344 {
7345 MS_U8 u8ii = 0;
7346
7347 _TSP_ENTRY();
7348
7349 for(u8ii = 0; u8ii < ((MS_U8)TSP_VQ_NUM); u8ii++)
7350 {
7351 HAL_TSP_VQueue_OverflowInt_En(u8ii, bEnable);
7352 }
7353
7354 _TSP_RETURN(DRVTSP_OK);
7355 }
7356
7357 //-------------------------------------------------------------------------------------------------
7358 /// Set Virtual Quere request threshold
7359 /// @param u8req_len \b IN: Request length
7360 /// @return TSP_Result
7361 /// @note
7362 //-------------------------------------------------------------------------------------------------
MDrv_TSP_Set_VQ_Threshold(MS_U8 u8req_len)7363 TSP_Result MDrv_TSP_Set_VQ_Threshold(MS_U8 u8req_len)
7364 {
7365 _TSP_ENTRY();
7366 HAL_TSP_Set_Req_VQ_RX_Threshold(u8req_len);
7367 _TSP_RETURN(DRVTSP_OK);
7368 }
7369
7370 //-------------------------------------------------------------------------------------------------
7371 /// Get Virtual Quere Status
7372 /// @param pu32Status \b IN: Pointer to store Virtual Queue status.
7373 /// @return TSP_Result
7374 //-------------------------------------------------------------------------------------------------
MDrv_TSP_Get_VQStatus(MS_U32 * pu32Status)7375 TSP_Result MDrv_TSP_Get_VQStatus(MS_U32* pu32Status)
7376 {
7377 _TSP_ENTRY();
7378 *pu32Status = HAL_TSP_Get_VQStatus();
7379 _TSP_RETURN(DRVTSP_OK);
7380 }
7381
7382 //-------------------------------------------------------------------------------------------------
7383 /// Select MOBF key
7384 /// @param u8Model \b IN: MOBF path select. 0: File, 1: PVR1, 2: PVR2
7385 /// @param u8MobfIndex0 \b IN: Select key index of ring buffer 0
7386 /// @param u8MobfIndex1 \b IN: Select key index of ring buffer 1
7387 /// @return TSP_Result
7388 /// @note
7389 //-------------------------------------------------------------------------------------------------
7390 // Model : 0 -> File, 1 -> PVR1, 2 -> PVR2
7391 // u8MobfIndex0: 0 -> Disable, 1~31
7392 // u8MobfIndex1: 0 -> Disable, 1~31
MDrv_TSP_Set_MOBF_Set(MS_U8 u8Model,MS_U8 u8MobfIndex0,MS_U8 u8MobfIndex1)7393 TSP_Result MDrv_TSP_Set_MOBF_Set(MS_U8 u8Model, MS_U8 u8MobfIndex0, MS_U8 u8MobfIndex1)
7394 {
7395 _TSP_ENTRY();
7396 HAL_TSP_MOBF_Select(u8Model, u8MobfIndex0, u8MobfIndex1);
7397 _TSP_RETURN(DRVTSP_OK);
7398 }
7399
MDrv_TSP_FLT_LiveSrcSwitch(DrvTSP_FltType eFltSrcType)7400 TSP_Result MDrv_TSP_FLT_LiveSrcSwitch(DrvTSP_FltType eFltSrcType)
7401 {
7402 return DRVTSP_FAIL;
7403 }
7404
7405 //-------------------------------------------------------------------------------------------------
7406 /// Hardware general config for driver interface
7407 /// @param u32Cmd \b IN: commend
7408 /// @param u32Config0 \b IN: configure value
7409 /// @param u32Config1 \b IN: configure value
7410 /// @param pData \b IN: pointer to store input data
7411 /// @return DMX_FILTER_STATUS_OK - Success
7412 /// @return DMX_FILTER_STATUS_ERROR - Failure
7413 /// @note
7414 //-------------------------------------------------------------------------------------------------
MDrv_TSP_CMD_Run(MS_U32 u32Cmd,MS_U32 u32Config0,MS_U32 u32Config1,void * pData)7415 TSP_Result MDrv_TSP_CMD_Run(MS_U32 u32Cmd, MS_U32 u32Config0, MS_U32 u32Config1 ,void *pData)
7416 {
7417 if(u32Cmd == DRVTSP_CMD_STC_ADJUST_UNIT)
7418 {
7419 _ptsp_res->_u32StcAdjustUnit = u32Config0;
7420 return DRVTSP_OK;
7421 }
7422 else if(u32Cmd == DRVTSP_CMD_SET_LIB_MODE)
7423 {
7424 _u32LibMode = u32Config0;
7425 HAL_TSP_CMD_Run(u32Cmd, u32Config0, u32Config1,pData);
7426 return DRVTSP_OK;
7427 }
7428 else
7429 {
7430 _TSP_ENTRY();
7431 if(HAL_TSP_CMD_Run(u32Cmd, u32Config0, u32Config1,pData))
7432 {
7433 _TSP_RETURN(DRVTSP_OK);
7434 }
7435 else
7436 {
7437 _TSP_RETURN(DRVTSP_FAIL);
7438 }
7439 }
7440 }
7441
7442 //-------------------------------------------------------------------------------------------------
7443 /// Get the PES scrambling control status
7444 /// @param u32FltId \b IN: filter id
7445 /// @param pu8status \b OUT: pointer to store PES scrambled statis. Every bit indicates one status of one packet.
7446 /// @return TSP_Result
7447 /// @note
7448 //-------------------------------------------------------------------------------------------------
MDrv_TSP_GetPesScmbSts(MS_U32 u32FltId,MS_U8 * pu8status)7449 TSP_Result MDrv_TSP_GetPesScmbSts(MS_U32 u32FltId, MS_U8 *pu8status)
7450 {
7451 _TSP_ENTRY();
7452 *pu8status = HAL_TSP_Get_PesScmb_Sts(u32FltId);
7453 _TSP_RETURN(DRVTSP_OK);
7454 }
7455
7456 //-------------------------------------------------------------------------------------------------
7457 /// Get the TS header scrambling control status
7458 /// @param u8FltId \b IN: filter id
7459 /// @param pu8status \b OUT: pointer to store TS scrambled statis. Every bit indicates one status of one packet.
7460 /// @note
7461 //-------------------------------------------------------------------------------------------------
MDrv_TSP_GetTsScmbSts(MS_U32 u32FltId,MS_U8 * pu8status)7462 TSP_Result MDrv_TSP_GetTsScmbSts(MS_U32 u32FltId, MS_U8 *pu8status)
7463 {
7464 _TSP_ENTRY();
7465 *pu8status = HAL_TSP_Get_TsScmb_Sts(u32FltId);
7466 _TSP_RETURN(DRVTSP_OK);
7467 }
7468
MDrv_TSP_SetFwDataAddr(MS_PHY phyDataAddr,MS_U32 u32Size)7469 TSP_Result MDrv_TSP_SetFwDataAddr(MS_PHY phyDataAddr, MS_U32 u32Size)
7470 {
7471 TSP_ASSERT((phyDataAddr & _TSP_QMEM_D_MASK),
7472 TSP_DBG("[TSP_ERROR][%06d] setFwDataAddr 0x%x <= 0x%x\n", __LINE__,(unsigned int)phyDataAddr, (unsigned int)(~_TSP_QMEM_D_MASK)));
7473
7474 _TSP_ENTRY();
7475
7476 HAL_TSP_OrzWriteProtect_Enable(TRUE, phyDataAddr, phyDataAddr+u32Size);
7477 HAL_TSP_SecFlt_SetDataAddr(phyDataAddr);
7478
7479 _ptsp_res->_phyTspFWDramBuf = phyDataAddr;
7480 _ptsp_res->_u32TspFwDramBufSize = u32Size;
7481
7482 _TSP_RETURN(DRVTSP_OK);
7483 }
7484
MDrv_TSP_FQ_FltNullPkt(MS_U32 u32FQEng,MS_BOOL bFltNull)7485 TSP_Result MDrv_TSP_FQ_FltNullPkt(MS_U32 u32FQEng, MS_BOOL bFltNull)
7486 {
7487 // not Implement
7488 return DRVTSP_OK;
7489 }
7490
7491 //FQ Src Switch
MDrv_TSP_FQ_SetMuxSwitch(MS_U32 u32FQEng,DrvFQ_SrcIf eTsSrc)7492 TSP_Result MDrv_TSP_FQ_SetMuxSwitch(MS_U32 u32FQEng, DrvFQ_SrcIf eTsSrc)
7493 {
7494 MS_U32 u32FQSrc = 0;
7495 MS_U32 u32Ret = DRVTSP_OK;
7496 MS_U32 u32MapingFQEng = u32FQEng;
7497
7498 TSP_ASSERT((u32FQEng < TSP_FIQ_NUM),
7499 TSP_DBG("[TSP_ERROR][%06d] Bad engin id(%d)\n", __LINE__, (int)u32FQEng));
7500
7501
7502 _TSP_ENTRY();
7503
7504 switch(eTsSrc)
7505 {
7506 case E_DRVFQ_SRC_TSIF0:
7507 u32FQSrc = 0;
7508 break;
7509 case E_DRVFQ_SRC_TSIF1:
7510 u32FQSrc = 1;
7511 break;
7512 case E_DRVFQ_SRC_TSIF2:
7513 u32FQSrc = 2;
7514 break;
7515 case E_DRVFQ_SRC_TSIF3:
7516 u32FQSrc = 3;
7517 break;
7518 case E_DRVFQ_SRC_TSIFFI:
7519 u32FQSrc = 7;
7520 break;
7521 default:
7522 _TSP_RETURN(DRVTSP_FAIL);
7523 }
7524
7525 if(!HAL_FQ_SetMuxSwitch(u32MapingFQEng,u32FQSrc))
7526 u32Ret = DRVTSP_FAIL;
7527
7528 _TSP_RETURN(u32Ret);
7529 }
7530
MDrv_TSP_FQ_GetMuxSwitch(MS_U32 u32FQEng,DrvFQ_SrcIf * peTsSrc)7531 TSP_Result MDrv_TSP_FQ_GetMuxSwitch(MS_U32 u32FQEng, DrvFQ_SrcIf* peTsSrc)
7532 {
7533 MS_U32 u32FQSrc = 0xFF;
7534 MS_U32 u32Ret = DRVTSP_OK;
7535 MS_U32 u32MapingFQEng = u32FQEng;
7536
7537 TSP_ASSERT((u32FQEng < TSP_FIQ_NUM),
7538 TSP_DBG("[TSP_ERROR][%06d] Bad engin id(%d)\n", __LINE__, (int)u32FQEng));
7539
7540 _TSP_ENTRY();
7541
7542 u32FQSrc = HAL_FQ_GetMuxSwitch(u32MapingFQEng);
7543
7544 switch(u32FQSrc)
7545 {
7546 case 0:
7547 *peTsSrc = E_DRVFQ_SRC_TSIF0;
7548 break;
7549 case 1:
7550 *peTsSrc = E_DRVFQ_SRC_TSIF1;
7551 break;
7552 case 2:
7553 *peTsSrc = E_DRVFQ_SRC_TSIF2;
7554 break;
7555 case 3:
7556 *peTsSrc = E_DRVFQ_SRC_TSIF3;
7557 break;
7558 case 7:
7559 *peTsSrc = E_DRVFQ_SRC_TSIFFI;
7560 break;
7561 default:
7562 *peTsSrc = 0xFF;
7563 _TSP_RETURN(DRVTSP_FAIL);
7564 }
7565
7566 _TSP_RETURN(u32Ret);
7567 }
7568
7569 // -------------------------------------------------------------
7570 // Debug table
7571 // -------------------------------------------------------------
7572 #ifdef DEBUG_TABLE_SUPPORT
MDrv_TSP_Get_DisContiCnt(DrvTSP_DisContiCnt_info * tspInfo,MS_U32 * pu32Cnt)7573 TSP_Result MDrv_TSP_Get_DisContiCnt(DrvTSP_DisContiCnt_info* tspInfo, MS_U32* pu32Cnt)
7574 {
7575 TSP_DisconPktCnt_Info TspDisContiCntInfo;
7576
7577 _TSP_ENTRY();
7578
7579 memset(&TspDisContiCntInfo, 0, sizeof(TSP_DisconPktCnt_Info));
7580 TspDisContiCntInfo.TspCmd = tspInfo->TspCmd;
7581 TspDisContiCntInfo.TspFifo = tspInfo->TspFifo;
7582 TspDisContiCntInfo.TspSrc = tspInfo->TspSrc;
7583
7584 *pu32Cnt = HAL_TSP_Get_DisContiCnt(&TspDisContiCntInfo);
7585
7586 _TSP_RETURN(DRVTSP_OK);
7587 }
7588
MDrv_TSP_Get_DropPktCnt(DrvTSP_DropPktCnt_info * tspInfo,MS_U32 * pu32Cnt)7589 TSP_Result MDrv_TSP_Get_DropPktCnt(DrvTSP_DropPktCnt_info* tspInfo, MS_U32* pu32Cnt)
7590 {
7591 TSP_DropPktCnt_Info TspDropPktCntInfo;
7592
7593 _TSP_ENTRY();
7594
7595 memset(&TspDropPktCntInfo, 0, sizeof(TSP_DisconPktCnt_Info));
7596 TspDropPktCntInfo.TspCmd = tspInfo->TspCmd;
7597 TspDropPktCntInfo.TspFifo = tspInfo->TspFifo;
7598 TspDropPktCntInfo.TspSrc = tspInfo->TspSrc;
7599
7600 *pu32Cnt = HAL_TSP_Get_DropPktCnt(&TspDropPktCntInfo);
7601
7602 _TSP_RETURN(DRVTSP_OK);
7603 }
7604
MDrv_TSP_Get_LockPktCnt(DrvTSP_LockPktCnt_info * tspInfo,MS_U32 * pu32Cnt)7605 TSP_Result MDrv_TSP_Get_LockPktCnt(DrvTSP_LockPktCnt_info* tspInfo, MS_U32* pu32Cnt)
7606 {
7607 TSP_LockPktCnt_info TspLockCntInfo;
7608
7609 _TSP_ENTRY();
7610
7611 memset(&TspLockCntInfo, 0, sizeof(TSP_LockPktCnt_info));
7612 TspLockCntInfo.TspCmd = tspInfo->TspCmd;
7613 TspLockCntInfo.TspTsif = tspInfo->TspTsif;
7614
7615 *pu32Cnt = HAL_TSP_Get_LockPktCnt(&TspLockCntInfo);
7616
7617 _TSP_RETURN(DRVTSP_OK);
7618 }
7619
MDrv_TSP_Get_AVPktCnt(DrvTSP_AVPktCnt_info * tspInfo,MS_U32 * pu32Cnt)7620 TSP_Result MDrv_TSP_Get_AVPktCnt(DrvTSP_AVPktCnt_info* tspInfo, MS_U32* pu32Cnt)
7621 {
7622 TSP_AVPktCnt_info TspAVCntInfo;
7623
7624 _TSP_ENTRY();
7625
7626 memset(&TspAVCntInfo, 0, sizeof(TSP_AVPktCnt_info));
7627 TspAVCntInfo.TspCmd = tspInfo->TspCmd;
7628 TspAVCntInfo.TspFifo = tspInfo->TspFifo;
7629 TspAVCntInfo.TspFifoSrc = tspInfo->TspFifoSrc;
7630
7631 *pu32Cnt = HAL_TSP_GetAVPktCnt(&TspAVCntInfo);
7632
7633 _TSP_RETURN(DRVTSP_OK);
7634 }
7635 #endif
7636
7637 //-------------------------------------------------------------------------------------------------
7638 /// Get TEI Section error Packet count
7639 /// @param FltSrc \b IN: Filter source of packet
7640 /// @param pu32PktCnt \b OUT: pointer to store TEI packet count value
7641 /// @note
7642 //-------------------------------------------------------------------------------------------------
MDrv_TSP_Get_SecTEI_PktCount(DrvTSP_FltType FltSrc,MS_U32 * pu32PktCnt)7643 TSP_Result MDrv_TSP_Get_SecTEI_PktCount(DrvTSP_FltType FltSrc, MS_U32* pu32PktCnt)
7644 {
7645 _TSP_ENTRY();
7646 if(FltSrc == E_DRVTSP_FLT_SOURCE_TYPE_FILE)
7647 {
7648 *pu32PktCnt = HAL_TSP_Get_SecTEI_PktCount(1);
7649 }
7650 else
7651 {
7652 *pu32PktCnt = HAL_TSP_Get_SecTEI_PktCount(0);
7653 }
7654
7655 _TSP_RETURN(DRVTSP_OK);
7656 }
7657
7658 //-------------------------------------------------------------------------------------------------
7659 /// Reset Section TEI error Packet count
7660 /// @param FltSrc \b IN: Filter source of packet
7661 /// @note
7662 //-------------------------------------------------------------------------------------------------
MDrv_TSP_Reset_SecTEI_PktCount(DrvTSP_FltType FltSrc)7663 TSP_Result MDrv_TSP_Reset_SecTEI_PktCount(DrvTSP_FltType FltSrc)
7664 {
7665 _TSP_ENTRY();
7666 if(FltSrc == E_DRVTSP_FLT_SOURCE_TYPE_FILE)
7667 {
7668 HAL_TSP_Reset_SecTEI_PktCount(1);
7669 }
7670 else
7671 {
7672 HAL_TSP_Reset_SecTEI_PktCount(0);
7673 }
7674
7675 _TSP_RETURN(DRVTSP_OK);
7676 }
7677
7678 //-------------------------------------------------------------------------------------------------
7679 /// Get Section Dis-continuity Packet count
7680 /// @param u32FltID \b IN: Filter source of packet
7681 /// @param pu32PktCnt \b OUT: pointer to store Dis-continuity packet count value
7682 /// @note
7683 //-------------------------------------------------------------------------------------------------
MDrv_TSP_Get_SecDisCont_PktCount(MS_U32 u32FltID,MS_U32 * pu32PktCnt)7684 TSP_Result MDrv_TSP_Get_SecDisCont_PktCount(MS_U32 u32FltID, MS_U32* pu32PktCnt)
7685 {
7686 _TSP_ENTRY();
7687 *pu32PktCnt = HAL_TSP_Get_SecDisCont_PktCount(u32FltID);
7688 _TSP_RETURN(DRVTSP_OK);
7689 }
7690
7691 //-------------------------------------------------------------------------------------------------
7692 /// Reset Section Dis-continuity Packet count
7693 /// @param u32FltID \b IN: Filter source of packet
7694 /// @note
7695 //-------------------------------------------------------------------------------------------------
MDrv_TSP_Reset_SecDisCont_PktCount(MS_U32 u32FltID)7696 TSP_Result MDrv_TSP_Reset_SecDisCont_PktCount(MS_U32 u32FltID)
7697 {
7698 _TSP_ENTRY();
7699 HAL_TSP_Reset_SecDisCont_PktCount(u32FltID);
7700 _TSP_RETURN(DRVTSP_OK);
7701 }
7702
7703
7704
7705 //-------------------------------------------------------------------------------------------------
7706 /// Scramble mask- enable mask of fifo/pvr for scramble stream
7707 /// @return TSP_Result
7708 /// @note
7709 //-------------------------------------------------------------------------------------------------
MDrv_TSP_DropScmbPkt(DrvTSP_FltType eFilterType,MS_BOOL bEnable)7710 TSP_Result MDrv_TSP_DropScmbPkt(DrvTSP_FltType eFilterType, MS_BOOL bEnable)
7711 {
7712 _TSP_ENTRY();
7713 switch (eFilterType)
7714 {
7715 case E_DRVTSP_FLT_TYPE_VIDEO:
7716 HAL_TSP_DropScmbPkt(0, bEnable);
7717 break;
7718 case E_DRVTSP_FLT_TYPE_AUDIO:
7719 HAL_TSP_DropScmbPkt(1, bEnable);
7720 break;
7721 case E_DRVTSP_FLT_TYPE_AUDIO2:
7722 HAL_TSP_DropScmbPkt(2, bEnable);
7723 break;
7724 case E_DRVTSP_FLT_TYPE_VIDEO3D:
7725 HAL_TSP_DropScmbPkt(3, bEnable);
7726 break;
7727 case E_DRVTSP_FLT_TYPE_AUDIO3:
7728 HAL_TSP_DropScmbPkt(4, bEnable);
7729 break;
7730 case E_DRVTSP_FLT_TYPE_AUDIO4:
7731 HAL_TSP_DropScmbPkt(5, bEnable);
7732 break;
7733 case E_DRVTSP_FLT_TYPE_PVR:
7734 HAL_TSP_DropScmbPkt(6, bEnable);
7735 break;
7736 case E_DRVTSP_FLT_TYPE_PVR1:
7737 HAL_TSP_DropScmbPkt(7, bEnable);
7738 break;
7739 default:
7740 _TSP_RETURN(DRVTSP_FAIL);
7741 }
7742 _TSP_RETURN(DRVTSP_OK);
7743 }
7744
7745
7746 //-------------------------------------------------------------------------------------------------
7747 ///Set or Get merge stream sync byte
7748 /// @param eIf \b IN: Eunm value of TSP TSIF selection
7749 /// @param u8StrId \b IN: Stream index
7750 /// @param pu8SyncByte \b IN: Pointer to store sync byte of merege streams
7751 /// @param bSet \b IN: TRUE to setting data or FALSE to getting table
7752 /// @return DRVTSP_OK - Success
7753 /// @return DRVTSP_FAIL - Failure
7754 /// @note: Currently, maxmum number is 8, and don't call this API when stream processing is started
7755 //-------------------------------------------------------------------------------------------------
MDrv_TSP_MStr_SyncByte(DrvTSP_If eIf,MS_U8 u8StrId,MS_U8 * pu8SyncByte,MS_BOOL bSet)7756 TSP_Result MDrv_TSP_MStr_SyncByte(DrvTSP_If eIf, MS_U8 u8StrId, MS_U8* pu8SyncByte, MS_BOOL bSet)
7757 {
7758 #ifdef MERGE_STR_SUPPORT
7759 MS_U8 u8Path = 0;
7760
7761 switch(eIf)
7762 {
7763 case E_DRVTSP_IF_TS0:
7764 u8Path = TSP_SRC_FROM_TSIF0_LIVE;
7765 break;
7766 case E_DRVTSP_IF_TS1:
7767 u8Path = TSP_SRC_FROM_TSIF1;
7768 break;
7769 case E_DRVTSP_IF_TS2:
7770 u8Path = TSP_SRC_FROM_TSIF2;
7771 break;
7772 case E_DRVTSP_IF_FI:
7773 u8Path = TSP_SRC_FROM_TSIF0_FILE;
7774 break;
7775 default:
7776 return DRVTSP_FAIL;
7777 }
7778
7779 _TSP_ENTRY();
7780 if(HAL_TSP_Set_Sync_Byte(u8Path, u8StrId, pu8SyncByte, bSet) == FALSE)
7781 {
7782 _TSP_RETURN(DRVTSP_FAIL);
7783 }
7784 _TSP_RETURN(DRVTSP_OK);
7785
7786 #else
7787
7788 return DRVTSP_FAIL;
7789 #endif
7790 }
7791
7792 //for kernel mode multiple process support, create eventid of callback thread of user mode in fitst time
7793 #ifdef DMX_UTOPIA_2K
7794 static char tspevt_name[] = "tspevt";
7795 #endif
MDrv_TSP_Create_IoSignal(DrvTSP_IoSignal * pstIoSignal)7796 TSP_Result MDrv_TSP_Create_IoSignal(DrvTSP_IoSignal *pstIoSignal)
7797 {
7798 #ifdef DMX_UTOPIA_2K
7799 MS_U32 u32ii = 0;
7800
7801 for(u32ii = 0; u32ii < TSP_MAX_PVRSIGFLAG_NUM; u32ii++)
7802 {
7803 pstIoSignal->u32PvrBufFullFlag[u32ii] = 0;
7804 }
7805 for(u32ii = 0; u32ii < TSP_MAX_SIGFLAG_NUM; u32ii++)
7806 {
7807 pstIoSignal->u32SecRdyFlag[u32ii] = 0;
7808 pstIoSignal->u32SecOvfFlag[u32ii] = 0;
7809 }
7810
7811 if(pstIoSignal->s32KerModeTspEvtId == -1)
7812 {
7813 if((pstIoSignal->s32KerModeTspEvtId = OSAL_TSP_EventCreate((MS_U8*)tspevt_name)) != -1)
7814 {
7815 for(u32ii = 0; u32ii < DRVTSP_MAX_PROCESS_NUM; u32ii++)
7816 {
7817 if((_u32KPrcEvtTblUseFlag & (1 << u32ii)) == 0)
7818 {
7819 pstIoSignal->u32TblIndex = u32ii;
7820 #ifdef MSOS_TYPE_LINUX_KERNEL
7821 _stKModePrcEvtTbl[u32ii].tgid = current->tgid;
7822 #endif
7823 _stKModePrcEvtTbl[u32ii].s32TspEvtId = pstIoSignal->s32KerModeTspEvtId;
7824 _u32KPrcEvtTblUseFlag |= (1 << u32ii);
7825 break;
7826 }
7827 }
7828
7829 //printf("[%s][%d] _u32KPrcEvtTblUseFlag %x , s32TspEvtId %x \n", __FUNCTION__, __LINE__, (int)_u32KPrcEvtTblUseFlag, (int)pstIoSignal->s32KerModeTspEvtId);
7830
7831 return DRVTSP_OK;
7832 }
7833 else
7834 {
7835 return DRVTSP_FAIL;
7836 }
7837 }
7838
7839 return DRVTSP_OK;
7840 #else
7841 return DRVTSP_NOT_SUPPORTED;
7842 #endif
7843 }
7844
7845 // Send free event to end user mode callback thread, and delete event id
MDrv_TSP_Close_IoSignal(DrvTSP_IoSignal * pstIoSignal)7846 TSP_Result MDrv_TSP_Close_IoSignal(DrvTSP_IoSignal *pstIoSignal)
7847 {
7848 #ifdef DMX_UTOPIA_2K
7849
7850 #ifdef MSOS_TYPE_LINUX_KERNEL
7851 MS_U32 u32ii = 0;
7852
7853 pstIoSignal->s32KerModeTspEvtId = -1;
7854 for(u32ii = 0; u32ii < DRVTSP_MAX_PROCESS_NUM; u32ii++)
7855 {
7856 if((_u32KPrcEvtTblUseFlag & (1 << u32ii)) != 0)
7857 {
7858 if(_stKModePrcEvtTbl[u32ii].tgid == current->tgid)
7859 {
7860 pstIoSignal->s32KerModeTspEvtId = _stKModePrcEvtTbl[u32ii].s32TspEvtId;
7861 break;
7862 }
7863 }
7864 }
7865 if(pstIoSignal->s32KerModeTspEvtId == -1)
7866 return DRVTSP_FAIL;
7867 #else
7868 pstIoSignal->s32KerModeTspEvtId = _s32TspEventId;
7869 #endif
7870
7871 //printf("%s][%d] s32KerModeTspEvtId %x\n", __FUNCTION__, __LINE__, (int)pstIoSignal->s32KerModeTspEvtId);
7872
7873 //to free CB process task, so send one event
7874 _db_flag = 1;
7875 _TSP_SetEvent(pstIoSignal->s32KerModeTspEvtId, TSP_TASK_EVENT_FLT_FREE);
7876 MsOS_DelayTask(3);
7877
7878 while(_db_flag != 2)
7879 {
7880 _TSP_SetEvent(pstIoSignal->s32KerModeTspEvtId, TSP_TASK_EVENT_FLT_FREE);
7881 MsOS_DelayTask(3);
7882 }
7883
7884 while(OSAL_TSP_EventDelete(pstIoSignal->s32KerModeTspEvtId) == FALSE)
7885 {
7886 _TSP_SetEvent(pstIoSignal->s32KerModeTspEvtId, TSP_TASK_EVENT_FLT_FREE);
7887 printf("Waiting for evet deleting... \n");
7888 MsOS_DelayTask(3);
7889 }
7890 pstIoSignal->s32KerModeTspEvtId = -1;
7891
7892 #ifdef MSOS_TYPE_LINUX_KERNEL
7893 _u32KPrcEvtTblUseFlag &= ~(1 << u32ii);
7894 _stKModePrcEvtTbl[u32ii].s32TspEvtId = -1;
7895 _stKModePrcEvtTbl[u32ii].tgid = 0;
7896 #endif
7897
7898 #endif
7899
7900 return DRVTSP_OK;
7901 }
7902
7903 //-------------------------------------------------------------------------------------------------------
7904 // Refer to _TSP_Isr_ProcSelf, this is for user mode to getting events when using kernel dmx driver
7905 // Plese update both _TSP_Isr_ProcSelf & MDrv_TSP_Get_IoSignal at the same time for synchrony ISR evets processing flow
7906 //-------------------------------------------------------------------------------------------------------
MDrv_TSP_Wait_IoSignal(DrvTSP_IoSignal * pstIoSignal)7907 TSP_Result MDrv_TSP_Wait_IoSignal(DrvTSP_IoSignal *pstIoSignal)
7908 {
7909 #ifdef DMX_UTOPIA_2K
7910 MS_U32 u32ii, u32Evt = 0;
7911 MS_S32 s32Res = 0;
7912
7913 for(u32ii = 0; u32ii < TSP_MAX_PVRSIGFLAG_NUM; u32ii++)
7914 {
7915 pstIoSignal->u32PvrBufFullFlag[u32ii] = 0;
7916 }
7917 for(u32ii = 0; u32ii < TSP_MAX_SIGFLAG_NUM; u32ii++)
7918 {
7919 pstIoSignal->u32SecRdyFlag[u32ii] = 0;
7920 pstIoSignal->u32SecOvfFlag[u32ii] = 0;
7921 }
7922
7923 if((s32Res = MsOS_WaitEvent_Interrupt(pstIoSignal->s32KerModeTspEvtId, TSP_TASK_EVENT_GROUP_SELF|TSP_TASK_EVENT_FLT_FREE, &u32Evt, E_OR_CLEAR, MSOS_WAIT_FOREVER)) <= 0)
7924 {
7925 pstIoSignal->u32TspEvt = 0;
7926
7927 if(s32Res < 0)
7928 return DRVTSP_FUNC_ERROR;
7929 else
7930 return DRVTSP_FAIL;
7931 }
7932
7933 if((_db_flag == 1) && (u32Evt & TSP_TASK_EVENT_FLT_FREE))
7934 _db_flag = 2;
7935
7936 pstIoSignal->u32TspEvt = u32Evt;
7937 //printf("TSP", "u32TspEvt %lx\n", pstIoSignal->u32TspEvt);
7938
7939 #endif //end of MSOS_TYPE_LINUX_KERNEL
7940
7941 return DRVTSP_OK;
7942 }
7943
MDrv_TSP_Proc_IoSignal(DrvTSP_IoSignal * pstIoSignal)7944 TSP_Result MDrv_TSP_Proc_IoSignal(DrvTSP_IoSignal *pstIoSignal)
7945 {
7946
7947 #ifdef DMX_UTOPIA_2K
7948 TSP_Result Ret = DRVTSP_OK;
7949 MS_U32 u32ii;
7950 MS_U32 u32GroupNum = (TSP_SECFLT_NUM + 31UL) >> 5UL;
7951 OSAL_TSP_ProcTypeParam Data;
7952
7953 Data.u32FltId = 0xFFFFFFFFUL;
7954 Data.pRet = (void*)&Ret;
7955 Data.bInfiniteWait = TRUE;
7956 Data.bFromTask = TRUE;
7957 Data.u32PrcEvt = TSP_TASK_EVENT_FLT_FREE;
7958
7959 if(pstIoSignal->u32TspEvt & TSP_TASK_EVENT_FLT_FREE)
7960 {
7961 _TSP_Isr_ProcSelf(&Data);
7962 pstIoSignal->u32TspEvt &= ~TSP_TASK_EVENT_FLT_FREE;
7963 }
7964
7965 #ifndef NO_PVR
7966 // set PVR buffer events
7967 if (pstIoSignal->u32TspEvt & (TSP_TASK_EVENT_PVR0_RDY_POLL|TSP_TASK_EVENT_PVR1_RDY_POLL|TSP_TASK_EVENT_PVR0_RDY_SELF|TSP_TASK_EVENT_PVR1_RDY_SELF))
7968 {
7969 if (_ptsp_res->_PvrEvtNotify[0] && _ptsp_res->_PvrCallback[0])
7970 {
7971 switch(pstIoSignal->u32TspEvt & (TSP_TASK_EVENT_PVR0_RDY_POLL | TSP_TASK_EVENT_PVR1_RDY_POLL | TSP_TASK_EVENT_PVR0_RDY_SELF | TSP_TASK_EVENT_PVR1_RDY_SELF))
7972 {
7973 case TSP_TASK_EVENT_PVR0_RDY_SELF:
7974 case TSP_TASK_EVENT_PVR0_RDY_POLL:
7975 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[0], E_DRVTSP_EVENT_PVRBUF_FULL))
7976 {
7977 pstIoSignal->u32PvrBufFullFlag[0] = 1UL;
7978 }
7979 break;
7980 case TSP_TASK_EVENT_PVR1_RDY_SELF:
7981 case TSP_TASK_EVENT_PVR1_RDY_POLL:
7982 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[0], E_DRVTSP_EVENT_PVRBUF_FULL))
7983 {
7984 pstIoSignal->u32PvrBufFullFlag[0] |= 2UL;
7985 }
7986 break;
7987 case (TSP_TASK_EVENT_PVR0_RDY_SELF | TSP_TASK_EVENT_PVR1_RDY_SELF):
7988 case (TSP_TASK_EVENT_PVR0_RDY_POLL | TSP_TASK_EVENT_PVR1_RDY_POLL):
7989 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[0], E_DRVTSP_EVENT_PVRBUF_OVERFLOW))
7990 {
7991 pstIoSignal->u32PvrBufFullFlag[0] = 0xFFUL;
7992 }
7993 break;
7994 default:
7995 break;
7996 }
7997 }
7998 }
7999
8000 #if (TSP_PVR_IF_NUM > 1)
8001 if (pstIoSignal->u32TspEvt & (TSP_TASK_EVENT_PVR2PVR0_RDY_POLL|TSP_TASK_EVENT_PVR2PVR1_RDY_POLL|TSP_TASK_EVENT_PVR2PVR0_RDY_SELF|TSP_TASK_EVENT_PVR2PVR1_RDY_SELF))
8002 {
8003 if (_ptsp_res->_PvrEvtNotify[1] && _ptsp_res->_PvrCallback[1])
8004 {
8005 switch (pstIoSignal->u32TspEvt & (TSP_TASK_EVENT_PVR2PVR0_RDY_POLL|TSP_TASK_EVENT_PVR2PVR1_RDY_POLL|TSP_TASK_EVENT_PVR2PVR0_RDY_SELF|TSP_TASK_EVENT_PVR2PVR1_RDY_SELF))
8006 {
8007 case TSP_TASK_EVENT_PVR2PVR0_RDY_SELF:
8008 case TSP_TASK_EVENT_PVR2PVR0_RDY_POLL:
8009 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[1], E_DRVTSP_EVENT_PVRBUF_FULL))
8010 {
8011 pstIoSignal->u32PvrBufFullFlag[1] = 1UL;
8012 }
8013 break;
8014 case TSP_TASK_EVENT_PVR2PVR1_RDY_SELF:
8015 case TSP_TASK_EVENT_PVR2PVR1_RDY_POLL:
8016 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[1], E_DRVTSP_EVENT_PVRBUF_FULL))
8017 {
8018 pstIoSignal->u32PvrBufFullFlag[1] = 2UL;
8019 }
8020 break;
8021 case (TSP_TASK_EVENT_PVR2PVR0_RDY_SELF | TSP_TASK_EVENT_PVR2PVR1_RDY_SELF):
8022 case (TSP_TASK_EVENT_PVR2PVR0_RDY_POLL | TSP_TASK_EVENT_PVR2PVR1_RDY_POLL):
8023 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[1], E_DRVTSP_EVENT_PVRBUF_OVERFLOW))
8024 {
8025 pstIoSignal->u32PvrBufFullFlag[1] = 0xFFUL;
8026 }
8027 break;
8028 }
8029 }
8030 }
8031 #endif //endof TS2_IF_SUPPORT
8032
8033 #ifdef TS3_IF_SUPPORT
8034 if (pstIoSignal->u32TspEvt & (TSP_TASK_EVENT_CBPVR0_RDY_SELF|TSP_TASK_EVENT_CBPVR0_RDY_POLL))
8035 {
8036 if (_ptsp_res->_PvrEvtNotify[2] && _ptsp_res->_PvrCallback[2])
8037 {
8038 switch (pstIoSignal->u32TspEvt & (TSP_TASK_EVENT_CBPVR0_RDY_SELF | TSP_TASK_EVENT_CBPVR0_RDY_POLL))
8039 {
8040 case TSP_TASK_EVENT_CBPVR0_RDY_SELF:
8041 case TSP_TASK_EVENT_CBPVR0_RDY_POLL:
8042 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[2], E_DRVTSP_EVENT_PVRBUF_FULL))
8043 {
8044 pstIoSignal->u32PvrBufFullFlag[2] = 1UL;
8045 }
8046 break;
8047 }
8048 }
8049 #endif
8050
8051 #endif //end of NO_PVR
8052
8053 if (pstIoSignal->u32TspEvt & TSP_TASK_EVENT_SECTION_SELF)
8054 {
8055 for(u32ii = 0; u32ii < u32GroupNum; u32ii++)
8056 {
8057 MDrv_TSP_Get_SecEvents(u32ii, pstIoSignal);
8058 }
8059 }
8060
8061 #endif //end of MSOS_TYPE_LINUX_KERN
8062
8063 return DRVTSP_OK;
8064 }
8065
8066 TSP_Result MDrv_TSP_Get_SecEvents(MS_U32 u32Group, DrvTSP_IoSignal *pstIoSignal)
8067 {
8068 MS_U32 u32PidFltGroup = 0, u32SecFlt = 0, u32PidFlt = 0;
8069 MS_U32 u32RdyMask = 0, u32OvfMask = 0;
8070
8071 _TSP_GetModeSecRdy(u32Group, 0xFFFFFFFFUL, &u32RdyMask, OSAL_EVENT_OR_CLEAR);
8072 _TSP_GetModeSecOvf(u32Group, 0xFFFFFFFFUL, &u32OvfMask, OSAL_EVENT_OR_CLEAR);
8073 //pstIoSignal->u32SecRdyFlag[u32Group] = u32RdyMask;
8074 //pstIoSignal->u32SecOvfFlag[u32Group] = u32OvfMask;
8075
8076 //ULOGD("TSP", "[DMX] %ld , %lx, %lx \n", u32Group, u32RdyMask, u32OvfMask);
8077
8078 u32SecFlt = u32Group << 5UL;
8079 while(u32RdyMask)
8080 {
8081 if(u32RdyMask & 0x01UL)
8082 {
8083 if(_ptsp_res->_TspState[pstIoSignal->u32Eng].FltMap[u32SecFlt] != u32SecFlt)
8084 {
8085 for(u32PidFlt = 0UL; u32PidFlt < TSP_PIDFLT_NUM_ALL; u32PidFlt++)
8086 {
8087 if(_ptsp_res->_TspState[pstIoSignal->u32Eng].FltMap[u32PidFlt] == u32SecFlt)
8088 {
8089 break;
8090 }
8091 }
8092 }
8093 else
8094 {
8095 u32PidFlt = u32SecFlt;
8096 }
8097 if(u32PidFlt < TSP_PIDFLT_NUM_ALL)
8098 {
8099 if((_ptsp_res->_TspState[pstIoSignal->u32Eng].FltState[u32PidFlt] & E_DRVTSP_FLT_STATE_ENABLE)&&
8100 (_ptsp_res->_TspState[pstIoSignal->u32Eng].SecFltEvtNotify[u32SecFlt] & E_DRVTSP_EVENT_DATA_READY) &&
8101 (_ptsp_res->_TspState[pstIoSignal->u32Eng].SecFltCallback[u32SecFlt]))
8102 {
8103 u32PidFltGroup = u32PidFlt >> 5UL;
8104 pstIoSignal->u32SecRdyFlag[u32PidFltGroup] |= (1UL << (u32PidFlt & 0x1FUL));
8105 }
8106 }
8107 }
8108 u32RdyMask >>= 1UL;
8109 u32SecFlt++;
8110 }
8111
8112 u32SecFlt = u32Group << 5UL;
8113 while(u32OvfMask)
8114 {
8115 if(u32OvfMask & 0x01UL)
8116 {
8117 if(_ptsp_res->_TspState[pstIoSignal->u32Eng].FltMap[u32SecFlt] != u32SecFlt)
8118 {
8119 for(u32PidFlt = 0UL; u32PidFlt < TSP_PIDFLT_NUM_ALL; u32PidFlt++)
8120 {
8121 if(_ptsp_res->_TspState[pstIoSignal->u32Eng].FltMap[u32PidFlt] == u32SecFlt)
8122 {
8123 break;
8124 }
8125 }
8126 }
8127 else
8128 {
8129 u32PidFlt = u32SecFlt;
8130 }
8131 if(u32PidFlt < TSP_PIDFLT_NUM_ALL)
8132 {
8133 if(_ptsp_res->_TspState[pstIoSignal->u32Eng].FltState[u32PidFlt] & E_DRVTSP_FLT_STATE_ENABLE)
8134 {
8135 _TSP_IND_LOCK(); // disable overflow filter
8136 _TSP_PidFlt_Disable(pstIoSignal->u32Eng, u32PidFlt); // ???? move out --> OK // // critical section
8137 _TSP_IND_UNLOCK();
8138 }
8139 if ((_ptsp_res->_TspState[pstIoSignal->u32Eng].FltState[u32PidFlt] != E_DRVTSP_FLT_STATE_FREE) &&
8140 (_ptsp_res->_TspState[pstIoSignal->u32Eng].SecFltEvtNotify[u32SecFlt] & E_DRVTSP_EVENT_BUF_OVERFLOW) &&
8141 (_ptsp_res->_TspState[pstIoSignal->u32Eng].SecFltCallback[u32SecFlt]))
8142 {
8143 u32PidFltGroup = u32PidFlt >> 5UL;
8144 pstIoSignal->u32SecOvfFlag[u32PidFltGroup] |= (1UL << (u32PidFlt & 0x1FUL));
8145 }
8146 }
8147 }
8148 u32OvfMask >>= 1UL;
8149 u32SecFlt++;
8150 }
8151
8152 return DRVTSP_OK;
8153 }
8154
8155 #ifdef SECURE_PVR_ENABLE
8156
8157 TSP_Result MDrv_TSP_Ree_TeeCmdSystem_Init()
8158 {
8159 MDrv_SYS_ReadKernelCmdLine();
8160 MDrv_SYS_GetTEEInfo(&_ptsp_res->_teemode);
8161 //printf("[%s][%d] _teemode %x \n", __FUNCTION__, __LINE__, (int)_ptsp_res->_teemode.OsType);
8162
8163 //_ptsp_res->_teemode.OsType = SYS_TEEINFO_OSTYPE_OPTEE;
8164 if(_ptsp_res->_teemode.OsType == SYS_TEEINFO_OSTYPE_NUTTX)
8165 {
8166 if(_TSP_REE_RegisterMBX() == FALSE)
8167 {
8168 MS_DEBUG_MSG(TSP_DBG ("[%s] Register Mailbox failed!\n", __FUNCTION__));
8169 return DRVTSP_FAIL;
8170 }
8171 }
8172
8173 return DRVTSP_OK;
8174 }
8175
8176 TSP_Result MDrv_TSP_Ree_TeeCmdSystem_Exit()
8177 {
8178 _bTSPMbxInitFlag = FALSE;
8179 _u8TSPMbxMsgClass = 0;
8180
8181 return DRVTSP_OK;
8182 }
8183
8184 TSP_Result MDrv_TSP_Ree_SendTeeCmd(TSP_REE_TO_TEE_CMD_TYPE cmd_type, void* param, size_t datasize)
8185 {
8186 //printf("[%s][%d] OsType %x , cmd_type %x\n", __FUNCTION__, __LINE__, _ptsp_res->_teemode.OsType, (int)cmd_type);
8187 //printf("sizeof PHY %d \n", sizeof(MS_PHY));
8188
8189 if(_ptsp_res->_teemode.OsType == SYS_TEEINFO_OSTYPE_NUTTX)
8190 {
8191 if(_TSP_Ree_SendMBXMsg(cmd_type, param) == TRUE)
8192 return DRVTSP_OK;
8193 else
8194 return DRVTSP_FAIL;
8195 }
8196 else if(_ptsp_res->_teemode.OsType == SYS_TEEINFO_OSTYPE_OPTEE)
8197 {
8198 unsigned int ret, ret_orig= 0;
8199
8200 if ((ret = MDrv_SYS_TEEC_InitializeContext(_device, &mstar_teec_ctx)) != TEEC_SUCCESS)
8201 {
8202 printf("%s %d: Init Context failed, err code: %x\n",__FUNCTION__,__LINE__, (int)ret);
8203 return DRVTSP_FAIL;
8204 }
8205 if ((ret = MDrv_SYS_TEEC_Open(&mstar_teec_ctx, &session, &uuid, TEEC_LOGIN_PUBLIC, NULL, NULL, &ret_orig)) != TEEC_SUCCESS)
8206 {
8207 printf("%s %d: TEEC Open session failed, err code: %x\n",__FUNCTION__,__LINE__, (int)ret);
8208 return DRVTSP_FAIL;
8209 }
8210 if(datasize == 0)
8211 {
8212 op.paramTypes = TEEC_PARAM_TYPES(TEEC_NONE, TEEC_NONE,TEEC_NONE, TEEC_NONE);
8213 }
8214 else
8215 {
8216 op.params[0].tmpref.buffer = param;
8217 op.params[0].tmpref.size = datasize;
8218 op.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT, TEEC_NONE, TEEC_NONE, TEEC_NONE);
8219 }
8220
8221 if ((ret = MDrv_SYS_TEEC_InvokeCmd(&session, cmd_type, &op, &ret_orig)) != TEEC_SUCCESS)
8222 {
8223 printf("%s %d: TEEC Invoke command failed, err code: %x\n",__FUNCTION__,__LINE__, (int)ret);
8224 }
8225 MDrv_SYS_TEEC_Close(&session);
8226 MDrv_SYS_TEEC_FinalizeContext(&mstar_teec_ctx);
8227 if(ret == TEEC_SUCCESS)
8228 {
8229 return DRVTSP_OK;
8230 }
8231 }
8232
8233 return DRVTSP_FAIL;
8234 }
8235
8236 #endif //SECURE_PVR_ENABLE
8237