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Searched refs:GOP_BIT0 (Results 1 – 25 of 49) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/graphic/hal/kastor/gop/
H A DhalGOP.c302 if (u16GopMask&GOP_BIT0) in HAL_GOP_SetGOPACKMask()
370 HAL_GOP_Write16Reg(pGOPHalLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0); in HAL_GOP_SetGOPACK()
458 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_HW_USAGE, 0, GOP_BIT0); in HAL_GOP_Init()
461 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_H121, 0, GOP_BIT0); // HD alpha Enable in HAL_GOP_Init()
516 …HAL_GOP_Write16Reg(pGOPHalLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0); //Doubl… in HAL_GOP_Init()
531 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<0, GOP_BIT0|GOP_BIT1 );//GWI… in HAL_GOP_Init()
546 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCALPHA, GOP_BIT0, GOP_BIT0); in HAL_GOP_Init()
1341 if((u16Ret[0] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1345 else if((u16Ret[1] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1349 else if((u16Ret[2] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
[all …]
H A DregGOP.h232 #define CKG_GOPG0_DISABLE_CLK ~(GOP_BIT0)
233 #define CKG_GOPG0_DISABLE_CLK_MASK (GOP_BIT0)
257 #define CKG_GOPG2_DISABLE_CLK ~(GOP_BIT0)
258 #define CKG_GOPG2_DISABLE_CLK_MASK (GOP_BIT0)
270 #define CKG_GOPG4_DISABLE_CLK_MASK (GOP_BIT0)
271 #define CKG_GOPG4_DISABLE_CLK_MASK (GOP_BIT0)
289 #define CKG_SRAM0_DISABLE_CLK (GOP_BIT0)
291 #define CKG_SRAM0_MASK (GOP_BIT0|GOP_BIT1)
296 #define CKG_LB_SRAM1_DISABLE_CLK (GOP_BIT0) /*GOP1*/
303 #define CKG_AFBCCLK_DISABLE_CLK (GOP_BIT0)
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/curry/gop/
H A DhalGOP.c314 if (u16GopMask&GOP_BIT0) in HAL_GOP_SetGOPACKMask()
395 HAL_GOP_Write16Reg(pGOPHalLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0); in HAL_GOP_SetGOPACK()
476 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_HW_USAGE, 0, GOP_BIT0); in HAL_GOP_Init()
479 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_H121, 0, GOP_BIT0); // HD alpha Enable in HAL_GOP_Init()
544 …HAL_GOP_Write16Reg(pGOPHalLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0); //Doubl… in HAL_GOP_Init()
556 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<0, GOP_BIT0|GOP_BIT1 );//GWI… in HAL_GOP_Init()
568 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCALPHA, GOP_BIT0, GOP_BIT0); in HAL_GOP_Init()
1335 if((u16Ret[0] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1339 else if((u16Ret[1] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1343 else if((u16Ret[2] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
[all …]
H A DregGOP.h235 #define CKG_GOPG0_DISABLE_CLK ~(GOP_BIT0)
245 #define CKG_GOPG0_DISABLE_CLK_MASK (GOP_BIT0)
273 #define CKG_GOPG2_DISABLE_CLK ~(GOP_BIT0)
283 #define CKG_GOPG2_DISABLE_CLK_MASK (GOP_BIT0)
327 #define CKG_SRAM0_DISABLE_CLK (GOP_BIT0)
329 #define CKG_SRAM0_MASK (GOP_BIT0|GOP_BIT1)
334 #define CKG_LB_SRAM1_DISABLE_CLK (GOP_BIT0) /*GOP1*/
341 #define CKG_AFBCCLK_DISABLE_CLK (GOP_BIT0)
344 #define CKG_AFBCCLK_DISABLE_CLK_MASK (GOP_BIT0|GOP_BIT1|GOP_BIT2|GOP_BIT3)
778 #define GOP_MIXER_EN_VFIL_MASK GOP_BIT0
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/kano/gop/
H A DhalGOP.c313 if (u16GopMask&GOP_BIT0) in HAL_GOP_SetGOPACKMask()
381 HAL_GOP_Write16Reg(pGOPHalLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0); in HAL_GOP_SetGOPACK()
469 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_HW_USAGE, 0, GOP_BIT0); in HAL_GOP_Init()
532 …HAL_GOP_Write16Reg(pGOPHalLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0); //Doubl… in HAL_GOP_Init()
544 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<0, GOP_BIT0|GOP_BIT1 );//GWI… in HAL_GOP_Init()
555 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCALPHA, GOP_BIT0, GOP_BIT0); in HAL_GOP_Init()
1349 if((u16Ret[0] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1353 else if((u16Ret[1] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1357 else if((u16Ret[2] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1361 else if((u16Ret[3] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
[all …]
H A DregGOP.h234 #define CKG_GOPG0_DISABLE_CLK ~(GOP_BIT0)
244 #define CKG_GOPG0_DISABLE_CLK_MASK (GOP_BIT0)
272 #define CKG_GOPG2_DISABLE_CLK ~(GOP_BIT0)
282 #define CKG_GOPG2_DISABLE_CLK_MASK (GOP_BIT0)
326 #define CKG_SRAM0_DISABLE_CLK (GOP_BIT0)
328 #define CKG_SRAM0_MASK (GOP_BIT0|GOP_BIT1)
333 #define CKG_LB_SRAM1_DISABLE_CLK (GOP_BIT0) /*GOP1*/
340 #define CKG_AFBCCLK_DISABLE_CLK (GOP_BIT0)
343 #define CKG_AFBCCLK_DISABLE_CLK_MASK (GOP_BIT0|GOP_BIT1|GOP_BIT2|GOP_BIT3)
773 #define GOP_MIXER_EN_VFIL_MASK GOP_BIT0
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/k6lite/gop/
H A DhalGOP.c329 if (u16GopMask&GOP_BIT0) in HAL_GOP_SetGOPACKMask()
396 HAL_GOP_Write16Reg(pGOPHalLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0); in HAL_GOP_SetGOPACK()
482 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_HW_USAGE, 0, GOP_BIT0); in HAL_GOP_Init()
485 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_H121, 0, GOP_BIT0); // HD alpha Enable in HAL_GOP_Init()
546 …HAL_GOP_Write16Reg(pGOPHalLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0); //Doubl… in HAL_GOP_Init()
561 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<0, GOP_BIT0|GOP_BIT1 );//GWI… in HAL_GOP_Init()
576 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCALPHA, GOP_BIT0, GOP_BIT0); in HAL_GOP_Init()
1384 if((u16Ret[0] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1388 else if((u16Ret[1] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1392 else if((u16Ret[2] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
[all …]
H A DregGOP.h239 #define CKG_GOPG0_DISABLE_CLK ~(GOP_BIT0)
245 #define CKG_GOPG0_DISABLE_CLK_MASK (GOP_BIT0)
274 #define CKG_GOPG2_DISABLE_CLK ~(GOP_BIT0)
279 #define CKG_GOPG2_DISABLE_CLK_MASK (GOP_BIT0)
294 #define CKG_GOPG4_DISABLE_CLK_MASK (GOP_BIT0)
295 #define CKG_GOPG4_DISABLE_CLK_MASK (GOP_BIT0)
310 #define CKG_SRAM0_DISABLE_CLK (GOP_BIT0)
312 #define CKG_SRAM0_MASK (GOP_BIT0|GOP_BIT1)
317 #define CKG_LB_SRAM1_DISABLE_CLK (GOP_BIT0) /*GOP1*/
324 #define CKG_AFBCCLK_DISABLE_CLK (GOP_BIT0)
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/k6/gop/
H A DhalGOP.c330 if (u16GopMask&GOP_BIT0) in HAL_GOP_SetGOPACKMask()
397 HAL_GOP_Write16Reg(pGOPHalLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0); in HAL_GOP_SetGOPACK()
487 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_HW_USAGE, 0, GOP_BIT0); in HAL_GOP_Init()
490 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_H121, 0, GOP_BIT0); // HD alpha Enable in HAL_GOP_Init()
551 …HAL_GOP_Write16Reg(pGOPHalLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0); //Doubl… in HAL_GOP_Init()
566 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<0, GOP_BIT0|GOP_BIT1 );//GWI… in HAL_GOP_Init()
581 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCALPHA, GOP_BIT0, GOP_BIT0); in HAL_GOP_Init()
1390 if((u16Ret[0] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1394 else if((u16Ret[1] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1398 else if((u16Ret[2] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
[all …]
H A DregGOP.h239 #define CKG_GOPG0_DISABLE_CLK ~(GOP_BIT0)
245 #define CKG_GOPG0_DISABLE_CLK_MASK (GOP_BIT0)
274 #define CKG_GOPG2_DISABLE_CLK ~(GOP_BIT0)
279 #define CKG_GOPG2_DISABLE_CLK_MASK (GOP_BIT0)
294 #define CKG_GOPG4_DISABLE_CLK_MASK (GOP_BIT0)
295 #define CKG_GOPG4_DISABLE_CLK_MASK (GOP_BIT0)
310 #define CKG_SRAM0_DISABLE_CLK (GOP_BIT0)
312 #define CKG_SRAM0_MASK (GOP_BIT0|GOP_BIT1)
317 #define CKG_LB_SRAM1_DISABLE_CLK (GOP_BIT0) /*GOP1*/
324 #define CKG_AFBCCLK_DISABLE_CLK (GOP_BIT0)
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/M7821/gop/
H A DhalGOP.c475 return (reg_val & GOP_BIT0) ? TRUE : FALSE; in _isAfbcFunctionEnabled()
495 if (u16GopMask&GOP_BIT0) in HAL_GOP_SetGOPACKMask()
612 HAL_GOP_Write16Reg(pGOPHalLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0); in HAL_GOP_SetGOPACK()
733 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_HW_USAGE, 0, GOP_BIT0); in HAL_GOP_Init()
783 …HAL_GOP_Write16Reg(pGOPHalLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0); //Doubl… in HAL_GOP_Init()
801 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<0, GOP_BIT0|GOP_BIT1 );//GWI… in HAL_GOP_Init()
813 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCALPHA, GOP_BIT0, GOP_BIT0); in HAL_GOP_Init()
823 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff + GOP_4G_PRI0, GOP_BIT4, (GOP_BIT0 | GOP_BIT1 | GOP_BI… in HAL_GOP_Init()
1628 if((u16Ret[0] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1632 else if((u16Ret[1] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
[all …]
H A DregGOP.h219 #define CKG_GOPG0_DISABLE_CLK ~(GOP_BIT0)
226 #define CKG_GOPG0_DISABLE_CLK_MASK (GOP_BIT0)
246 #define CKG_GOPG2_DISABLE_CLK ~(GOP_BIT0)
253 #define CKG_GOPG2_DISABLE_CLK_MASK (GOP_BIT0)
272 #define CKG_GOPG3_DISABLE_CLK_MASK (GOP_BIT0)
291 #define CKG_SRAM0_DISABLE_CLK (GOP_BIT0)
293 #define CKG_SRAM0_MASK (GOP_BIT0|GOP_BIT1)
298 #define CKG_LB_SRAM1_DISABLE_CLK (GOP_BIT0) /*GOP1*/
305 #define CKG_AFBCCLK_DISABLE_CLK (GOP_BIT0)
308 #define CKG_AFBCCLK_DISABLE_CLK_MASK (GOP_BIT0|GOP_BIT1|GOP_BIT2|GOP_BIT3)
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/maserati/gop/
H A DhalGOP.c475 return (reg_val & GOP_BIT0) ? TRUE : FALSE; in _isAfbcFunctionEnabled()
495 if (u16GopMask&GOP_BIT0) in HAL_GOP_SetGOPACKMask()
612 HAL_GOP_Write16Reg(pGOPHalLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0); in HAL_GOP_SetGOPACK()
733 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_HW_USAGE, 0, GOP_BIT0); in HAL_GOP_Init()
783 …HAL_GOP_Write16Reg(pGOPHalLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0); //Doubl… in HAL_GOP_Init()
801 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<0, GOP_BIT0|GOP_BIT1 );//GWI… in HAL_GOP_Init()
813 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCALPHA, GOP_BIT0, GOP_BIT0); in HAL_GOP_Init()
823 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff + GOP_4G_PRI0, GOP_BIT4, (GOP_BIT0 | GOP_BIT1 | GOP_BI… in HAL_GOP_Init()
1631 if((u16Ret[0] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1635 else if((u16Ret[1] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
[all …]
H A DregGOP.h219 #define CKG_GOPG0_DISABLE_CLK ~(GOP_BIT0)
226 #define CKG_GOPG0_DISABLE_CLK_MASK (GOP_BIT0)
246 #define CKG_GOPG2_DISABLE_CLK ~(GOP_BIT0)
253 #define CKG_GOPG2_DISABLE_CLK_MASK (GOP_BIT0)
272 #define CKG_GOPG3_DISABLE_CLK_MASK (GOP_BIT0)
291 #define CKG_SRAM0_DISABLE_CLK (GOP_BIT0)
293 #define CKG_SRAM0_MASK (GOP_BIT0|GOP_BIT1)
298 #define CKG_LB_SRAM1_DISABLE_CLK (GOP_BIT0) /*GOP1*/
305 #define CKG_AFBCCLK_DISABLE_CLK (GOP_BIT0)
308 #define CKG_AFBCCLK_DISABLE_CLK_MASK (GOP_BIT0|GOP_BIT1|GOP_BIT2|GOP_BIT3)
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/maxim/gop/
H A DhalGOP.c423 if (u16GopMask&GOP_BIT0) in HAL_GOP_SetGOPACKMask()
527 HAL_GOP_Write16Reg(pGOPHalLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0); in HAL_GOP_SetGOPACK()
648 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_HW_USAGE, 0, GOP_BIT0); in HAL_GOP_Init()
698 …HAL_GOP_Write16Reg(pGOPHalLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0); //Doubl… in HAL_GOP_Init()
716 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<0, GOP_BIT0|GOP_BIT1 );//GWI… in HAL_GOP_Init()
728 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCALPHA, GOP_BIT0, GOP_BIT0); in HAL_GOP_Init()
738 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff + GOP_4G_PRI0, GOP_BIT4, (GOP_BIT0 | GOP_BIT1 | GOP_BI… in HAL_GOP_Init()
1564 if((u16Ret[0] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1568 else if((u16Ret[1] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1572 else if((u16Ret[2] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
[all …]
H A DregGOP.h220 #define CKG_GOPG0_DISABLE_CLK ~(GOP_BIT0)
227 #define CKG_GOPG0_DISABLE_CLK_MASK (GOP_BIT0)
247 #define CKG_GOPG2_DISABLE_CLK ~(GOP_BIT0)
254 #define CKG_GOPG2_DISABLE_CLK_MASK (GOP_BIT0)
273 #define CKG_GOPG3_DISABLE_CLK_MASK (GOP_BIT0)
292 #define CKG_SRAM0_DISABLE_CLK (GOP_BIT0)
294 #define CKG_SRAM0_MASK (GOP_BIT0|GOP_BIT1)
299 #define CKG_LB_SRAM1_DISABLE_CLK (GOP_BIT0) /*GOP1*/
306 #define CKG_AFBCCLK_DISABLE_CLK (GOP_BIT0)
309 #define CKG_AFBCCLK_DISABLE_CLK_MASK (GOP_BIT0|GOP_BIT1|GOP_BIT2|GOP_BIT3)
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/M7621/gop/
H A DhalGOP.c423 if (u16GopMask&GOP_BIT0) in HAL_GOP_SetGOPACKMask()
527 HAL_GOP_Write16Reg(pGOPHalLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0); in HAL_GOP_SetGOPACK()
648 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_HW_USAGE, 0, GOP_BIT0); in HAL_GOP_Init()
698 …HAL_GOP_Write16Reg(pGOPHalLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0); //Doubl… in HAL_GOP_Init()
716 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<0, GOP_BIT0|GOP_BIT1 );//GWI… in HAL_GOP_Init()
728 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCALPHA, GOP_BIT0, GOP_BIT0); in HAL_GOP_Init()
738 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff + GOP_4G_PRI0, GOP_BIT4, (GOP_BIT0 | GOP_BIT1 | GOP_BI… in HAL_GOP_Init()
1564 if((u16Ret[0] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1568 else if((u16Ret[1] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1572 else if((u16Ret[2] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
[all …]
H A DregGOP.h220 #define CKG_GOPG0_DISABLE_CLK ~(GOP_BIT0)
227 #define CKG_GOPG0_DISABLE_CLK_MASK (GOP_BIT0)
247 #define CKG_GOPG2_DISABLE_CLK ~(GOP_BIT0)
254 #define CKG_GOPG2_DISABLE_CLK_MASK (GOP_BIT0)
273 #define CKG_GOPG3_DISABLE_CLK_MASK (GOP_BIT0)
292 #define CKG_SRAM0_DISABLE_CLK (GOP_BIT0)
294 #define CKG_SRAM0_MASK (GOP_BIT0|GOP_BIT1)
299 #define CKG_LB_SRAM1_DISABLE_CLK (GOP_BIT0) /*GOP1*/
306 #define CKG_AFBCCLK_DISABLE_CLK (GOP_BIT0)
309 #define CKG_AFBCCLK_DISABLE_CLK_MASK (GOP_BIT0|GOP_BIT1|GOP_BIT2|GOP_BIT3)
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/macan/gop/
H A DhalGOP.c300 if (u16GopMask&GOP_BIT0) in HAL_GOP_SetGOPACKMask()
449 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_HW_USAGE, 0, GOP_BIT0); in HAL_GOP_Init()
514 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<0, GOP_BIT0|GOP_BIT1 );//GWI… in HAL_GOP_Init()
528 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCALPHA, GOP_BIT0, GOP_BIT0); in HAL_GOP_Init()
1263 if((u16Ret[0] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1267 else if((u16Ret[1] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1271 else if((u16Ret[2] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1275 else if((u16Ret[3] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1393 …ocal,p_cmdq_struct,p_number,u32BankOffSet+GOP_4G_BANK_FWR,(u16BnkWrVal|(GOP_BIT0)) ,0xFFFF);//curr… in HAL_GOP_GWIN_SetMUX_ThroughCmdq()
1394 …cal,p_cmdq_struct,p_number,u32BankOffSet+GOP_4G_BANK_FWR,(u16BnkWrVal&(~GOP_BIT0)) ,0xFFFF);//curr… in HAL_GOP_GWIN_SetMUX_ThroughCmdq()
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/mooney/gop/
H A DhalGOP.c290 if (u16GopMask&GOP_BIT0) in HAL_GOP_SetGOPACKMask()
418 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_HW_USAGE, 0, GOP_BIT0); in HAL_GOP_Init()
457 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel, GOP_BIT0|GOP_BIT1 );//GWIN M… in HAL_GOP_Init()
1145 if((u16Ret[0] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1149 else if((u16Ret[1] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1153 else if((u16Ret[2] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1157 else if((u16Ret[3] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1224 …OPHalLocal, GOP_SC_FRC_LAYER1_L_EN, (pGopDst==E_DRV_GOP_DST_BYPASS)?GOP_BIT0: ~GOP_BIT0, GOP_BIT0); in HAL_GOP_SetGOPEnable2SC()
1229 …OPHalLocal, GOP_SC_FRC_LAYER1_R_EN, (pGopDst==E_DRV_GOP_DST_BYPASS)?GOP_BIT0: ~GOP_BIT0, GOP_BIT0); in HAL_GOP_SetGOPEnable2SC()
1234 …OPHalLocal, GOP_SC_FRC_LAYER2_L_EN, (pGopDst==E_DRV_GOP_DST_BYPASS)?GOP_BIT0: ~GOP_BIT0, GOP_BIT0); in HAL_GOP_SetGOPEnable2SC()
[all …]
H A DregGOP.h198 #define CKG_GOPG0_DISABLE_CLK ~(GOP_BIT0)
204 #define CKG_GOPG0_DISABLE_CLK_MASK (GOP_BIT0)
223 #define CKG_GOPG2_DISABLE_CLK ~(GOP_BIT0)
229 #define CKG_GOPG2_DISABLE_CLK_MASK (GOP_BIT0)
246 #define CKG_GOPG3_DISABLE_CLK_MASK (GOP_BIT0)
264 #define CKG_SRAM0_DISABLE_CLK (GOP_BIT0)
266 #define CKG_SRAM0_MASK (GOP_BIT0|GOP_BIT1)
271 #define CKG_LB_SRAM1_DISABLE_CLK (GOP_BIT0) /*GOP1*/
785 #define MASK_INI_TSTCLR_EN GOP_BIT0
/utopia/UTPA2-700.0.x/modules/graphic/hal/manhattan/gop/
H A DhalGOP.c311 if (u16GopMask&GOP_BIT0) in HAL_GOP_SetGOPACKMask()
441 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_HW_USAGE, 0, GOP_BIT0); in HAL_GOP_Init()
506 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<0, GOP_BIT0|GOP_BIT1 );//GWI… in HAL_GOP_Init()
513 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCALPHA, GOP_BIT0, GOP_BIT0); in HAL_GOP_Init()
1233 if((u16Ret[0] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1237 else if((u16Ret[1] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1241 else if((u16Ret[2] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1245 else if((u16Ret[3] & GOP_BIT0) ==0) in HAL_GOP_GWIN_SetMUX()
1306 …OPHalLocal, GOP_SC_FRC_LAYER1_L_EN, (pGopDst==E_DRV_GOP_DST_BYPASS)?GOP_BIT0: ~GOP_BIT0, GOP_BIT0); in HAL_GOP_SetGOPEnable2SC()
1311 …OPHalLocal, GOP_SC_FRC_LAYER1_R_EN, (pGopDst==E_DRV_GOP_DST_BYPASS)?GOP_BIT0: ~GOP_BIT0, GOP_BIT0); in HAL_GOP_SetGOPEnable2SC()
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/drv/gop/
H A DdrvGOP.c972 …_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_BANK_FWR, GOP_BIT0 , GOP_BIT0); in GOP_GWIN_TriggerRegWriteIn()
973 … HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_BANK_FWR, 0 , GOP_BIT0); in GOP_GWIN_TriggerRegWriteIn()
988 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_TRIGGER, 0, GOP_BIT0); in GOP_GWIN_TriggerRegWriteIn()
989 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0); in GOP_GWIN_TriggerRegWriteIn()
1020 if((reg_val & GOP_BIT0) ==0) in GOP_GWIN_TriggerRegWriteIn()
1042 if((reg_val & GOP_BIT0) ==1) in GOP_GWIN_TriggerRegWriteIn()
1073 …_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_BANK_FWR, GOP_BIT0 , GOP_BIT0); in GOP_GWIN_TriggerRegWriteIn()
1074 … HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_BANK_FWR, 0 , GOP_BIT0); in GOP_GWIN_TriggerRegWriteIn()
2549 …HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, bankoffset+GOP_4G_CTRL0, 0x1, GOP_BIT0); … in MDrv_GOP_Init()
2550 …HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, bankoffset+GOP_4G_CTRL0, 0x0,(GOP_BIT0|GOP_BIT1|… in MDrv_GOP_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/messi/gop/
H A DregGOP.h202 #define CKG_GOPG0_DISABLE_CLK ~(GOP_BIT0)
207 #define CKG_GOPG0_DISABLE_CLK_MASK (GOP_BIT0)
225 #define CKG_GOPG2_DISABLE_CLK ~(GOP_BIT0)
230 #define CKG_GOPG2_DISABLE_CLK_MASK (GOP_BIT0)
248 #define CKG_GOPG3_DISABLE_CLK_MASK (GOP_BIT0)
266 #define CKG_SRAM0_DISABLE_CLK (GOP_BIT0)
268 #define CKG_SRAM0_MASK (GOP_BIT0|GOP_BIT1)
273 #define CKG_LB_SRAM1_DISABLE_CLK (GOP_BIT0) /*GOP1*/
790 #define MASK_INI_TSTCLR_EN GOP_BIT0
/utopia/UTPA2-700.0.x/modules/graphic/hal/mainz/gop/
H A DregGOP.h202 #define CKG_GOPG0_DISABLE_CLK ~(GOP_BIT0)
207 #define CKG_GOPG0_DISABLE_CLK_MASK (GOP_BIT0)
225 #define CKG_GOPG2_DISABLE_CLK ~(GOP_BIT0)
230 #define CKG_GOPG2_DISABLE_CLK_MASK (GOP_BIT0)
248 #define CKG_GOPG3_DISABLE_CLK_MASK (GOP_BIT0)
266 #define CKG_SRAM0_DISABLE_CLK (GOP_BIT0)
268 #define CKG_SRAM0_MASK (GOP_BIT0|GOP_BIT1)
273 #define CKG_LB_SRAM1_DISABLE_CLK (GOP_BIT0) /*GOP1*/
790 #define MASK_INI_TSTCLR_EN GOP_BIT0

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