1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
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76 //******************************************************************************
77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
79 //
80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
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92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95 #include "MsCommon.h"
96 #ifndef MSOS_TYPE_LINUX_KERNEL
97 #include <string.h>
98 #endif
99 #include "MsTypes.h"
100 #include "halGOP.h"
101 #include "regGOP.h"
102 #include "halCHIP.h"
103 #include "drvSYS.h"
104
105 //------------------------------------------------------------------------------
106 // Driver Compiler Options
107 //------------------------------------------------------------------------------
108 #define HAL_GOP_DEBUGINFO(x) //x
109
110 //------------------------------------------------------------------------------
111 // Local Defines
112 //------------------------------------------------------------------------------
113 #define RIU ((unsigned short volatile *) pGOPHalLocal->va_mmio_base)
114 #define GOP_WRITE2BYTE(addr, val) { RIU[addr] = val; }
115 #define GOP_READ2BYTE(addr) RIU[addr]
116 #define GOP_DST_MASK 0xFUL
117
118 //------------------------------------------------------------------------------
119 // Local Var
120 //------------------------------------------------------------------------------
121 MS_BOOL bIsMuxVaildToGopDst[MAX_GOP_MUX][MAX_DRV_GOP_DST_SUPPORT] =
122 {
123 /*IP0, IP0_SUB, MIXER2VE, OP0, VOP, IP1, IP1_SUB, MIXER2OP*/
124 {TRUE, FALSE, FALSE, TRUE, TRUE, FALSE, FALSE, FALSE}, /*All Gop Dst case is vaild or FALSE for mux 0 */
125 {TRUE, FALSE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE}, /*All Gop Dst case is vaild or FALSE for mux 1 */
126 {TRUE, FALSE, FALSE, TRUE, TRUE, FALSE, FALSE, FALSE}, /*All Gop Dst case is vaild or FALSE for mux 0 */
127 {TRUE, FALSE, FALSE, TRUE, TRUE, FALSE, FALSE, FALSE}, /*All Gop Dst case is vaild or FALSE for mux 0 */
128 };
129 #ifdef GOP_CMDQ_ENABLE
130 extern MS_U16 u16MIUSelect[MAX_GOP_SUPPORT];
131 extern MS_U8 bMIUSelect[MAX_GOP_SUPPORT];
132 #endif
133 GOP_CHIP_PROPERTY g_GopChipPro =
134 {
135 .bSetHSyncInverse = FALSE,
136 .bGop1GPalette = FALSE,
137 .bSetHPipeOfst = FALSE,
138 .bNeedCheckMVOP = FALSE,
139 .bNeedSetMUX1ToIP0 = FALSE,
140 .bNeedSetMUX3ToIP0 = FALSE,
141 .bNewMux = TRUE,
142 .bNewPalette = TRUE,
143 .bNewBwReg = TRUE,
144 .bGop2VStretch = TRUE,
145 .bIgnoreIPHPD = TRUE, //Uranus4 has handshack with XC, should not set HPD
146 .bIgnoreVEHPD = FALSE, //Uranus4 to VE through Mixer, do not need adjust HPD
147 .bhastilemode = TRUE,
148 .bInitNotEnableGOPToSC = FALSE, //For Uranus4 mux init setting, enable GOP to SC in GOP init would cause problem
149 .bAutoAdjustMirrorHSize = TRUE, //whether hw will auto adjust start addr when H mirror is enable
150 .bGOPWithVscale = {TRUE, TRUE, FALSE, FALSE, FALSE}, //setting GOP with/without Vscale
151 .bGOPWithScaleDown = {FALSE, FALSE, FALSE, FALSE, FALSE},
152
153 .bDWINSupport = FALSE,
154 .DwinVer = 0x1,
155 .bTstPatternAlpha = TRUE,
156 .bXCDirrectBankSupport = TRUE, /*XC Dirrect Bank R/W*/
157 .bFRCSupport = FALSE, /*OC path*/
158 .bGOPMixerToVE= FALSE, /*Mixer to VE path*/
159 .bBnkForceWrite = TRUE, /*Direct Bank Force Write*/
160 .bPixelModeSupport = TRUE, /*Pixel Mode Support*/
161 .bScalingDownSupport= TRUE,
162 .b2Pto1PSupport= TRUE,
163 .bTLBSupport= {TRUE, FALSE, TRUE, FALSE, FALSE, FALSE},
164 .GOP_TestPattern_Vaild= E_GOP0,
165 .bInternalMIUSelect= {TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, FALSE, FALSE}, //{E_GOP0, E_GOP1, E_GOP2, E_GOP3, E_GOP4, E_GOP_Dwin, E_GOP_MIXER, E_GOP5}
166
167 #ifdef ENABLE_GOP_T3DPATCH
168 .GOP_PD = 0x1C,
169 #else
170 .GOP_PD = 0x1C8,
171 #endif
172 .GOP_UHD_PD_Offset = 0x0,
173 .GOP_IP_PD = 0x00,
174 .GOP_MVOP_PD = 0x69,
175 .GOP_VE_PD = 0x89,
176 .GOP_MIXER_PD = 0x0,
177 .GOP_NonVS_PD_Offset = 0x5, //GOP without Vsacle might need add offset on pipedelay
178 .GOP_VE_V_Offset = 0x0,
179
180 .GOP_MUX_Delta = 0x1,
181 .GOP_Mux_Offset = {0x0, 0x12, 0x6, 0xC, 0x18},
182 .GOP_MapLayer2Mux = {E_GOP_MUX0, E_GOP_MUX2, E_GOP_MUX3, E_GOP_MUX1, E_GOP_MUX4},
183 .GOP_Mux_FRC_offset= 0x13,
184
185 .WordUnit = GOP_WordUnit,
186 .TotalGwinNum = GOP_TotalGwinNum,
187 .Default_ConsAlpha_bits = DRV_VALID_8BITS,
188 .enGOP3DType = E_DRV_3D_DUP_FULL,
189 };
190
191
192 //------------------------------------------------------------------------------
193 // Global Functions
194 //------------------------------------------------------------------------------
HAL_GOP_GetGOPEnum(GOP_CTX_HAL_LOCAL * pGOPHalLocal,GOP_TYPE_DEF * GOP_TYPE)195 void HAL_GOP_GetGOPEnum(GOP_CTX_HAL_LOCAL *pGOPHalLocal, GOP_TYPE_DEF* GOP_TYPE)
196 {
197 GOP_TYPE->GOP0 = E_GOP0;
198 GOP_TYPE->GOP1 = E_GOP1;
199 GOP_TYPE->GOP2 = E_GOP2;
200 GOP_TYPE->GOP3 = E_GOP3;
201 GOP_TYPE->GOP4 = E_GOP4;
202 GOP_TYPE->GOP5 = E_GOP5;
203 GOP_TYPE->DWIN = E_GOP_Dwin;
204 GOP_TYPE->MIXER = E_GOP_MIXER;
205 }
206
HAL_GOP_SetWinFmt(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 regForm,MS_U8 u8GOPNum,MS_U8 u8GwinNum,MS_U16 colortype)207 GOP_Result HAL_GOP_SetWinFmt(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 regForm, MS_U8 u8GOPNum, MS_U8 u8GwinNum, MS_U16 colortype)
208 {
209 MS_U32 u32BankOffSet = 0;
210
211 _GetBnkOfstByGop(u8GOPNum, &u32BankOffSet);
212
213 if (((regForm & E_GOP_REG_FORM_MASK) == E_GOP_REG_FORM_T21G) || ((regForm & E_GOP_REG_FORM_MASK) == E_GOP_REG_FORM_T81G))
214 {
215 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet + GOP_4G_GWIN0_CTRL(Gop23_GwinCtl_Ofet), colortype, 0x00f0);
216 }
217 else
218 {
219 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet + GOP_4G_GWIN0_CTRL(u8GwinNum), colortype, 0x00f0);
220 }
221
222 return GOP_SUCCESS;
223 }
224
HAL_GOP_Set_PINPON(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GOPNum,MS_BOOL bEn,E_DRV_GOP_PINPON_MODE pinpon_mode)225 GOP_Result HAL_GOP_Set_PINPON(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum, MS_BOOL bEn, E_DRV_GOP_PINPON_MODE pinpon_mode)
226 {
227 MS_U32 u32BankOffSet =0;
228 MS_U32 u32BitMask,Regval;
229
230 _GetBnkOfstByGop(u8GOPNum, &u32BankOffSet);
231
232 switch(pinpon_mode)
233 {
234 default:
235 case E_DRV_GOP_PINPON_G3D:
236 Regval = bEn << 5;
237 u32BitMask = GOP_BIT5;
238 break;
239 case E_DRV_GOP_PINPON_DWIN:
240 Regval = bEn << 6;
241 u32BitMask = GOP_BIT6;
242 break;
243 case E_DRV_GOP_PINPON_DIP:
244 Regval = bEn << 7;
245 u32BitMask = GOP_BIT7;
246 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_MULTI_ALPHA, GOP_BIT9,(GOP_BIT8|GOP_BIT9));
247 break;
248 case E_DRV_GOP_PINPON_DWIN0:
249 Regval = bEn << 7;
250 u32BitMask = GOP_BIT7;
251 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_MULTI_ALPHA, 0x0,(GOP_BIT8|GOP_BIT9));
252 break;
253 case E_DRV_GOP_PINPON_DWIN1:
254 Regval = bEn << 7;
255 u32BitMask = GOP_BIT7;
256 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_MULTI_ALPHA, GOP_BIT8,(GOP_BIT8|GOP_BIT9));
257 break;
258 break;
259 }
260
261 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_CTRL1, Regval, u32BitMask);
262 return GOP_SUCCESS;
263 }
264
265
_GetBnkOfstByGop(MS_U8 gop,MS_U32 * pBnkOfst)266 MS_BOOL _GetBnkOfstByGop(MS_U8 gop, MS_U32 *pBnkOfst)
267 {
268 if(gop >= MAX_GOP_SUPPORT)
269 {
270 printf("[%s][%d] Out of GOP support!!! GOP=%d\n",__FUNCTION__,__LINE__ ,gop);
271 return FALSE;
272 }
273
274 if (gop==E_GOP0)
275 *pBnkOfst = GOP_4G_OFST<<16;
276 else if (gop==E_GOP1)
277 *pBnkOfst = GOP_2G_OFST<<16;
278 else if (gop==E_GOP2)
279 *pBnkOfst = GOP_1G_OFST<<16;
280 else
281 return FALSE;
282
283 return TRUE;
284 }
285
HAL_GOP_SetGOPACKMask(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U16 u16GopMask)286 GOP_Result HAL_GOP_SetGOPACKMask(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U16 u16GopMask)
287 {
288 MS_U16 u16Mask0 = 0;
289 MS_U16 u16Mask1 = 0;
290 if (u16GopMask&GOP_BIT0)
291 {
292 u16Mask0 |= GOP_BIT12;
293 }
294 if (u16GopMask&GOP_BIT1)
295 {
296 u16Mask0 |= GOP_BIT13;
297 }
298 if (u16GopMask&GOP_BIT2)
299 {
300 u16Mask0 |= GOP_BIT14;
301 }
302 if (u16GopMask&GOP_BIT3)
303 {
304 u16Mask0 |= GOP_BIT15;
305 }
306 if (u16GopMask&GOP_BIT4)
307 {
308 u16Mask1 |= GOP_BIT4;
309 }
310 if (u16Mask0 != 0)
311 {
312 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_BAK_SEL, 0xFFFF , u16Mask0);
313 }
314 if (u16Mask1 != 0)
315 {
316 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_BAK_SEL_EX, 0xFFFF , u16Mask1);
317 }
318 return GOP_SUCCESS;
319 }
320
HAL_GOP_SetGOPACK(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 gop)321 GOP_Result HAL_GOP_SetGOPACK(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 gop)
322 {
323 if(gop >= MAX_GOP_SUPPORT)
324 {
325 printf("[%s][%d] Out of GOP support!!! GOP=%d\n",__FUNCTION__,__LINE__ ,gop);
326 return GOP_FAIL;
327 }
328
329 switch(gop)
330 {
331 case E_GOP0:
332 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_BAK_SEL, GOP_BIT12 , GOP_BIT12);
333 break;
334 case E_GOP1:
335 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_BAK_SEL, GOP_BIT13 , GOP_BIT13);
336 break;
337 case E_GOP2:
338 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_BAK_SEL, GOP_BIT14 , GOP_BIT14);
339 break;
340 default:
341 break;
342 }
343 return GOP_SUCCESS;
344 }
345
HAL_GOP_GetGOPACK(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 gop)346 MS_U16 HAL_GOP_GetGOPACK(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 gop)
347 {
348 MS_U16 u16GopAck = 0,reg_val =0;
349
350 if(gop >= MAX_GOP_SUPPORT)
351 {
352 printf("[%s][%d] Out of GOP support!!! GOP=%d\n",__FUNCTION__,__LINE__ ,gop);
353 return FALSE;
354 }
355
356 switch(gop)
357 {
358 case E_GOP0:
359 HAL_GOP_Read16Reg(pGOPHalLocal,GOP_BAK_SEL,®_val);
360 if(reg_val&GOP_BIT12)
361 u16GopAck = FALSE;
362 else
363 u16GopAck = TRUE;
364 break;
365 case E_GOP1:
366 HAL_GOP_Read16Reg(pGOPHalLocal,GOP_BAK_SEL,®_val);
367 if(reg_val&GOP_BIT13)
368 u16GopAck = FALSE;
369 else
370 u16GopAck = TRUE;
371 break;
372 case E_GOP2:
373 HAL_GOP_Read16Reg(pGOPHalLocal,GOP_BAK_SEL,®_val);
374 if(reg_val&GOP_BIT14)
375 u16GopAck = FALSE;
376 else
377 u16GopAck = TRUE;
378 break;
379 default:
380 break;
381 }
382 return u16GopAck;
383 }
384
HAL_GOP_EnableTwoLineBufferMode(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GOP,MS_BOOL bEnable)385 GOP_Result HAL_GOP_EnableTwoLineBufferMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_BOOL bEnable)
386 {
387 MS_U32 u32BankOffSet;
388
389 if (u8GOP < 2) /* only GOP0/GOP1 can support two linebuufer mode */
390 {
391 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
392 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_MULTI_ALPHA, bEnable?GOP_BIT12:0, GOP_BIT12);
393 }
394
395 return GOP_SUCCESS;
396 }
397
HAL_GOP_Init(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GOPNum)398 void HAL_GOP_Init(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum)
399 {
400 MS_U32 u32bankoff = 0;
401 MS_U16 mask_shift=0xFF;
402 MS_U16 u16RegVal=0xFF;
403 MS_U8 u8MIUSel=0xF;
404
405 if(u8GOPNum >= MAX_GOP_SUPPORT)
406 {
407 printf("[%s][%d] Out of GOP support!!! GOP=%d\n",__FUNCTION__,__LINE__ ,u8GOPNum);
408 return;
409 }
410
411 _GetBnkOfstByGop(u8GOPNum, &u32bankoff);
412 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_CTRL0, 0x000, GOP_BIT9); // Genshot fast=0 for t3, for T4 and after no need to set this bit.
413
414
415 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_NEW_BW, GOP_BIT14, GOP_BIT14);
416 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_NEW_BW, GOP_BIT12, GOP_BIT13|GOP_BIT12);
417
418 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_HW_USAGE, 0, GOP_BIT0);
419
420 if((u8GOPNum == E_GOP0)||(u8GOPNum == E_GOP1))
421 {
422 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MULTI_ALPHA, GOP_BIT12, GOP_BIT12);
423
424 HAL_GOP_Write16Reg(pGOPHalLocal, CKG_GOPG0_SCALING, GOP_BIT2|GOP_BIT3 , GOP_REG_WORD_MASK);
425 HAL_GOP_Write16Reg(pGOPHalLocal, CKG_GOPG0_MG, 0, GOP_BIT2);
426 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_GOPSC_SRAM_CTRL, GOP_BIT8|GOP_BIT10|GOP_BIT12, (GOP_BIT8|GOP_BIT9)|(GOP_BIT10|GOP_BIT11)|(GOP_BIT12|GOP_BIT13));
427 }
428
429 /* enable GOP clock */
430 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SRAMCLK, 0, CKG_SRAM1_DISABLE_CLK|CKG_SRAM0_DISABLE_CLK); /* GOP palette SRAM0&1 */
431 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_LB_SRAMCLK, 0, BMASK(7:0)); /* GOP Line buffer sram clock */
432
433 switch(u8GOPNum)
434 {
435 case E_GOP0:
436 mask_shift = GOP_MIU_CLIENT_GOP0;
437 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOPCLK, 0, CKG_GOPG0_DISABLE_CLK_MASK); /* GOP 0 */
438 break;
439 case E_GOP1:
440 mask_shift = GOP_MIU_CLIENT_GOP1;
441 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOPCLK, 0, CKG_GOPG1_DISABLE_CLK_MASK); /* GOP 1 */
442 break;
443 case E_GOP2:
444 mask_shift = GOP_MIU_CLIENT_GOP2;
445 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOP2CLK, 0, CKG_GOPG2_DISABLE_CLK_MASK); /* GOP 2 */
446 break;
447 default:
448 mask_shift = 0xFF;
449 return;
450 }
451
452
453 if(pGOPHalLocal->pGopChipPro->bInternalMIUSelect[u8GOPNum] ==TRUE)
454 {
455 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_MIU_SEL, &u16RegVal);
456 u8MIUSel = (u16RegVal>>mask_shift)&0x0000001UL;
457 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel, GOP_BIT0|GOP_BIT1 );//GWIN MIU Select
458 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MIU_GROUP, 1<<mask_shift, 1<<mask_shift );//Get Control MIU select by GOP itself
459 }
460
461 // set VIP/VOP timing select, always select VOP should be OK.
462 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MULTI_ALPHA, GOP_BIT10, GOP_BIT10);
463 }
464
HAL_GOP_Chip_Proprity_Init(GOP_CTX_HAL_LOCAL * pGOPHalLocal)465 void HAL_GOP_Chip_Proprity_Init(GOP_CTX_HAL_LOCAL *pGOPHalLocal)
466 {
467 *pGOPHalLocal->pGopChipPro = g_GopChipPro;
468 }
469
HAL_GOP_GetMaxGwinNumByGOP(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GopNum)470 MS_U8 HAL_GOP_GetMaxGwinNumByGOP(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GopNum)
471 {
472 switch(u8GopNum)
473 {
474 case E_GOP0:
475 return (MS_U8)MAX_GOP0_GWIN;
476 break;
477 case E_GOP1:
478 return (MS_U8)MAX_GOP1_GWIN;
479 break;
480 case E_GOP2:
481 return (MS_U8)MAX_GOP2_GWIN;
482 break;
483 default:
484 MS_ASSERT(0);
485 return 0xFF;
486 break;
487 }
488 }
489
HAL_GOP_SelGwinIdByGOP(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8Gop,MS_U8 u8Idx)490 MS_U8 HAL_GOP_SelGwinIdByGOP(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8Gop, MS_U8 u8Idx)
491 {
492 MS_U8 u8GWinId = 0;
493
494 //Adjust GWIN ID by different Chip
495 if(u8Gop >= MAX_GOP_SUPPORT)
496 {
497 printf("[%s][%d] Out of GOP support!!! GOP=%d\n",__FUNCTION__,__LINE__ ,u8Gop);
498 MS_ASSERT(0);
499 return 0xFF;
500 }
501
502 switch(u8Gop)
503 {
504 case E_GOP0:
505 u8GWinId = GOP0_GwinIdBase + u8Idx;
506 break;
507 case E_GOP1:
508 u8GWinId = GOP1_GwinIdBase + u8Idx;
509 break;
510 case E_GOP2:
511 u8GWinId = GOP2_GwinIdBase + u8Idx;
512 break;
513 case E_GOP3:
514 u8GWinId = GOP3_GwinIdBase + u8Idx;
515 break;
516 case E_GOP4:
517 u8GWinId = GOP4_GwinIdBase + u8Idx;
518 break;
519 default:
520 break;
521 }
522 return u8GWinId;
523
524 }
525
HAL_GOP_GOPSel(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GOPNum)526 GOP_Result HAL_GOP_GOPSel(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum)
527 {
528 if(u8GOPNum >= MAX_GOP_SUPPORT)
529 {
530 printf("[%s][%d] Out of GOP support!!! GOP=%d\n",__FUNCTION__,__LINE__ ,u8GOPNum);
531 MS_ASSERT(0);
532 return 0xFF;
533 }
534
535 switch(u8GOPNum)
536 {
537 case E_GOP0: // GOP4G
538 pGOPHalLocal->bank_offset = GOP_4G_OFST<<16;
539 return GOP_SUCCESS;
540 case E_GOP1: // GOP2G
541 pGOPHalLocal->bank_offset = GOP_2G_OFST<<16;
542 return GOP_SUCCESS;
543 case E_GOP2: // GOP1G
544 pGOPHalLocal->bank_offset = GOP_1G_OFST<<16;
545 return GOP_SUCCESS;
546 case E_GOP3: // GOP1GX
547 pGOPHalLocal->bank_offset = GOP_1GX_OFST<<16;
548 return GOP_SUCCESS;
549 case E_GOP4: // GOP1GS
550 pGOPHalLocal->bank_offset = GOP_1GS0_OFST<<16;
551 return GOP_SUCCESS;
552 default:
553 MS_ASSERT(0);
554 return GOP_FAIL;
555 }
556 }
557
HAL_GOP_BANK_SEL(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8bank)558 void HAL_GOP_BANK_SEL(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8bank)
559 {
560 MS_U16 u16Bank;
561 u16Bank = GOP_READ2BYTE(GOP_BAK_SEL);
562 u16Bank &= ~BMASK(3:0);
563 u16Bank |= (u8bank&BMASK(3:0));
564 GOP_WRITE2BYTE(GOP_BAK_SEL, u16Bank);
565 u16Bank = GOP_READ2BYTE(GOP_BAK_SEL_EX);
566 u16Bank &= ~GOP_BIT4;
567 u16Bank |= ((u8bank&GOP_BIT4)<<GOP_BIT4);
568 GOP_WRITE2BYTE(GOP_BAK_SEL_EX, u16Bank);
569 }
570
HAL_GOP_Get_BANK(GOP_CTX_HAL_LOCAL * pGOPHalLocal)571 MS_U8 HAL_GOP_Get_BANK(GOP_CTX_HAL_LOCAL *pGOPHalLocal)
572 {
573 MS_U16 u16GetBank;
574 u16GetBank = GOP_READ2BYTE(GOP_BAK_SEL)&0xF;
575 return u16GetBank;
576 }
577
HAL_GOP_Read16Reg(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U32 u32addr,MS_U16 * pu16ret)578 void HAL_GOP_Read16Reg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32addr, MS_U16* pu16ret)
579 {
580 MS_U16 u16xcSubbank=0, u16BankAddr=0, u16BankTemp=0;
581 MS_U32 bank;
582 MS_U32 direct_addr;
583
584 HAL_GOP_DEBUGINFO(printf("HAL_GOP_Read16Reg[%x]\n", u32addr));
585
586 //* Gop driver should access another HW IP register
587 //* ex: SC's IP and OP setting, GE's det frame buffer setting, ChipTop GOP clk setting
588 switch (u32addr & 0xFF00)
589 {
590 case GOP_REG_BASE:
591 {
592 bank = (u32addr & 0xFF0000) >> 8;
593
594 if(bank==0xE00)//GOP4: 0x121B00
595 {
596 bank=GOP_REG_GOP4_BK_OFFSET;
597 }
598 else if(bank==0xF00)//GWIN4: 0x121E00
599 {
600 bank=GOP_REG_GOP4_GW_OFFSET;
601 }
602 else if(bank==0x1000)//GOP4_ST
603 {
604 bank=GOP_REG_GOP4_ST_OFFSET;
605 }
606
607 direct_addr = GOP_REG_DIRECT_BASE + bank + (u32addr & 0xFF); //Direct_Base + bank + addr_offset
608 *pu16ret = GOP_READ2BYTE((direct_addr&0xFFFFF));
609 break;
610 }
611 case SC1_REG_BASE:
612 {
613 if(g_GopChipPro.bXCDirrectBankSupport)
614 {
615 u16xcSubbank = (u32addr & 0xFF0000)>>8;
616 u32addr = SC1_DIRREG_BASE+ u16xcSubbank + (u32addr & 0xFF);
617 *pu16ret = GOP_READ2BYTE((u32addr&0xFFFFF));
618 }
619 else
620 {
621 u16xcSubbank = (u32addr & 0xFF0000)>>16;
622 u16BankAddr = GOP_SC_BANKSEL+0;
623 u32addr = SC1_REG_BASE + (u32addr & 0xFF);
624
625 u16BankTemp = GOP_READ2BYTE(u16BankAddr&0xFFFF);
626 GOP_WRITE2BYTE(u16BankAddr&0xFFFF, u16xcSubbank);
627 *pu16ret = GOP_READ2BYTE((u32addr&0xFFFF));
628 GOP_WRITE2BYTE(u16BankAddr&0xFFFF, u16BankTemp);
629 }
630 break;
631 }
632 case GE_REG_BASE:
633 case CKG_REG_BASE:
634 case MIU0_REG_BASE:
635 case MIU_REG_BASE:
636 case MVOP_REG_BASE:
637 {
638 *pu16ret = GOP_READ2BYTE((u32addr&0xFFFF));
639 break;
640 }
641 #ifdef GOP_MIU_GROUP2
642 case (MIU2_REG_BASE & 0xFF00):
643 {
644 direct_addr = MIU2_REG_BASE + (u32addr & 0xFF); //Direct_Base + addr_offset
645 *pu16ret = GOP_READ2BYTE((direct_addr&0xFFFFF));
646
647 break;
648 }
649 #endif
650 default:
651 {
652 //Gop lib current do not support this HW ip base
653 MS_ASSERT(0);
654 *pu16ret =0;
655 break;
656 }
657 }
658 }
659
HAL_GOP_Write16Reg(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U32 u32addr,MS_U16 u16val,MS_U16 mask)660 void HAL_GOP_Write16Reg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32addr, MS_U16 u16val, MS_U16 mask)
661 {
662 MS_U16 u16tmp=0;
663 MS_U16 u16xcSubbank=0,u16BankAddr=0,pu16ret=0;
664 MS_U32 bank;
665 MS_U32 direct_addr;
666
667 HAL_GOP_DEBUGINFO(printf("HAL_GOP_Write16Reg[%04x] = %04x\n", u32addr, u16val));
668
669 if(mask!=0xffff)
670 {
671 HAL_GOP_Read16Reg(pGOPHalLocal, u32addr, &u16tmp);
672 u16tmp &= ~mask;
673 u16val &= mask;
674 u16val |= u16tmp;
675 }
676
677 //* Gop driver should access another HW IP register
678 //* ex: SC's IP and OP setting, GE's det frame buffer setting, ChipTop GOP clk setting
679 switch (u32addr & 0xFF00)
680 {
681 case GOP_REG_BASE:
682 {
683 bank = (u32addr & 0xFF0000) >> 8;
684
685 if(bank==0xE00)//GOP4: 0x121B00
686 {
687 bank=GOP_REG_GOP4_BK_OFFSET;
688 }
689 else if(bank==0xF00)//GWIN4: 0x121E00
690 {
691 bank=GOP_REG_GOP4_GW_OFFSET;
692 }
693 else if(bank==0x1000) //GOP4_ST
694 {
695 bank=GOP_REG_GOP4_ST_OFFSET;
696 }
697
698 direct_addr = GOP_REG_DIRECT_BASE + bank + (u32addr & 0xFF);
699 GOP_WRITE2BYTE((direct_addr&0xFFFFF), u16val);
700 break;
701 }
702 case SC1_REG_BASE:
703 if(g_GopChipPro.bXCDirrectBankSupport)
704 { /*Derrick Bank*/
705 u16xcSubbank = (u32addr & 0xFF0000)>>8 ;
706 direct_addr = SC1_DIRREG_BASE + u16xcSubbank+ (u32addr & 0xFF);
707 GOP_WRITE2BYTE((direct_addr&0xFFFFF), u16val);
708 }
709 else
710 { /*Sub Bank*/
711 u16xcSubbank = (u32addr & 0xFF0000)>>16 ;
712 u16BankAddr = GOP_SC_BANKSEL+0;
713 u32addr = SC1_REG_BASE + (u32addr & 0xFF);
714
715 pu16ret = GOP_READ2BYTE(u16BankAddr&0xFFFF);
716 GOP_WRITE2BYTE((u16BankAddr&0xFFFF), u16xcSubbank);
717 GOP_WRITE2BYTE((u32addr&0xFFFF), u16val);
718 GOP_WRITE2BYTE((u16BankAddr&0xFFFF), pu16ret);
719 }
720 break;
721 case GE_REG_BASE:
722 case CKG_REG_BASE:
723 case MIU0_REG_BASE:
724 case MIU_REG_BASE:
725 {
726 GOP_WRITE2BYTE((u32addr&0xFFFF), u16val);
727 break;
728 }
729 #ifdef GOP_MIU_GROUP2
730 case (MIU2_REG_BASE & 0xFF00):
731 {
732 direct_addr = MIU2_REG_BASE + (u32addr & 0xFF); //Direct_Base + addr_offset
733 GOP_WRITE2BYTE((direct_addr&0xFFFFF), u16val);
734 break;
735 }
736 #endif
737 default:
738 {
739 //Gop lib current do not support this HW ip base
740 MS_ASSERT(0);
741 break;
742 }
743
744 }
745 }
746
747
HAL_GOP_Write32Reg(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U32 u32addr,MS_U32 u32val)748 void HAL_GOP_Write32Reg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32addr, MS_U32 u32val)
749 {
750 MS_U32 bank;
751 MS_U32 direct_addr;
752
753 HAL_GOP_DEBUGINFO(printf("HAL_GOP_Write32Reg[%bx] = %lx\n", u32addr, u32val));
754
755 //* Gop driver should access another HW IP register
756 //* ex: SC's IP and OP setting, GE's det frame buffer setting, ChipTop GOP clk setting
757 switch (u32addr & 0xFF00)
758 {
759 case GOP_REG_BASE:
760 {
761 bank = (u32addr & 0xFF0000) >> 8;
762 if(bank==0xE00)//GOP4: 0x121B00
763 {
764 bank=GOP_REG_GOP4_BK_OFFSET;
765 }
766 else if(bank==0xF00)//GWIN4: 0x121E00
767 {
768 bank=GOP_REG_GOP4_GW_OFFSET;
769 }
770 else if(bank==0x1000) //GOP4_ST
771 {
772 bank=GOP_REG_GOP4_ST_OFFSET;
773 }
774
775 direct_addr = GOP_REG_DIRECT_BASE + bank + (u32addr & 0xFF);
776 GOP_WRITE2BYTE((direct_addr&0xFFFFF), (u32val&0xFFFF));
777 GOP_WRITE2BYTE((direct_addr&0xFFFFF)+2, (u32val&0xFFFF0000)>>16);
778 break;
779 }
780
781 case GE_REG_BASE:
782 case SC1_REG_BASE:
783 case CKG_REG_BASE:
784 {
785 GOP_WRITE2BYTE((u32addr&0xFFFF), (u32val&0xFFFF));
786 GOP_WRITE2BYTE((u32addr&0xFFFF)+2, (u32val&0xFFFF0000)>>16);
787 break;
788 }
789
790 default:
791 {
792 //Gop lib current do not support this HW ip base
793 MS_ASSERT(0);
794 break;
795 }
796
797 }
798 }
799
800 //extern E_BDMA_Ret MDrv_BDMA_Mem_Fill(MS_U32 u32Addr, MS_U32 u32Len, MS_U32 u32Pattern, E_BDMA_DstDev eDev);
801
HAL_GOP_Write32Pal(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 * pREGMAP_Base,MS_U16 * pREGMAP_Offset,MS_U32 u32REGMAP_Len,MS_U8 u8Index,MS_U8 u8A,MS_U8 u8R,MS_U8 u8G,MS_U8 u8B)802 void HAL_GOP_Write32Pal(GOP_CTX_HAL_LOCAL *pGOPHalLocal,
803 MS_U8 *pREGMAP_Base, MS_U16 *pREGMAP_Offset, MS_U32 u32REGMAP_Len,
804 MS_U8 u8Index, MS_U8 u8A, MS_U8 u8R, MS_U8 u8G, MS_U8 u8B)
805 {
806 MS_U8 i=0;
807 HAL_GOP_DEBUGINFO(printf("GOP_Write32Pal : i= %02bx, ARGB = %02bx,%02bx,%02bx,%02bx\n",u8Index, u8A, u8R, u8G, u8B));
808
809 /* Don't care high byte */
810 MS_ASSERT((MS_U32)(*pREGMAP_Offset +GOP_WordUnit)<= u32REGMAP_Len);
811
812 for(i =(GOP_WordUnit-1);i>4;i--)
813 {
814 *(pREGMAP_Base + *pREGMAP_Offset + i) = 0;
815 }
816 *(pREGMAP_Base + *pREGMAP_Offset + 4) = u8Index;
817 *(pREGMAP_Base + *pREGMAP_Offset + 3) = u8A;
818 *(pREGMAP_Base + *pREGMAP_Offset + 2) = u8R;
819 *(pREGMAP_Base + *pREGMAP_Offset + 1) = u8G;
820 *(pREGMAP_Base + *pREGMAP_Offset) = u8B;
821 *pREGMAP_Offset += GOP_WordUnit;
822
823 MsOS_FlushMemory(); //make sure cpu write data to dram
824
825 }
826
HAL_GOP_GetBPP(GOP_CTX_HAL_LOCAL * pGOPHalLocal,DRV_GOPColorType fbFmt)827 MS_U16 HAL_GOP_GetBPP(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOPColorType fbFmt)
828 {
829 MS_U16 bpp=0;
830
831 switch ( fbFmt )
832 {
833 case E_DRV_GOP_COLOR_RGB555_BLINK :
834 case E_DRV_GOP_COLOR_RGB565 :
835 case E_DRV_GOP_COLOR_ARGB1555:
836 case E_DRV_GOP_COLOR_RGBA5551:
837 case E_DRV_GOP_COLOR_ARGB4444 :
838 case E_DRV_GOP_COLOR_RGBA4444 :
839 case E_DRV_GOP_COLOR_RGB555YUV422:
840 case E_DRV_GOP_COLOR_YUV422:
841 case E_DRV_GOP_COLOR_2266:
842 bpp = 16;
843 break;
844 case E_DRV_GOP_COLOR_ARGB8888 :
845 case E_DRV_GOP_COLOR_ABGR8888 :
846 bpp = 32;
847 break;
848
849 case E_DRV_GOP_COLOR_I8 :
850 bpp = 8;
851 break;
852
853 default :
854 //print err
855 MS_ASSERT(0);
856 bpp = 0xFFFF;
857 break;
858 }
859 return bpp;
860
861 }
862
HAL_GOP_GWIN_SetBlending(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8win,MS_BOOL bEnable,MS_U8 u8coef)863 void HAL_GOP_GWIN_SetBlending(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8win, MS_BOOL bEnable, MS_U8 u8coef)
864 {
865 MS_U16 regval;
866 /*For compatibility
867 Old chip only have alpha coeffient 6 bits. Charka2 define UI alpha value base on it.*/
868 MS_U8 u8coef_cpt = u8coef;
869
870 //if UI alpha value based on alpha coeffient 6 bits, and our chip is 8bit, please do it.
871 if( pGOPHalLocal->User_ConsAlpha_bits != g_GopChipPro.Default_ConsAlpha_bits)
872 {
873 switch(u8coef)
874 {
875 case 0x0 :
876 u8coef_cpt = u8coef<<2;
877 break;
878 case 0x3f :
879 u8coef_cpt = ((u8coef<<2)|0x3);
880 break;
881 default:
882 u8coef_cpt = ((u8coef<<2)|0x1);
883 break;
884 }
885 }
886
887 /*alpha coeffient 6/8bit chip has GOP0,GOP1*/
888 if (u8win<(MAX_GOP0_GWIN+MAX_GOP1_GWIN))
889 {
890 regval = (MS_U16)(bEnable?(1<<14):0)|(MS_U16)((u8coef&0x3F)<<8);
891 HAL_GOP_Write16Reg(pGOPHalLocal, (u8win < MAX_GOP0_GWIN)? GOP_4G_GWIN0_CTRL(u8win):GOP_2G_GWIN_CTRL(u8win-MAX_GOP0_GWIN), regval, 0x4000);
892 HAL_GOP_Write16Reg(pGOPHalLocal, (u8win < MAX_GOP0_GWIN)? GOP_4G_GWIN_ALPHA01(u8win):GOP_2G_GWIN_ALPHA01(u8win-MAX_GOP0_GWIN), u8coef_cpt, 0xFF);
893 }
894 /*Only alpha coeffient 8bit chip has GOP2,GOP3...*/
895 else
896 {
897 if (u8win==(MAX_GOP0_GWIN+MAX_GOP1_GWIN))
898 {
899 regval = (MS_U16)(bEnable?(1<<14):0);
900 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_1G_GWIN0_CTRL, regval, 0x4000);
901 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_1G_GWIN_ALPHA01, u8coef, 0xFF);
902 }
903 else if ((u8win==(MAX_GOP0_GWIN+MAX_GOP1_GWIN+MAX_GOP2_GWIN)))
904 {
905 regval = (MS_U16)(bEnable?(1<<14):0);
906 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_1GX_GWIN0_CTRL, regval, 0x4000);
907 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_1GX_GWIN_ALPHA01, u8coef, 0xFF);
908 }
909 else
910 {
911 regval = (MS_U16)(bEnable?(1<<14):0);
912 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_1GS0_GWIN0_CTRL, regval, 0x4000);
913 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_1GS0_GWIN_ALPHA01, u8coef, 0xFF);
914 }
915 }
916 }
917
HAL_GOP_SetIOMapBase(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_VIRT addr)918 void HAL_GOP_SetIOMapBase(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_VIRT addr)
919 {
920 pGOPHalLocal->va_mmio_base = addr;
921 }
HAL_GOP_SetIOFRCMapBase(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_VIRT addr)922 void HAL_GOP_SetIOFRCMapBase(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_VIRT addr)
923 {
924 }
HAL_GOP_SetIOPMMapBase(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_VIRT addr)925 void HAL_GOP_SetIOPMMapBase(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_VIRT addr)
926 {
927 }
928
929
HAL_GOP_GWIN_SetDstPlane(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 GopNum,DRV_GOPDstType eDstType)930 GOP_Result HAL_GOP_GWIN_SetDstPlane(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 GopNum, DRV_GOPDstType eDstType)
931 {
932 /* GOP dst type:
933 1: IP (Main)
934 0: IP (Sub)
935 2: OP
936 */
937 MS_U16 u16RegVal;
938 MS_U32 u32BankOffSet;
939 MS_BOOL bEnable=FALSE;
940 MS_U16 u16HSyncMask=GOP_BIT14;
941
942 if( GopNum >= MAX_GOP_SUPPORT)
943 {
944 printf("[%s][%d] Out of GOP support!!! GOP=%d\n",__FUNCTION__,__LINE__ ,GopNum);
945 return GOP_INVALID_PARAMETERS;
946 }
947
948 switch (eDstType)
949 {
950 case E_DRV_GOP_DST_IP0:
951 u16RegVal = 0x0;
952 bEnable = FALSE;
953 u16HSyncMask=0;
954 break;
955
956 case E_DRV_GOP_DST_IP0_SUB:
957 u16RegVal = 0x1;
958 bEnable = TRUE;
959 u16HSyncMask=0;
960 break;
961
962 case E_DRV_GOP_DST_OP0:
963 u16RegVal = 0x2;
964 bEnable = FALSE;
965 u16HSyncMask=GOP_BIT14;
966 break;
967
968 case E_DRV_GOP_DST_VOP:
969 u16RegVal = 0x3;
970 bEnable = FALSE;
971 u16HSyncMask=GOP_BIT14;
972 break;
973
974 case E_DRV_GOP_DST_VOP_SUB:
975 u16RegVal = 0x4;
976 bEnable = FALSE;
977 u16HSyncMask=GOP_BIT14;
978 break;
979
980 default:
981 return GOP_FUN_NOT_SUPPORTED;
982 }
983
984 _GetBnkOfstByGop(GopNum, &u32BankOffSet);
985 HAL_GOP_SetGOP2Pto1P(pGOPHalLocal, GopNum, bEnable);
986 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_CTRL1, u16RegVal, BMASK(GOP_BIT3:0));
987
988 //for Monaco/Muji/Monet, IP need set Vsync inverse in IP
989 if (eDstType == E_DRV_GOP_DST_IP0)
990 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_CTRL0, (MS_U16)GOP_BIT1, GOP_BIT1);
991 else
992 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_CTRL0, (MS_U16)~GOP_BIT1, GOP_BIT1);
993
994 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_CTRL0, u16HSyncMask, GOP_BIT14); // Set mask Hsync when VFDE is low
995
996 return GOP_SUCCESS;
997 }
998
HAL_GOP_SetMixerDst(GOP_CTX_HAL_LOCAL * pGOPHalLocal,DRV_GOPDstType eDstType)999 GOP_Result HAL_GOP_SetMixerDst(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOPDstType eDstType)
1000 {
1001 return GOP_FUN_NOT_SUPPORTED;
1002 }
1003
HAL_GOP_GetMixerDst(GOP_CTX_HAL_LOCAL * pGOPHalLocal,DRV_GOPDstType * pGopDst)1004 GOP_Result HAL_GOP_GetMixerDst(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOPDstType *pGopDst)
1005 {
1006 return GOP_FUN_NOT_SUPPORTED;
1007 }
1008
HAL_GOP_InitMux(GOP_CTX_HAL_LOCAL * pGOPHalLocal)1009 GOP_Result HAL_GOP_InitMux(GOP_CTX_HAL_LOCAL *pGOPHalLocal)
1010 {
1011 /*T8
1012 OP path: support 3 mux (mux0, mux 2, mux3) to blend with SC simultaneously
1013 IP path: support mux0 and mux1 to IPMain/IPSub. Only one mux of mux0 and mux1 can be blended to IPMain/IPSub
1014 SW default setting=> mux0:gop1g, mux1:gop1gx, mux2:gop2g, mux3:gop4g
1015 */
1016 MS_U8 gop4g=0, gop2g=1, gop1g=2, gop1gx=3, gop1gs=4;
1017 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX, ((gop1gs<<(GOP_MUX_SHIFT*4))|(gop1gx<<(GOP_MUX_SHIFT*3))|(gop1g<<(GOP_MUX_SHIFT*2))|(gop2g<<(GOP_MUX_SHIFT*1))|gop4g), GOP_REG_WORD_MASK);
1018 return GOP_SUCCESS;
1019 }
1020
HAL_GOP_GWIN_GetMUX(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 * u8GOPNum,Gop_MuxSel eGopMux)1021 void HAL_GOP_GWIN_GetMUX(GOP_CTX_HAL_LOCAL*pGOPHalLocal, MS_U8* u8GOPNum, Gop_MuxSel eGopMux)
1022 {
1023 MS_U16 u16GopMux=0;
1024 switch(eGopMux)
1025 {
1026 case E_GOP_MUX0:
1027 case E_GOP_MUX1:
1028 case E_GOP_MUX2:
1029 case E_GOP_MUX3:
1030 case E_GOP_MUX4:
1031 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MUX, &u16GopMux);
1032 *u8GOPNum = (u16GopMux >> (eGopMux*GOP_MUX_SHIFT))& GOP_REGMUX_MASK;
1033 break;
1034 case E_GOP_IP0_MUX:
1035 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MUX_IPVOP, &u16GopMux);
1036 *u8GOPNum = (u16GopMux&GOP_IP_MAIN_MUX_MASK)>>GOP_IP_MAIN_MUX_SHIFT;
1037 break;
1038 case E_GOP_IP0_SUB_MUX:
1039 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MUX_IPVOP, &u16GopMux);
1040 *u8GOPNum = (u16GopMux&GOP_IP_SUB_MUX_MASK)>>GOP_IP_SUB_MUX_SHIFT;
1041 break;
1042 case E_GOP_VOP0_MUX:
1043 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MUX_IPVOP, &u16GopMux);
1044 *u8GOPNum = (u16GopMux&GOP_IP_VOP0_MUX_MASK)>>GOP_IP_VOP0_MUX_SHIFT;
1045 break;
1046 case E_GOP_VOP0_SUB_MUX:
1047 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MUX_IPVOP, &u16GopMux);
1048 *u8GOPNum = (u16GopMux&GOP_IP_VOP1_MUX_MASK)>>GOP_IP_VOP1_MUX_SHIFT;
1049 break;
1050 case E_GOP_Mix_MUX0:
1051 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MUX4_MIX_VE, &u16GopMux);
1052 *u8GOPNum = (u16GopMux&GOP_Mix_MUX0_MASK)>>GOP_Mix_MUX0_SHIFT;
1053 break;
1054 case E_GOP_Mix_MUX1:
1055 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MUX4_MIX_VE, &u16GopMux);
1056 *u8GOPNum = (u16GopMux&GOP_Mix_MUX1_MASK)>>GOP_Mix_MUX1_SHIFT;
1057 break;
1058 case E_GOP_VE0_MUX:
1059 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MUX4_MIX_VE, &u16GopMux);
1060 *u8GOPNum = (u16GopMux&GOP_VE0_MUX_MASK)>>GOP_VE0_MUX_SHIFT;
1061 break;
1062 case E_GOP_VE1_MUX:
1063 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MUX4_MIX_VE, &u16GopMux);
1064 *u8GOPNum = (u16GopMux&GOP_VE1_MUX_MASK)>>GOP_VE1_MUX_SHIFT;
1065 break;
1066 case E_GOP_DIP_MUX:
1067 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MUX_4K2K, &u16GopMux);
1068 *u8GOPNum = (u16GopMux&GOP_DIP_MUX_MASK)>>GOP_DIP_MUX_SHIFT;
1069 break;
1070 case E_GOP_FRC_MUX0:
1071 case E_GOP_FRC_MUX1:
1072 case E_GOP_FRC_MUX2:
1073 case E_GOP_FRC_MUX3:
1074 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MUX_4K2K, &u16GopMux);
1075 *u8GOPNum = (u16GopMux >> ((eGopMux%E_GOP_FRC_MUX0)*GOP_FRC_MUX_SHIFT))& GOP_FRC_REGMUX_MASK;
1076 break;
1077 case E_GOP_BYPASS_MUX0:
1078 break;
1079 default:
1080 printf("[%s]ERROR, not support the mux[%d]\n",__FUNCTION__,eGopMux);
1081 break;
1082 }
1083 }
1084
HAL_GOP_GWIN_SetMUX(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GOPNum,Gop_MuxSel eGopMux)1085 void HAL_GOP_GWIN_SetMUX(GOP_CTX_HAL_LOCAL*pGOPHalLocal, MS_U8 u8GOPNum, Gop_MuxSel eGopMux)
1086 {
1087 MS_U16 u16Ret[4]={0};
1088
1089 switch(eGopMux)
1090 {
1091 case E_GOP_MUX0:
1092 case E_GOP_MUX1:
1093 case E_GOP_MUX2:
1094 case E_GOP_MUX3:
1095 case E_GOP_MUX4:
1096 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX, u8GOPNum <<(GOP_MUX_SHIFT*eGopMux), GOP_REGMUX_MASK<<(GOP_MUX_SHIFT*eGopMux));
1097 break;
1098 case E_GOP_IP0_MUX:
1099 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX_IPVOP, u8GOPNum << GOP_IP_MAIN_MUX_SHIFT, GOP_IP_MAIN_MUX_MASK);
1100 break;
1101 case E_GOP_IP1_MUX:
1102 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX_IPVOP, u8GOPNum << GOP_IP_MAIN_MUX_SHIFT, GOP_IP_MAIN_MUX_MASK);
1103 break;
1104 case E_GOP_VOP0_MUX:
1105 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX_IPVOP, u8GOPNum << GOP_IP_VOP0_MUX_SHIFT, GOP_IP_VOP0_MUX_MASK);
1106 break;
1107 case E_GOP_VOP1_MUX:
1108 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX_IPVOP, u8GOPNum << GOP_IP_VOP1_MUX_SHIFT, GOP_IP_VOP1_MUX_MASK);
1109 break;
1110 case E_GOP_Mix_MUX0:
1111 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX4_MIX_VE, u8GOPNum << GOP_Mix_MUX0_SHIFT, GOP_Mix_MUX0_MASK);
1112 break;
1113 case E_GOP_Mix_MUX1:
1114 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX4_MIX_VE, u8GOPNum << GOP_Mix_MUX1_SHIFT, GOP_Mix_MUX1_MASK);
1115 break;
1116 case E_GOP_VE0_MUX:
1117 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX4_MIX_VE, u8GOPNum << GOP_VE0_MUX_SHIFT, GOP_VE0_MUX_MASK);
1118 break;
1119 case E_GOP_VE1_MUX:
1120 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX4_MIX_VE, u8GOPNum << GOP_VE1_MUX_SHIFT, GOP_VE1_MUX_MASK);
1121 break;
1122 case E_GOP_DIP_MUX:
1123 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX_4K2K, u8GOPNum << GOP_DIP_MUX_SHIFT, GOP_DIP_MUX_MASK);
1124 break;
1125 case E_GOP_FRC_MUX0:
1126 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX_4K2K, u8GOPNum <<(GOP_FRC_MUX_SHIFT*(eGopMux%E_GOP_FRC_MUX0)) , GOP_REGMUX_MASK<<(GOP_FRC_MUX_SHIFT*(eGopMux%E_GOP_FRC_MUX0)));
1127 break;
1128 case E_GOP_FRC_MUX1:
1129 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX_4K2K, u8GOPNum <<(GOP_FRC_MUX_SHIFT*(eGopMux%E_GOP_FRC_MUX0)) , GOP_REGMUX_MASK<<(GOP_FRC_MUX_SHIFT*(eGopMux%E_GOP_FRC_MUX0)));
1130 break;
1131 case E_GOP_FRC_MUX2:
1132 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX_4K2K, u8GOPNum <<(GOP_FRC_MUX_SHIFT*(eGopMux%E_GOP_FRC_MUX0)) , GOP_REGMUX_MASK<<(GOP_FRC_MUX_SHIFT*(eGopMux%E_GOP_FRC_MUX0)));
1133 break;
1134 case E_GOP_FRC_MUX3:
1135 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX_4K2K, u8GOPNum <<(GOP_FRC_MUX_SHIFT*(eGopMux%E_GOP_FRC_MUX0)) , GOP_REGMUX_MASK<<(GOP_FRC_MUX_SHIFT*(eGopMux%E_GOP_FRC_MUX0)));
1136 break;
1137 case E_GOP_BYPASS_MUX0:
1138 //Check MUX is using? Checking from priority high to low
1139 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_FRC_LAYER2_L_EN, &u16Ret[0]);
1140 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_FRC_LAYER2_R_EN, &u16Ret[1]);
1141 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_FRC_LAYER1_L_EN, &u16Ret[2]);
1142 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_FRC_LAYER1_R_EN, &u16Ret[3]);
1143
1144 //Checking if un-use
1145 if((u16Ret[0] & GOP_BIT0) ==0)
1146 {
1147 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX_4K2K, u8GOPNum <<(GOP_FRC_MUX_SHIFT*(E_GOP_FRC_MUX2%E_GOP_FRC_MUX0)) , GOP_REGMUX_MASK<<(GOP_FRC_MUX_SHIFT*(E_GOP_FRC_MUX2%E_GOP_FRC_MUX0)));
1148 }
1149 else if((u16Ret[1] & GOP_BIT0) ==0)
1150 {
1151 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX_4K2K, u8GOPNum <<(GOP_FRC_MUX_SHIFT*(E_GOP_FRC_MUX3%E_GOP_FRC_MUX0)) , GOP_REGMUX_MASK<<(GOP_FRC_MUX_SHIFT*(E_GOP_FRC_MUX3%E_GOP_FRC_MUX0)));
1152 }
1153 else if((u16Ret[2] & GOP_BIT0) ==0)
1154 {
1155 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX_4K2K, u8GOPNum <<(GOP_FRC_MUX_SHIFT*(E_GOP_FRC_MUX0%E_GOP_FRC_MUX0)) , GOP_REGMUX_MASK<<(GOP_FRC_MUX_SHIFT*(E_GOP_FRC_MUX0%E_GOP_FRC_MUX0)));
1156 }
1157 else if((u16Ret[3] & GOP_BIT0) ==0)
1158 {
1159 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX_4K2K, u8GOPNum <<(GOP_FRC_MUX_SHIFT*(E_GOP_FRC_MUX1%E_GOP_FRC_MUX0)) , GOP_REGMUX_MASK<<(GOP_FRC_MUX_SHIFT*(E_GOP_FRC_MUX1%E_GOP_FRC_MUX0)));
1160 }
1161 else
1162 {
1163 printf("[%s][%d]FRC mux is already full.\n",__FUNCTION__,__LINE__);
1164 }
1165 break;
1166 break;
1167 default:
1168 printf("[%s]ERROR mux setting\n",__FUNCTION__);
1169 break;
1170 }
1171 }
1172
HAL_GOP_SetGOPEnable2SC(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 gopNum,MS_BOOL bEnable)1173 GOP_Result HAL_GOP_SetGOPEnable2SC(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEnable)
1174 {
1175 /* GOP OP Path enable to SC Setting
1176 A5: GOP OP Path blending with SC sequence
1177 mux1-->mux0-->mux2-->mux3
1178 */
1179 MS_U16 muxValue=0, regval=0;
1180
1181 DRV_GOPDstType pGopDst = E_DRV_GOP_DST_INVALID;
1182 MS_U16 u164K2KMuxValue=0;
1183
1184 if(gopNum >= MAX_GOP_SUPPORT)
1185 {
1186 printf("[%s][%d] Out of GOP support!!! GOP=%d\n",__FUNCTION__,__LINE__ ,gopNum);
1187 return GOP_FAIL;
1188 }
1189
1190 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MUX, &muxValue);
1191 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_GOPEN, ®val);
1192
1193 if (gopNum== (muxValue & GOP_MUX0_MASK)) //enable mux0 to SC
1194 {
1195 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_GOPEN, bEnable?(regval |GOP_BIT15):(regval & ~GOP_BIT15), GOP_BIT15);
1196 }
1197
1198 if (gopNum== ((muxValue & GOP_MUX1_MASK)>>(GOP_MUX_SHIFT*1))) //enable mux1
1199 {
1200 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_GOPEN, bEnable?(regval | GOP_BIT12):(regval & ~GOP_BIT12), GOP_BIT12);
1201 }
1202
1203 if (gopNum== ((muxValue & GOP_MUX2_MASK)>>(GOP_MUX_SHIFT*2))) //enable mux2
1204 {
1205 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_GOPEN, bEnable?(regval |GOP_BIT14):(regval & ~GOP_BIT14), GOP_BIT14);
1206 }
1207
1208 if (gopNum== ((muxValue & GOP_MUX3_MASK)>>(GOP_MUX_SHIFT*3))) //enable mux3
1209 {
1210 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_GOPEN, bEnable?(regval |GOP_BIT13):(regval & ~GOP_BIT13), GOP_BIT13);
1211 }
1212
1213 if (gopNum== ((muxValue & GOP_MUX4_MASK)>> (GOP_MUX_SHIFT*4))) //enable mux4
1214 {
1215 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_GOPEN, bEnable?(regval |GOP_BIT11):(regval & ~GOP_BIT11), GOP_BIT11);
1216 }
1217
1218 /*For FRC mux switch*/
1219 HAL_GOP_GetGOPDst(pGOPHalLocal, gopNum, &pGopDst);
1220 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MUX_4K2K, &u164K2KMuxValue);
1221 if (gopNum== (u164K2KMuxValue & GOP_MUX0_MASK))
1222 {
1223 /* Switch FRC blending */
1224 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_FRC_LAYER1_L_EN, (pGopDst==E_DRV_GOP_DST_BYPASS)?GOP_BIT0: ~GOP_BIT0, GOP_BIT0);
1225 }
1226
1227 if (gopNum== ((u164K2KMuxValue & GOP_MUX1_MASK)>>(GOP_MUX_SHIFT*1)))
1228 {
1229 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_FRC_LAYER1_R_EN, (pGopDst==E_DRV_GOP_DST_BYPASS)?GOP_BIT0: ~GOP_BIT0, GOP_BIT0);
1230 }
1231
1232 if (gopNum== ((u164K2KMuxValue & GOP_MUX2_MASK)>>(GOP_MUX_SHIFT*2)))
1233 {
1234 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_FRC_LAYER2_L_EN, (pGopDst==E_DRV_GOP_DST_BYPASS)?GOP_BIT0: ~GOP_BIT0, GOP_BIT0);
1235 }
1236
1237 if (gopNum== ((u164K2KMuxValue & GOP_MUX3_MASK)>>(GOP_MUX_SHIFT*3)))
1238 {
1239 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_FRC_LAYER2_R_EN, (pGopDst==E_DRV_GOP_DST_BYPASS)?GOP_BIT0: ~GOP_BIT0, GOP_BIT0);
1240 }
1241
1242 return GOP_SUCCESS;
1243 }
1244
HAL_GOP_SetGOP2Pto1P(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 gopNum,MS_BOOL bEnable)1245 GOP_Result HAL_GOP_SetGOP2Pto1P(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEnable)
1246 {
1247 MS_U32 u32pBankOffSet=0;
1248 MS_U16 u16Regval;
1249
1250 if(g_GopChipPro.b2Pto1PSupport)
1251 {
1252 _GetBnkOfstByGop(gopNum, &u32pBankOffSet);
1253 HAL_GOP_Read16Reg(pGOPHalLocal, u32pBankOffSet + GOP_4G_SRAM_BORROW, &u16Regval);
1254 HAL_GOP_Write16Reg(pGOPHalLocal, u32pBankOffSet + GOP_4G_SRAM_BORROW, bEnable?(u16Regval |0x0800):(u16Regval & ~0x0800), 0x0800);
1255 }
1256 return GOP_SUCCESS;
1257 }
1258
HAL_GOP_SetGOPEnable2Mode1(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 gopNum,MS_BOOL bEnable)1259 GOP_Result HAL_GOP_SetGOPEnable2Mode1(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEnable)
1260 {
1261 /* GOP OP Path enable to SC Setting
1262 A5: GOP OP Path blending with SC sequence
1263 mux1-->mux0-->mux2-->mux3
1264 */
1265 MS_U16 muxValue=0, regval=0;
1266
1267 if(gopNum >= MAX_GOP_SUPPORT)
1268 {
1269 printf("[%s][%d] Out of GOP support!!! GOP=%d\n",__FUNCTION__,__LINE__ ,gopNum );
1270 return FALSE;
1271 }
1272
1273 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MUX, &muxValue);
1274 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_GOPENMODE1, ®val);
1275 if (gopNum== (muxValue & GOP_MUX0_MASK)) //enable mux0 to SC
1276 {
1277 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_GOPENMODE1, bEnable?(regval |0x10):(regval & ~0x10), 0x30);
1278 }
1279 else if (gopNum== ((muxValue & GOP_MUX1_MASK)>>(GOP_MUX_SHIFT*1))) //enable mux1
1280 {
1281 //printf("");
1282 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_GOPENMODE1, bEnable?(regval |0x1000):(regval & ~0x1000), 0x3000);
1283 }
1284 else if (gopNum== ((muxValue & GOP_MUX2_MASK)>>(GOP_MUX_SHIFT*2))) //enable mux2
1285 {
1286 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_GOPENMODE1, bEnable?(regval |0x40):(regval & ~0x40), 0xC0);
1287 }
1288 else if (gopNum== ((muxValue & GOP_MUX3_MASK)>>(GOP_MUX_SHIFT*3))) //enable mux3
1289 {
1290 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_GOPENMODE1, bEnable?(regval |0x100):(regval & ~0x100), 0x300);
1291 }
1292 else if (gopNum== ((muxValue & GOP_MUX4_MASK)>> (GOP_MUX_SHIFT*4))) //enable mux4
1293 {
1294 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_GOPENMODE1, bEnable?(regval |0x4000):(regval & ~0x4000), 0xc000);
1295 }
1296 else
1297 {
1298 return GOP_FAIL;
1299 }
1300 return GOP_SUCCESS;
1301 }
1302
HAL_GOP_GetGOPAlphaMode1(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 gopNum,MS_BOOL * pbEnable)1303 GOP_Result HAL_GOP_GetGOPAlphaMode1(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL *pbEnable)
1304 {
1305 MS_U16 muxValue=0, regval=0;
1306
1307 if(gopNum >= MAX_GOP_SUPPORT)
1308 {
1309 printf("[%s][%d] Out of GOP support!!! GOP=%d\n",__FUNCTION__,__LINE__ ,gopNum );
1310 return FALSE;
1311 }
1312
1313 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MUX, &muxValue);
1314 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_GOPENMODE1, ®val);
1315 if (gopNum== (muxValue & GOP_MUX0_MASK)) //enable mux0 to SC
1316 {
1317 *pbEnable = (regval & GOP_BIT4) == GOP_BIT4;
1318 }
1319 else if (gopNum== ((muxValue & GOP_MUX1_MASK)>>(GOP_MUX_SHIFT*1))) //enable mux1
1320 {
1321 *pbEnable = (regval & GOP_BIT12) == GOP_BIT12;
1322 }
1323 else if (gopNum== ((muxValue & GOP_MUX2_MASK)>>(GOP_MUX_SHIFT*2))) //enable mux2
1324 {
1325 *pbEnable = (regval & GOP_BIT6) == GOP_BIT6;
1326 }
1327 else if (gopNum== ((muxValue & GOP_MUX3_MASK)>>(GOP_MUX_SHIFT*3))) //enable mux3
1328 {
1329 *pbEnable = (regval & GOP_BIT8) == GOP_BIT8;
1330 }
1331 else if (gopNum== ((muxValue & GOP_MUX4_MASK)>> (GOP_MUX_SHIFT*4))) //enable mux4
1332 {
1333 *pbEnable = (regval & GOP_BIT14) == GOP_BIT14;
1334 }
1335 else
1336 {
1337 return GOP_FAIL;
1338 }
1339 return GOP_SUCCESS;
1340 }
1341
HAL_GOP_SetGOPHighPri(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 gopNum)1342 GOP_Result HAL_GOP_SetGOPHighPri(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum)
1343 {
1344 /*T8
1345 OP path: support 4 mux (mux0, mux1, mux 2, mux3) to blend with SC simultaneously
1346 IP path: support mux0 and mux1 to IPMain/IPSub. Only one mux of mux0 and mux1 can be blended to IPMain/IPSub
1347 */
1348 MS_U16 Mux3Gop, muxValue=0, i;
1349 MS_U16 MuxShift;
1350
1351 MuxShift = GOP_MUX_SHIFT * E_GOP_MUX3;
1352
1353 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MUX, &muxValue);
1354 for (i=0; i<MAX_GOP_MUX;i++) //T8 4 mux
1355 {
1356 if (gopNum== ((muxValue&(GOP_REGMUX_MASK<<(i*GOP_MUX_SHIFT)))>>(i*GOP_MUX_SHIFT)))
1357 {
1358 Mux3Gop = (muxValue&GOP_MUX3_MASK)>> MuxShift; //save mux2 gop
1359
1360 muxValue &= ~GOP_MUX3_MASK; //clear mux2 setting
1361 muxValue &= ~(GOP_REGMUX_MASK<<(i*GOP_MUX_SHIFT)); //clear current mux setting
1362 muxValue |= ((gopNum<< MuxShift)|(Mux3Gop<<(i*GOP_MUX_SHIFT)));
1363 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX, muxValue, GOP_REG_WORD_MASK);
1364 break;
1365
1366 }
1367
1368 }
1369 return GOP_SUCCESS;
1370 }
1371
HAL_GOP_SetGOPClk(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 gopNum,DRV_GOPDstType eDstType)1372 GOP_Result HAL_GOP_SetGOPClk(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, DRV_GOPDstType eDstType)
1373 {
1374 /*T8 GOP dst type:
1375 0: IP (Main)
1376 1: IP (Sub)
1377 2: OP
1378 3: MVOP
1379 */
1380
1381 /* Monaco clkgen setting */
1382 /******************
1383 0: odclk
1384 1: idclk_f2 (ipm)
1385 2: idclk_f1 (ips)
1386 3: ocmixer
1387 4: ve
1388 5 : mvop main
1389 6 : mvop sub
1390 ******************/
1391 if(gopNum >= MAX_GOP_SUPPORT)
1392 {
1393 printf("[%s][%d] Out of GOP support!!! GOP=%d\n",__FUNCTION__,__LINE__ ,gopNum);
1394 MS_ASSERT(0);
1395 return GOP_INVALID_PARAMETERS;
1396 }
1397
1398 switch(eDstType)
1399 {
1400 case E_DRV_GOP_DST_IP0:
1401 if (gopNum==E_GOP1)
1402 {
1403 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOPCLK, CKG_GOPG1_IDCLK2, CKG_GOPG1_MASK);
1404 }
1405 else if (gopNum ==E_GOP2)
1406 {
1407 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOP2CLK, CKG_GOPG2_IDCLK2, CKG_GOPG2_MASK);
1408 }
1409 else if (gopNum==E_GOP0)
1410 {
1411 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOPCLK, CKG_GOPG0_IDCLK2, CKG_GOPG0_MASK);
1412 }
1413 else
1414 {
1415 MS_ASSERT(0);
1416 return GOP_INVALID_PARAMETERS;
1417 }
1418 break;
1419
1420 case E_DRV_GOP_DST_IP0_SUB:
1421 if (gopNum==E_GOP1)
1422 {
1423 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOPCLK, CKG_GOPG1_IDCLK1, CKG_GOPG1_MASK);
1424 }
1425 else if (gopNum==E_GOP2)
1426 {
1427 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOP2CLK, CKG_GOPG2_IDCLK1, CKG_GOPG2_MASK);
1428 }
1429 else if (gopNum==E_GOP0)
1430 {
1431 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOPCLK, CKG_GOPG0_IDCLK1, CKG_GOPG0_MASK);
1432 }
1433 else
1434 {
1435 MS_ASSERT(0);
1436 return GOP_INVALID_PARAMETERS;
1437 }
1438 break;
1439
1440 case E_DRV_GOP_DST_OP0:
1441 if (gopNum==E_GOP1)
1442 {
1443 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOPCLK, CKG_GOPG1_ODCLK, CKG_GOPG1_MASK);
1444 }
1445 else if (gopNum==E_GOP2)
1446 {
1447 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOP2CLK, CKG_GOPG2_ODCLK, CKG_GOPG2_MASK);
1448 }
1449 else if (gopNum==E_GOP0)
1450 {
1451 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOPCLK, CKG_GOPG0_ODCLK, CKG_GOPG0_MASK);
1452 }
1453 else
1454 {
1455 MS_ASSERT(0);
1456 return GOP_INVALID_PARAMETERS;
1457 }
1458 break;
1459
1460 case E_DRV_GOP_DST_VOP:
1461 if (gopNum==E_GOP1)
1462 {
1463 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOPCLK, CKG_GOPG1_IDCLK2, CKG_GOPG1_MASK);
1464 }
1465 else if (gopNum ==E_GOP2)
1466 {
1467 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOPCLK, CKG_GOPG2_IDCLK2, CKG_GOPG2_MASK);
1468 }
1469 else if (gopNum==E_GOP0)
1470 {
1471 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOPCLK, CKG_GOPG0_IDCLK2, CKG_GOPG0_MASK);
1472 }
1473 else
1474 {
1475 MS_ASSERT(0);
1476 return GOP_INVALID_PARAMETERS;
1477 }
1478 break;
1479
1480 default:
1481 MS_ASSERT(0);
1482 return GOP_ENUM_NOT_SUPPORTED;
1483 }
1484 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_GOPCLK, &pGOPHalLocal->u16Clk0Setting); //Backup current GOPG clock settings
1485 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SRAMCLK,&pGOPHalLocal->u16Clk2Setting); //Backup current SRAM clock settings
1486
1487 return GOP_SUCCESS;
1488 }
1489
1490
HAL_GOP_SetClkForCapture(GOP_CTX_HAL_LOCAL * pGOPHalLocal,DRV_GOP_DWIN_SRC_SEL enSrcSel)1491 GOP_Result HAL_GOP_SetClkForCapture(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOP_DWIN_SRC_SEL enSrcSel)
1492 {
1493 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOP2CLK, 0, GOP_BIT8);
1494 if (enSrcSel==GOP_DRV_DWIN_SRC_OP)
1495 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOP2CLK, CKG_GOPD_CLK_ODCLK, CKG_GOPD_MASK);
1496 else if (enSrcSel==GOP_DRV_DWIN_SRC_MVOP)
1497 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOP2CLK, CKG_GOPD_CLK_DC0CLK, CKG_GOPD_MASK);
1498 else if (enSrcSel==GOP_DRV_DWIN_SRC_IP)
1499 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOP2CLK, CKG_GOPD_CLK_IDCLK2, CKG_GOPD_MASK);
1500 else
1501 return GOP_INVALID_PARAMETERS;
1502
1503 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_GOP2CLK, &pGOPHalLocal->u16Clk1Setting); //Backup current GOPD clock settings
1504 return GOP_SUCCESS;
1505 }
HAL_GOP_SetClock(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_BOOL bEnable)1506 GOP_Result HAL_GOP_SetClock(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_BOOL bEnable)
1507 {
1508 if (bEnable)
1509 {
1510 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOPCLK, pGOPHalLocal->u16Clk0Setting, GOP_REG_WORD_MASK);
1511 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOP2CLK, pGOPHalLocal->u16Clk1Setting, GOP_REG_WORD_MASK);
1512 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SRAMCLK, pGOPHalLocal->u16Clk2Setting, GOP_REG_WORD_MASK);
1513 }
1514 else
1515 {
1516 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOPCLK, CKG_GOPG0_DISABLE_CLK, CKG_GOPG0_MASK);
1517 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOPCLK, CKG_GOPG1_DISABLE_CLK, CKG_GOPG1_MASK);
1518 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOP2CLK, CKG_GOPG2_DISABLE_CLK, CKG_GOPG2_MASK);
1519 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOP2CLK, CKG_GOPD_DISABLE_CLK, CKG_GOPD_MASK);
1520 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SRAMCLK, CKG_SRAM0_DISABLE_CLK, CKG_SRAM0_MASK);
1521 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SRAMCLK, CKG_SRAM1_DISABLE_CLK, CKG_SRAM1_MASK);
1522 }
1523
1524 return GOP_SUCCESS;
1525 }
1526
HAL_GOP_MIXER_SetGOPEnable2Mixer(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 gopNum,MS_BOOL bEnable)1527 GOP_Result HAL_GOP_MIXER_SetGOPEnable2Mixer(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEnable)
1528 {
1529 return GOP_FUN_NOT_SUPPORTED;
1530 }
1531
HAL_GOP_MIXER_SetMux(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 gopNum,MS_U8 muxNum,MS_BOOL bEnable)1532 GOP_Result HAL_GOP_MIXER_SetMux(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_U8 muxNum, MS_BOOL bEnable)
1533 {
1534 return GOP_FUN_NOT_SUPPORTED;
1535 }
1536
HAL_GOP_MIXER_EnableOldBlendMode(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GOP,MS_BOOL bEn)1537 GOP_Result HAL_GOP_MIXER_EnableOldBlendMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_BOOL bEn)
1538 {
1539 return GOP_FUN_NOT_SUPPORTED;
1540 }
1541
HAL_GOP_Init_Context(GOP_CTX_HAL_LOCAL * pGOPHalLocal,GOP_CTX_HAL_SHARED * pHALShared,MS_BOOL bNeedInitShared)1542 void HAL_GOP_Init_Context(GOP_CTX_HAL_LOCAL *pGOPHalLocal, GOP_CTX_HAL_SHARED *pHALShared, MS_BOOL bNeedInitShared)
1543 {
1544 MS_U32 u32GopIdx;
1545
1546 memset(pGOPHalLocal, 0, sizeof(*pGOPHalLocal));
1547 pGOPHalLocal->pHALShared = pHALShared;
1548
1549 for(u32GopIdx=0; u32GopIdx<MAX_GOP_SUPPORT; u32GopIdx++)
1550 {
1551 pGOPHalLocal->drvGFlipGOPDst[u32GopIdx] = E_DRV_GOP_DST_OP0;
1552 }
1553 pGOPHalLocal->pGopChipPro = &pHALShared->gopChipProperty;
1554 pGOPHalLocal->pbIsMuxVaildToGopDst = (MS_BOOL *)bIsMuxVaildToGopDst;
1555 }
HAL_GOP_Restore_Ctx(GOP_CTX_HAL_LOCAL * pGOPHalLocal)1556 void HAL_GOP_Restore_Ctx(GOP_CTX_HAL_LOCAL *pGOPHalLocal)
1557 {
1558 }
1559
HAL_ConvertAPIAddr(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 gwinid,MS_PHY * u64Adr)1560 GOP_Result HAL_ConvertAPIAddr(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gwinid, MS_PHY* u64Adr)
1561 {
1562 MS_U8 u8Miu=0xff;
1563 MS_U16 u16RegVal_L=0;
1564 #ifdef GOP_MIU_GROUP2
1565 MS_U16 u16RegVal_H=0;
1566 #endif
1567
1568 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_MIU_SEL, &u16RegVal_L);
1569 #ifdef GOP_MIU_GROUP2
1570 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MIU_GROUP2, &u16RegVal_H);
1571 #endif
1572 if (gwinid<MAX_GOP0_GWIN) //gop0
1573 {
1574 u16RegVal_L &= BIT(GOP_MIU_CLIENT_GOP0);
1575 #ifdef GOP_MIU_GROUP2
1576 u16RegVal_H &= BIT(GOP_MIU_CLIENT_GOP0);
1577 u8Miu = (u16RegVal_L>>GOP_MIU_CLIENT_GOP0) | (u16RegVal_H>>GOP_MIU_CLIENT_GOP0)<<1;
1578 #else
1579 u8Miu = (u16RegVal_L>>GOP_MIU_CLIENT_GOP0);
1580 #endif
1581 }
1582 else if (gwinid>=MAX_GOP0_GWIN && gwinid<MAX_GOP0_GWIN+MAX_GOP1_GWIN) //gop1
1583 {
1584 u16RegVal_L &= BIT(GOP_MIU_CLIENT_GOP1);
1585 #ifdef GOP_MIU_GROUP2
1586 u16RegVal_H &= BIT(GOP_MIU_CLIENT_GOP1);
1587 u8Miu = (u16RegVal_L>>GOP_MIU_CLIENT_GOP1) | (u16RegVal_H>>GOP_MIU_CLIENT_GOP1)<<1;
1588 #else
1589 u8Miu = (u16RegVal_L>>GOP_MIU_CLIENT_GOP1);
1590 #endif
1591 }
1592 else if (gwinid==GOP2_GwinIdBase) //gop2
1593 {
1594 u16RegVal_L &= BIT(GOP_MIU_CLIENT_GOP2);
1595 #ifdef GOP_MIU_GROUP2
1596 u16RegVal_H &= BIT(GOP_MIU_CLIENT_GOP2);
1597 u8Miu = (u16RegVal_L>>GOP_MIU_CLIENT_GOP2) | (u16RegVal_H>>GOP_MIU_CLIENT_GOP2)<<1;
1598 #else
1599 u8Miu = (u16RegVal_L>>GOP_MIU_CLIENT_GOP2);
1600 #endif
1601 }
1602 else
1603 {
1604 return GOP_FAIL;
1605 }
1606
1607 if (u8Miu <= 2)
1608 {
1609 _miu_offset_to_phy(u8Miu, *u64Adr, *u64Adr);
1610 }
1611 else
1612 {
1613 printf("[%s] ERROR GOP miu client\n",__FUNCTION__);
1614 return GOP_FAIL;
1615 }
1616 return GOP_SUCCESS;
1617 }
HAL_GOP_GetMIUDst(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 gopnum)1618 MS_U8 HAL_GOP_GetMIUDst(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopnum)
1619 {
1620 MS_U8 u8Miu=0xff;
1621 MS_U16 u16RegVal_L=0;
1622 MS_U32 u32BnkOfst=0xFFFF;
1623 #ifdef GOP_MIU_GROUP2
1624 MS_U16 u16RegVal_H=0;
1625 #endif
1626
1627 if(pGOPHalLocal->pGopChipPro->bInternalMIUSelect[gopnum]==TRUE)
1628 {
1629 _GetBnkOfstByGop(gopnum, &u32BnkOfst);
1630 HAL_GOP_Read16Reg(pGOPHalLocal, u32BnkOfst+GOP_4G_MIU_SEL, &u16RegVal_L);
1631 u8Miu= u16RegVal_L& (GOP_BIT0|GOP_BIT1);
1632 }
1633 else
1634 {
1635 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_MIU_SEL, &u16RegVal_L);
1636
1637 #ifdef GOP_MIU_GROUP2
1638 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MIU_GROUP2, &u16RegVal_H);
1639 #endif
1640 switch (gopnum)
1641 {
1642 case 0:
1643 u16RegVal_L &= BIT(GOP_MIU_CLIENT_GOP0);
1644 #ifdef GOP_MIU_GROUP2
1645 u16RegVal_H &= BIT(GOP_MIU_CLIENT_GOP0);
1646 u8Miu = (u16RegVal_L>>GOP_MIU_CLIENT_GOP0) | (u16RegVal_H>>GOP_MIU_CLIENT_GOP0)<<1;
1647 #else
1648 u8Miu = (u16RegVal_L>>GOP_MIU_CLIENT_GOP0);
1649 #endif
1650 break;
1651 case 1:
1652 u16RegVal_L &= BIT(GOP_MIU_CLIENT_GOP1);
1653 #ifdef GOP_MIU_GROUP2
1654 u16RegVal_H &= BIT(GOP_MIU_CLIENT_GOP1);
1655 u8Miu = (u16RegVal_L>>GOP_MIU_CLIENT_GOP1) | (u16RegVal_H>>GOP_MIU_CLIENT_GOP1)<<1;
1656 #else
1657 u8Miu = (u16RegVal_L>>GOP_MIU_CLIENT_GOP1);
1658 #endif
1659 break;
1660
1661 case 2:
1662 u16RegVal_L &= BIT(GOP_MIU_CLIENT_GOP2);
1663 #ifdef GOP_MIU_GROUP2
1664 u16RegVal_H &= BIT(GOP_MIU_CLIENT_GOP2);
1665 u8Miu = (u16RegVal_L>>GOP_MIU_CLIENT_GOP2) | (u16RegVal_H>>GOP_MIU_CLIENT_GOP2)<<1;
1666 #else
1667 u8Miu = (u16RegVal_L>>GOP_MIU_CLIENT_GOP2);
1668 #endif
1669 break;
1670
1671 default:
1672 return 0xff;
1673 break;
1674 }
1675
1676 if(u8Miu > MAX_GOP_MIUSEL )
1677 {
1678 printf("[%s] ERROR GOP miu client\n",__FUNCTION__);
1679 return 0xff;
1680 }
1681
1682 }
1683 return u8Miu;
1684 }
HAL_GOP_GetGOPDst(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8gopNum,DRV_GOPDstType * pGopDst)1685 GOP_Result HAL_GOP_GetGOPDst(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8gopNum, DRV_GOPDstType *pGopDst)
1686 {
1687 MS_U16 u16Regval;
1688 MS_U32 u32pBankOffSet=0;
1689 GOP_Result ret;
1690
1691 if(u8gopNum >= MAX_GOP_SUPPORT)
1692 {
1693 printf("[%s][%d] Out of GOP support!!! GOP=%d\n",__FUNCTION__,__LINE__ ,u8gopNum);
1694 *pGopDst = E_DRV_GOP_DST_INVALID;
1695 return GOP_FAIL;
1696 }
1697
1698 _GetBnkOfstByGop(u8gopNum, &u32pBankOffSet);
1699 HAL_GOP_Read16Reg(pGOPHalLocal, u32pBankOffSet + GOP_4G_CTRL1, &u16Regval);
1700
1701 switch (u16Regval&GOP_DST_MASK)
1702 {
1703 case 0:
1704 *pGopDst = E_DRV_GOP_DST_IP0;
1705 ret = GOP_SUCCESS;
1706 break;
1707 case 1:
1708 *pGopDst = E_DRV_GOP_DST_IP0_SUB;
1709 ret = GOP_SUCCESS;
1710 break;
1711 case 2:
1712 *pGopDst = E_DRV_GOP_DST_OP0;
1713 ret = GOP_SUCCESS;
1714 break;
1715 default:
1716 *pGopDst = E_DRV_GOP_DST_INVALID;
1717 ret = GOP_FAIL;
1718 break;
1719 }
1720
1721 return ret;
1722
1723 }
1724
HAL_GOP_SetIPSel2SC(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_IPSEL_GOP ipSelGop)1725 void HAL_GOP_SetIPSel2SC(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_IPSEL_GOP ipSelGop)
1726 {
1727 MS_U16 muxValue=0;
1728 MS_U16 u16RegVal= 0, u16RegMsk = 0;
1729
1730 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MUX_IPVOP, &muxValue);
1731
1732 switch(ipSelGop)
1733 {
1734 case MS_DRV_IP0_SEL_GOP0:
1735 u16RegVal = GOP_BIT7 | GOP_BIT5 ;
1736 if(E_GOP0 == (muxValue &GOP_MUX0_MASK))
1737 u16RegVal |= GOP_BIT12;//mux0
1738 else
1739 u16RegVal |= GOP_BIT13;//mux1
1740 u16RegMsk = 0xFFE7;//Skip bit3/4 for GOP_SUB_IP control
1741 break;
1742
1743 case MS_DRV_IP0_SEL_GOP1:
1744 u16RegVal = GOP_BIT7 | GOP_BIT5 ;
1745 if(E_GOP1 == (muxValue &GOP_MUX0_MASK))
1746 u16RegVal |= GOP_BIT12;//mux0
1747 else
1748 u16RegVal |= GOP_BIT13;//mux1
1749 u16RegMsk = 0xFFE7;//Skip bit3/4 for GOP_SUB_IP control
1750 break;
1751 case MS_DRV_IP0_SEL_GOP2:
1752 u16RegVal = GOP_BIT7 | GOP_BIT5 ;
1753 if(E_GOP2 == (muxValue &GOP_MUX0_MASK))
1754 u16RegVal |= GOP_BIT12;//mux0
1755 else
1756 u16RegVal |= GOP_BIT13;//mux1
1757 u16RegMsk = 0xFFE7;//Skip bit3/4 for GOP_SUB_IP control
1758 break;
1759
1760 case MS_DRV_NIP_SEL_GOP0:
1761 if(E_GOP0 == (muxValue &GOP_MUX0_MASK))
1762 {
1763 u16RegVal = ~GOP_BIT12;//mux0
1764 u16RegMsk = GOP_BIT12;
1765 }
1766 else
1767 {
1768 u16RegVal = ~GOP_BIT13;//mux1
1769 u16RegMsk = GOP_BIT13;
1770 }
1771 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_CHANNELSYNC, GOP_BIT11, GOP_BIT11);
1772 break;
1773
1774 case MS_DRV_NIP_SEL_GOP1:
1775 if(E_GOP1 == (muxValue &GOP_MUX0_MASK))
1776 {
1777 u16RegVal = ~GOP_BIT12;//mux0
1778 u16RegMsk = GOP_BIT12;
1779 }
1780 else
1781 {
1782 u16RegVal = ~GOP_BIT13;//mux1
1783 u16RegMsk = GOP_BIT13;
1784 }
1785 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_CHANNELSYNC, GOP_BIT11, GOP_BIT11);
1786
1787 break;
1788 case MS_DRV_NIP_SEL_GOP2:
1789 if(E_GOP2 == (muxValue &GOP_MUX0_MASK))
1790 {
1791 u16RegVal = ~GOP_BIT12;//mux0
1792 u16RegMsk = GOP_BIT12;
1793 }
1794 else
1795 {
1796 u16RegVal = ~GOP_BIT13;//mux1
1797 u16RegMsk = GOP_BIT13;
1798 }
1799 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_CHANNELSYNC, GOP_BIT11, GOP_BIT11);
1800
1801 break;
1802 case MS_DRV_MVOP_SEL:
1803 u16RegVal = GOP_BIT7 | GOP_BIT5 ;
1804 u16RegVal |= GOP_BIT12; //mux0
1805 u16RegMsk = 0xFFE7;//Skip bit3/4 for GOP_SUB_IP control
1806 break;
1807 default:
1808 printf("[%s] ERROR invalid source select\n",__FUNCTION__);
1809 break;
1810 }
1811 if(0 != u16RegMsk)
1812 {
1813 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_CHANNELSYNC, u16RegVal, u16RegMsk);
1814 }
1815 }
1816
HAL_GOP_DWIN_SetSourceSel(GOP_CTX_HAL_LOCAL * pGOPHalLocal,DRV_GOP_DWIN_SRC_SEL enSrcSel)1817 GOP_Result HAL_GOP_DWIN_SetSourceSel(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOP_DWIN_SRC_SEL enSrcSel)
1818 {
1819 return GOP_FUN_NOT_SUPPORTED;
1820 }
1821
1822
HAL_GOP_GetDWINMIU(GOP_CTX_HAL_LOCAL * pGOPHalLocal)1823 MS_U8 HAL_GOP_GetDWINMIU(GOP_CTX_HAL_LOCAL *pGOPHalLocal)
1824 {
1825 return GOP_FUN_NOT_SUPPORTED;
1826 }
HAL_GOP_SetDWINMIU(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 miu)1827 GOP_Result HAL_GOP_SetDWINMIU(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 miu)
1828 {
1829 return GOP_FUN_NOT_SUPPORTED;
1830 }
1831
HAL_GOP_DWIN_EnableR2YCSC(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_BOOL bEnable)1832 GOP_Result HAL_GOP_DWIN_EnableR2YCSC(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_BOOL bEnable)
1833 {
1834 return GOP_FUN_NOT_SUPPORTED;
1835 }
1836
HAL_GOP_VE_SetOutputTiming(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U32 u32mode)1837 GOP_Result HAL_GOP_VE_SetOutputTiming(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32mode)
1838 {
1839 return GOP_FUN_NOT_SUPPORTED;
1840 }
1841
HAL_GOP_MIXER_SetOutputTiming(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U32 u32mode,GOP_DRV_MixerTiming * pTM)1842 GOP_Result HAL_GOP_MIXER_SetOutputTiming(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32mode, GOP_DRV_MixerTiming *pTM)
1843 {
1844 return GOP_FUN_NOT_SUPPORTED;
1845 }
1846
HAL_GOP_MIXER_EnableVfilter(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_BOOL bEn)1847 GOP_Result HAL_GOP_MIXER_EnableVfilter(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_BOOL bEn)
1848 {
1849 return GOP_FUN_NOT_SUPPORTED;
1850 }
1851
HAL_GOP_GWIN_EnableTileMode(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8win,MS_BOOL bEnable,E_GOP_TILE_DATA_TYPE tilemode)1852 GOP_Result HAL_GOP_GWIN_EnableTileMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8win, MS_BOOL bEnable, E_GOP_TILE_DATA_TYPE tilemode)
1853 {
1854 return GOP_FUN_NOT_SUPPORTED;
1855 }
1856
1857
HAL_GOP_SetUVSwap(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GOPNum,MS_BOOL bEn)1858 GOP_Result HAL_GOP_SetUVSwap(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum,MS_BOOL bEn)
1859 {
1860 MS_U32 u32BankOffSet =0;
1861
1862 _GetBnkOfstByGop(u8GOPNum, &u32BankOffSet);
1863
1864 if (bEn)
1865 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_YUV_SWAP, GOP_BIT14, GOP_BIT14);
1866 else
1867 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_YUV_SWAP, ~GOP_BIT14, GOP_BIT14);
1868
1869 return GOP_SUCCESS;
1870 }
1871
HAL_GOP_SetYCSwap(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GOPNum,MS_BOOL bEn)1872 GOP_Result HAL_GOP_SetYCSwap(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum,MS_BOOL bEn)
1873 {
1874 MS_U32 u32BankOffSet =0;
1875
1876 _GetBnkOfstByGop(u8GOPNum, &u32BankOffSet);
1877
1878 if (bEn)
1879 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_YUV_SWAP, GOP_BIT15, GOP_BIT15);
1880 else
1881 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_YUV_SWAP, 0x0, GOP_BIT15);
1882
1883 return GOP_SUCCESS;
1884 }
1885
HAL_GOP_GWIN_GetNewAlphaMode(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8win,MS_BOOL * pEnable)1886 GOP_Result HAL_GOP_GWIN_GetNewAlphaMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8win, MS_BOOL* pEnable)
1887 {
1888 MS_U16 u16Val =0x0;
1889 if (u8win < GOP1_GwinIdBase)
1890 {
1891 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_4G_GWIN_ALPHA01(u8win), &u16Val);
1892 *pEnable = (MS_BOOL)(u16Val>>15);
1893 }
1894 else if (u8win < GOP2_GwinIdBase)
1895 {
1896 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_2G_GWIN_ALPHA01(u8win - MAX_GOP0_GWIN), &u16Val);
1897 *pEnable = (MS_BOOL)(u16Val>>15);
1898 }
1899 else if (u8win < GOP3_GwinIdBase)
1900 {
1901 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_1G_GWIN_ALPHA01, &u16Val);
1902 *pEnable = (MS_BOOL)(u16Val>>15);
1903 }
1904 else if (u8win < GOP4_GwinIdBase)
1905 {
1906 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_1GX_GWIN_ALPHA01, &u16Val);
1907 *pEnable = (MS_BOOL)(u16Val>>15);
1908 }
1909 else if (u8win < GOP5_GwinIdBase)
1910 {
1911 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_1GS0_GWIN_ALPHA01, &u16Val);
1912 *pEnable = (MS_BOOL)(u16Val>>15);
1913 }
1914 else
1915 {
1916 printf("%s Not support this GWIN num%d!!!\n",__FUNCTION__, u8win);
1917 return GOP_INVALID_PARAMETERS;
1918 }
1919
1920 return GOP_SUCCESS;
1921 }
1922
HAL_GOP_GWIN_SetNewAlphaMode(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8win,MS_BOOL bEnable)1923 GOP_Result HAL_GOP_GWIN_SetNewAlphaMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8win, MS_BOOL bEnable)
1924 {
1925 MS_U16 u16Val = bEnable << 15;
1926 if (u8win < GOP1_GwinIdBase)
1927 {
1928 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_4G_GWIN_ALPHA01(u8win), u16Val, GOP_BIT15);
1929 }
1930 else if (u8win < GOP2_GwinIdBase)
1931 {
1932 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_2G_GWIN_ALPHA01(u8win - MAX_GOP0_GWIN), u16Val, GOP_BIT15);
1933 }
1934 else if (u8win < GOP3_GwinIdBase)
1935 {
1936 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_1G_GWIN_ALPHA01, u16Val, GOP_BIT15);
1937 }
1938 else
1939 {
1940 printf("%s Not support this GWIN num%d!!!\n",__FUNCTION__, u8win);
1941 return GOP_INVALID_PARAMETERS;
1942 }
1943 return GOP_SUCCESS;
1944 }
1945
HAL_GOP_GWiN_Set3DOSD_Sub(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GOP,MS_U8 u8Gwin,MS_PHY u32SubAddr)1946 GOP_Result HAL_GOP_GWiN_Set3DOSD_Sub(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP ,MS_U8 u8Gwin, MS_PHY u32SubAddr)
1947 {
1948 MS_U16 u16Reg = 0;
1949 MS_U32 u32WordBase = 0;
1950 MS_U32 u32BankOffSet=0;
1951
1952 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
1953
1954 HAL_GOP_Read16Reg(pGOPHalLocal, u32BankOffSet + GOP_4G_BANK_FWR, &u16Reg);
1955
1956 if(u16Reg & GOP_BIT7)
1957 {
1958 u32WordBase = 1;
1959 }
1960 else
1961 {
1962 u32WordBase = GOP_WordUnit;
1963 }
1964
1965 u32SubAddr /= u32WordBase;
1966
1967 if(u8GOP == E_GOP2)
1968 {
1969 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_1G_3DOSD_SUB_RBLK_L, u32SubAddr&GOP_REG_WORD_MASK ,GOP_REG_WORD_MASK );
1970 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_1G_3DOSD_SUB_RBLK_H, u32SubAddr>>16 ,GOP_REG_WORD_MASK );
1971 }
1972 else if(u8GOP == E_GOP3)
1973 {
1974 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_1GX_3DOSD_SUB_RBLK_L, u32SubAddr&GOP_REG_WORD_MASK ,GOP_REG_WORD_MASK );
1975 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_1GX_3DOSD_SUB_RBLK_H, u32SubAddr>>16 ,GOP_REG_WORD_MASK );
1976
1977 }
1978 else if(u8GOP == E_GOP4)
1979 {
1980 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_1GS0_3DOSD_SUB_RBLK_L, u32SubAddr&GOP_REG_WORD_MASK ,GOP_REG_WORD_MASK );
1981 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_1GS0_3DOSD_SUB_RBLK_H, u32SubAddr>>16 ,GOP_REG_WORD_MASK );
1982 }
1983 else if(u8GOP == E_GOP1)
1984 {
1985 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_2G_3DOSD_SUB_RBLK_L(u8Gwin - MAX_GOP0_GWIN), u32SubAddr&GOP_REG_WORD_MASK ,GOP_REG_WORD_MASK );
1986 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_2G_3DOSD_SUB_RBLK_H(u8Gwin - MAX_GOP0_GWIN), u32SubAddr>>16 ,GOP_REG_WORD_MASK );
1987 }
1988 else //gop0
1989 {
1990 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_4G_3DOSD_SUB_RBLK_L(u8Gwin), u32SubAddr&GOP_REG_WORD_MASK ,GOP_REG_WORD_MASK );
1991 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_4G_3DOSD_SUB_RBLK_H(u8Gwin), u32SubAddr>>16 ,GOP_REG_WORD_MASK );
1992 }
1993
1994 return GOP_SUCCESS;
1995
1996 }
1997
1998 //------------------------------------------------------------------------------
1999 /// Set VE output with OSD
2000 /// @return none
2001 //------------------------------------------------------------------------------
HAL_GOP_VE_SetOSDEnable(MS_BOOL bEnable,EN_VE_OSD_ENABLE eOSD,MS_U8 gopNum)2002 GOP_Result HAL_GOP_VE_SetOSDEnable(MS_BOOL bEnable, EN_VE_OSD_ENABLE eOSD, MS_U8 gopNum)
2003 {
2004 return GOP_FUN_NOT_SUPPORTED;
2005 }
2006
HAL_GOP_SetGOPToVE(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 gopNum,MS_BOOL bEn)2007 GOP_Result HAL_GOP_SetGOPToVE(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEn )
2008 {
2009 return GOP_FUN_NOT_SUPPORTED;
2010 }
2011
HAL_GOP_GetVideoTimingMirrorType(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_BOOL bHorizontal)2012 E_GOP_VIDEOTIMING_MIRRORTYPE HAL_GOP_GetVideoTimingMirrorType(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_BOOL bHorizontal)
2013 {
2014 E_GOP_VIDEOTIMING_MIRRORTYPE enMirrorType = E_GOP_VIDEOTIMING_MIRROR_BYSCALER;
2015 MS_U16 u16MVOPMirrorCfg = 0;
2016 MS_U16 u16ScalerMirrorCfg = 0;
2017
2018 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MVOP_MIRRORCFG, &u16MVOPMirrorCfg);
2019 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_MIRRORCFG, &u16ScalerMirrorCfg);
2020 if(bHorizontal) // Horizontal
2021 {
2022 if(u16MVOPMirrorCfg & GOP_BIT1)
2023 {
2024 enMirrorType = E_GOP_VIDEOTIMING_MIRROR_BYMVOP;
2025 }
2026 else if(u16ScalerMirrorCfg & GOP_BIT12)
2027 {
2028 enMirrorType = E_GOP_VIDEOTIMING_MIRROR_BYSCALER;
2029 }
2030 }
2031 else //vertical
2032 {
2033 if(u16MVOPMirrorCfg & GOP_BIT0)
2034 {
2035 enMirrorType = E_GOP_VIDEOTIMING_MIRROR_BYMVOP;
2036 }
2037 else if(u16ScalerMirrorCfg & GOP_BIT13)
2038 {
2039 enMirrorType = E_GOP_VIDEOTIMING_MIRROR_BYSCALER;
2040 }
2041 }
2042 return enMirrorType;
2043 }
2044
HAL_GOP_3D_SetMiddle(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GOP,MS_U16 u16Middle)2045 GOP_Result HAL_GOP_3D_SetMiddle(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP,MS_U16 u16Middle)
2046 {
2047 MS_U32 u32BankOffSet =0;
2048
2049 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
2050 HAL_GOP_Write16Reg(pGOPHalLocal,u32BankOffSet+GOP_4G_3D_MIDDLE, u16Middle, GOP_REG_WORD_MASK);
2051 return GOP_SUCCESS;
2052 }
2053
HAL_GOP_OC_SetOCEn(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GOP,MS_BOOL bOCEn)2054 GOP_Result HAL_GOP_OC_SetOCEn(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_BOOL bOCEn)
2055 {
2056 MS_U8 i=0, eGopMux=0, FRCMuxOffset=0;
2057 MS_U16 u16Val=0;
2058 MS_U16 u16Mux[MAX_GOP_MUX];
2059
2060 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MUX, &u16Val);
2061 u16Mux[0] =( u16Val & GOP_MUX0_MASK);
2062 u16Mux[1] =( u16Val & GOP_MUX1_MASK) >> (GOP_MUX_SHIFT*1);
2063 u16Mux[2] =( u16Val & GOP_MUX2_MASK) >> (GOP_MUX_SHIFT*2);
2064 u16Mux[3] =( u16Val & GOP_MUX3_MASK) >> (GOP_MUX_SHIFT*3);
2065 u16Mux[4] =( u16Val & GOP_MUX4_MASK) >> (GOP_MUX_SHIFT*4);
2066
2067 switch(u8GOP)
2068 {
2069 case E_GOP0:
2070 case E_GOP1:
2071 case E_GOP2:
2072 for(i=0; i<MAX_GOP_MUX; i++)
2073 {
2074 if(u8GOP == u16Mux[i])
2075 {
2076 eGopMux = i;
2077 if(eGopMux == 4)
2078 {
2079 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX_4K2K, bOCEn<<15, GOP_BIT15);
2080 }
2081 else
2082 {
2083 FRCMuxOffset = 12 + eGopMux;
2084 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MUX_IPVOP, bOCEn<<FRCMuxOffset, 1<<FRCMuxOffset);
2085 }
2086 }
2087 }
2088 break;
2089 default:
2090 return GOP_FAIL;
2091 break;
2092 }
2093 return GOP_SUCCESS;
2094 }
2095
HAL_GOP_OC_SetOCInfo(GOP_CTX_HAL_LOCAL * pGOPHalLocal,DRV_GOP_OC_INFO * pOCinfo)2096 GOP_Result HAL_GOP_OC_SetOCInfo(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOP_OC_INFO* pOCinfo)
2097 {
2098 return GOP_FUN_NOT_SUPPORTED;
2099 }
2100
HAL_GOP_OC_Get_MIU_Sel(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 * MIUId)2101 GOP_Result HAL_GOP_OC_Get_MIU_Sel(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 *MIUId)
2102 {
2103 return GOP_FUN_NOT_SUPPORTED;
2104 }
2105
HAL_GOP_DWIN_SetRingBuffer(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U32 u32RingSize,MS_U32 u32BufSize)2106 GOP_Result HAL_GOP_DWIN_SetRingBuffer(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32RingSize,MS_U32 u32BufSize)
2107 {
2108 return GOP_FUN_NOT_SUPPORTED;
2109 }
2110
HAL_GOP_AdjustField(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 GopNum,DRV_GOPDstType eDstType)2111 GOP_Result HAL_GOP_AdjustField(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 GopNum, DRV_GOPDstType eDstType)
2112 {
2113 return GOP_FUN_NOT_SUPPORTED;
2114 }
2115
2116 /********************************************************************************/
2117 ///Test Pattern
2118 /********************************************************************************/
HAL_GOP_TestPattern_IsVaild(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GopNum)2119 GOP_Result HAL_GOP_TestPattern_IsVaild(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GopNum)
2120 {
2121 if(u8GopNum == pGOPHalLocal->pGopChipPro->GOP_TestPattern_Vaild)
2122 {
2123 return GOP_SUCCESS;
2124 }
2125 else
2126 {
2127 return GOP_FAIL;
2128 }
2129
2130 }
2131
2132
2133 /********************************************************************************/
2134 ///GOP Scaling down (internal)
2135 /********************************************************************************/
2136
HAL_GOP_EnableScalingDownSram(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GOP,MS_BOOL bEn)2137 MS_BOOL HAL_GOP_EnableScalingDownSram(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP,MS_BOOL bEn)
2138 {
2139 return GOP_FUN_NOT_SUPPORTED;
2140 }
2141
HAL_GOP_HScalingDown(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GOP,MS_BOOL bEnable,MS_U16 src,MS_U16 dst)2142 GOP_Result HAL_GOP_HScalingDown(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP, MS_BOOL bEnable,MS_U16 src, MS_U16 dst)
2143 {
2144 return GOP_FUN_NOT_SUPPORTED;
2145 }
2146
HAL_GOP_VScalingDown(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GOP,MS_BOOL bEnable,MS_U16 src,MS_U16 dst)2147 GOP_Result HAL_GOP_VScalingDown(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP, MS_BOOL bEnable,MS_U16 src, MS_U16 dst)
2148 {
2149 return GOP_FUN_NOT_SUPPORTED;
2150 }
2151
HAL_GOP_DeleteWinHVSize(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GOP,MS_U16 u16HSize,MS_U16 u16VSize)2152 GOP_Result HAL_GOP_DeleteWinHVSize(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP, MS_U16 u16HSize, MS_U16 u16VSize)
2153 {
2154 MS_U32 u32BankOffSet=0;
2155
2156 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
2157 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet + GOP_4G_BANK_HVAILDSIZE, u16HSize, GOP_REG_WORD_MASK);
2158 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet + GOP_4G_BANK_VVAILDSIZE, u16VSize, GOP_REG_WORD_MASK);
2159 return GOP_SUCCESS;
2160 }
2161
HAL_GOP_DumpGOPReg(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U32 u32GopIdx,MS_U16 u16BankIdx,MS_U16 u16Addr,MS_U16 * u16Val)2162 GOP_Result HAL_GOP_DumpGOPReg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32GopIdx, MS_U16 u16BankIdx, MS_U16 u16Addr, MS_U16* u16Val)
2163 {
2164 MS_U32 u32BankOffSet=0;
2165 _GetBnkOfstByGop(u32GopIdx, &u32BankOffSet);
2166
2167 if (u32GopIdx < MAX_GOP_SUPPORT)
2168 {
2169 HAL_GOP_Read16Reg(pGOPHalLocal, (u32BankOffSet+ (u16BankIdx<<16) + u16Addr +GOP_4G_CTRL0), u16Val);
2170 }
2171 else
2172 {
2173 printf("[%s][%d] Data is zero!!!\n",__FUNCTION__,__LINE__);
2174 *u16Val = 0;
2175 }
2176 return GOP_SUCCESS;
2177 }
2178
HAL_GOP_RestoreGOPReg(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U32 u32GopIdx,MS_U16 u16BankIdx,MS_U16 u16Addr,MS_U16 u16Val)2179 GOP_Result HAL_GOP_RestoreGOPReg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32GopIdx, MS_U16 u16BankIdx, MS_U16 u16Addr, MS_U16 u16Val)
2180 {
2181 MS_U32 u32BankOffSet=0;
2182 _GetBnkOfstByGop(u32GopIdx, &u32BankOffSet);
2183
2184 if (u32GopIdx < MAX_GOP_SUPPORT)
2185 {
2186 HAL_GOP_Write16Reg(pGOPHalLocal, (u32BankOffSet+ (u16BankIdx<<16) + u16Addr +GOP_4G_CTRL0), u16Val, GOP_REG_WORD_MASK);
2187 }
2188 else
2189 {
2190 printf("[%s][%d] Data is zero!!!\n",__FUNCTION__,__LINE__);
2191 }
2192 return GOP_SUCCESS;
2193 }
2194
HAL_GOP_PowerState(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U32 u32PowerState,GFLIP_REGS_SAVE_AREA * pGOP_STRPrivate)2195 GOP_Result HAL_GOP_PowerState(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32PowerState, GFLIP_REGS_SAVE_AREA* pGOP_STRPrivate)
2196 {
2197 switch(u32PowerState)
2198 {
2199 case E_POWER_SUSPEND:
2200 {
2201 //CLK
2202 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_GOPCLK, &(pGOP_STRPrivate->CKG_GopReg[0]));
2203 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_GOP2CLK, &(pGOP_STRPrivate->CKG_GopReg[1]));
2204 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_GOP3CLK, &(pGOP_STRPrivate->CKG_GopReg[2]));
2205 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_GOP4CLK, &(pGOP_STRPrivate->CKG_GopReg[3]));
2206 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SRAMCLK, &(pGOP_STRPrivate->CKG_GopReg[4]));
2207 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_LB_SRAMCLK, &(pGOP_STRPrivate->CKG_GopReg[5]));
2208
2209 //SRAM
2210 HAL_GOP_Read16Reg(pGOPHalLocal, CKG_GOPG0_SCALING, &(pGOP_STRPrivate->GS_GopReg[0]));
2211 HAL_GOP_Read16Reg(pGOPHalLocal, CKG_GOPG0_MG, &(pGOP_STRPrivate->GS_GopReg[1]));
2212 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_GOPSC_SRAM_CTRL, &(pGOP_STRPrivate->GS_GopReg[2]));
2213
2214 //XC
2215 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_BANKSEL, &(pGOP_STRPrivate->XC_GopReg[0]));
2216 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_CHANNELSYNC, &(pGOP_STRPrivate->XC_GopReg[1]));
2217 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_GOPEN, &(pGOP_STRPrivate->XC_GopReg[2]));
2218 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_IP_SYNC, &(pGOP_STRPrivate->XC_GopReg[3]));
2219 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_IP2GOP_SRCSEL, &(pGOP_STRPrivate->XC_GopReg[4]));
2220 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_OSD_CHECK_ALPHA, &(pGOP_STRPrivate->XC_GopReg[5]));
2221 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_VOPNBL, &(pGOP_STRPrivate->XC_GopReg[6]));
2222 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_GOPENMODE1, &(pGOP_STRPrivate->XC_GopReg[7]));
2223 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_MIRRORCFG, &(pGOP_STRPrivate->XC_GopReg[8]));
2224 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_OCMIXER, &(pGOP_STRPrivate->XC_GopReg[9]));
2225 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_OCMISC, &(pGOP_STRPrivate->XC_GopReg[10]));
2226 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_OCALPHA, &(pGOP_STRPrivate->XC_GopReg[11]));
2227 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_GOPSC_SRAM_CTRL, &(pGOP_STRPrivate->XC_GopReg[12]));
2228 }
2229 break;
2230 case E_POWER_RESUME:
2231 {
2232 //CLK
2233 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOPCLK, pGOP_STRPrivate->CKG_GopReg[0], GOP_REG_WORD_MASK);
2234 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOP2CLK, pGOP_STRPrivate->CKG_GopReg[1], GOP_REG_WORD_MASK);
2235 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOP3CLK, pGOP_STRPrivate->CKG_GopReg[2], GOP_REG_WORD_MASK);
2236 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_GOP4CLK, pGOP_STRPrivate->CKG_GopReg[3], GOP_REG_WORD_MASK);
2237 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SRAMCLK, pGOP_STRPrivate->CKG_GopReg[4], GOP_REG_WORD_MASK);
2238 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_LB_SRAMCLK, pGOP_STRPrivate->CKG_GopReg[5], GOP_REG_WORD_MASK);
2239
2240 //SRAM
2241 HAL_GOP_Write16Reg(pGOPHalLocal, CKG_GOPG0_SCALING, pGOP_STRPrivate->GS_GopReg[0], GOP_REG_WORD_MASK);
2242 HAL_GOP_Write16Reg(pGOPHalLocal, CKG_GOPG0_MG, pGOP_STRPrivate->GS_GopReg[1], GOP_REG_WORD_MASK);
2243 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_GOPSC_SRAM_CTRL, pGOP_STRPrivate->GS_GopReg[2], GOP_REG_WORD_MASK);
2244
2245 //XC
2246 //HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_BANKSEL, pGOP_STRPrivate->XC_GopReg[0], GOP_REG_WORD_MASK);
2247 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_CHANNELSYNC, pGOP_STRPrivate->XC_GopReg[1], GOP_BIT11);
2248 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_GOPEN, pGOP_STRPrivate->XC_GopReg[2], GOP_REG_WORD_MASK);
2249 //HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_IP_SYNC, pGOP_STRPrivate->XC_GopReg[3], GOP_REG_WORD_MASK);
2250 //HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_IP2GOP_SRCSEL, pGOP_STRPrivate->XC_GopReg[4], GOP_BIT15);
2251 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OSD_CHECK_ALPHA, pGOP_STRPrivate->XC_GopReg[5], GOP_BIT6);
2252 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_VOPNBL, pGOP_STRPrivate->XC_GopReg[6], GOP_BIT5);
2253 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_GOPENMODE1, pGOP_STRPrivate->XC_GopReg[7], GOP_REG_WORD_MASK);
2254 //HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_MIRRORCFG, pGOP_STRPrivate->XC_GopReg[8], GOP_REG_WORD_MASK);
2255 //HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCMIXER, pGOP_STRPrivate->XC_GopReg[9], GOP_REG_WORD_MASK);
2256 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCMISC, pGOP_STRPrivate->XC_GopReg[10], GOP_BIT2);
2257 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCALPHA, pGOP_STRPrivate->XC_GopReg[11], GOP_BIT2);
2258 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_GOPSC_SRAM_CTRL, pGOP_STRPrivate->XC_GopReg[12], GOP_REG_WORD_MASK);
2259 }
2260 break;
2261 default:
2262 break;
2263 }
2264 return GOP_SUCCESS;
2265 }
HAL_GOP_GWIN_SetGPUTileMode(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 gwinid,EN_DRV_GOP_GPU_TILE_MODE tile_mode)2266 GOP_Result HAL_GOP_GWIN_SetGPUTileMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 gwinid, EN_DRV_GOP_GPU_TILE_MODE tile_mode)
2267 {
2268 MS_U16 regval=0;
2269
2270 switch(tile_mode)
2271 {
2272 case E_DRV_GOP_GPU_TILE_LINEAR:
2273 regval=0;
2274 break;
2275 case E_DRV_GOP_GPU_TILE_DIP8X:
2276 regval=1<<12;
2277 break;
2278 case E_DRV_GOP_GPU_TILE_DIP16X:
2279 regval=2<<12;
2280 break;
2281 case E_DRV_GOP_GPU_TILE_GPU:
2282 regval=3<<12;
2283 break;
2284 default:
2285 return GOP_FAIL;
2286 break;
2287 }
2288 regval |= GPU_TILE_FORMAT_ARGB8888<<4;
2289
2290 if (gwinid<(MAX_GOP0_GWIN+MAX_GOP1_GWIN))
2291 {
2292 HAL_GOP_Write16Reg(pGOPHalLocal, (gwinid < MAX_GOP0_GWIN)? GOP_4G_GWIN0_CTRL(gwinid):GOP_2G_GWIN_CTRL(gwinid-MAX_GOP0_GWIN), regval, 0x31f0);
2293 }
2294 else
2295 {
2296 if (gwinid==(MAX_GOP0_GWIN+MAX_GOP1_GWIN))
2297 {
2298 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_1G_GWIN0_CTRL, regval, 0x31f0);
2299 }
2300 else if ((gwinid==(MAX_GOP0_GWIN+MAX_GOP1_GWIN+MAX_GOP2_GWIN)))
2301 {
2302 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_1GX_GWIN0_CTRL, regval, 0x31f0);
2303 }
2304 else
2305 {
2306 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_1GS0_GWIN0_CTRL, regval, 0x31f0);
2307 }
2308 }
2309
2310 return GOP_SUCCESS;
2311
2312 }
2313
HAL_GOP_EnableTLB(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GOP,MS_BOOL bEnable)2314 GOP_Result HAL_GOP_EnableTLB(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP, MS_BOOL bEnable)
2315 {
2316 MS_U32 u32BankOffSet=0xFFFF;
2317
2318 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
2319 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_SRAM_BORROW, bEnable?GOP_BIT10:0, GOP_BIT10);
2320
2321 return GOP_SUCCESS;
2322 }
2323
HAL_GOP_SetTLBAddr(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GOP,MS_PHY u64TLBAddr,MS_U32 u32size)2324 GOP_Result HAL_GOP_SetTLBAddr(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_PHY u64TLBAddr, MS_U32 u32size)
2325 {
2326 MS_U32 u32BankOffSet=0xFFFF;
2327 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
2328
2329 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+REG_TLB_TAG_ADDR_L, u32size&GOP_REG_WORD_MASK, GOP_REG_WORD_MASK);
2330 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+REG_TLB_TAG_ADDR_H, u32size>>16, GOP_REG_WORD_MASK);
2331
2332 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+REG_TLB_BASE_ADDR_L, u64TLBAddr&GOP_REG_WORD_MASK, GOP_REG_WORD_MASK);
2333 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+REG_TLB_BASE_ADDR_H, u64TLBAddr>>16, GOP_REG_WORD_MASK);
2334
2335 return GOP_SUCCESS;
2336 }
2337
HAL_GOP_SetTLBSubAddr(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GOP,MS_PHY u64TLBAddr)2338 GOP_Result HAL_GOP_SetTLBSubAddr(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_PHY u64TLBAddr)
2339 {
2340 MS_U32 u32BankOffSet=0xFFFF;
2341 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
2342
2343 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+REG_TLB_BASE_ADDR_RVIEW_L, u64TLBAddr&GOP_REG_WORD_MASK, GOP_REG_WORD_MASK);
2344 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+REG_TLB_BASE_ADDR_RVIEW_H, u64TLBAddr>>16, GOP_REG_WORD_MASK);
2345
2346 return GOP_SUCCESS;
2347 }
2348
HAL_GOP_Set_GWIN_INTERNAL_MIU(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GOP,MS_U8 miusel)2349 GOP_Result HAL_GOP_Set_GWIN_INTERNAL_MIU(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP,MS_U8 miusel)
2350 {
2351 MS_U32 u32BankOffSet=0xFFFF;
2352 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
2353
2354 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_MIU_SEL, miusel, GOP_BIT0|GOP_BIT1 );//GWIN MIU Select
2355 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_MIU_SEL, miusel<<2, GOP_BIT2|GOP_BIT3 );//GWIN_3D MIU Select
2356 HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_MIU_SEL, miusel<<4, GOP_BIT4|GOP_BIT5 );//GWIN Palette MIU Select
2357
2358 return GOP_SUCCESS;
2359 }
2360
HAL_GOP_Set_MIU(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 u8GOP,MS_U8 miusel)2361 GOP_Result HAL_GOP_Set_MIU(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP,MS_U8 miusel)
2362 {
2363 MS_U32 u32BankOffSet=0xFFFF;
2364 MS_U16 mask_shift=0xFF;
2365
2366 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
2367 switch(u8GOP)
2368 {
2369 case E_GOP0:
2370 mask_shift = GOP_MIU_CLIENT_GOP0;
2371 break;
2372 case E_GOP1:
2373 mask_shift = GOP_MIU_CLIENT_GOP1;
2374 break;
2375 case E_GOP2:
2376 mask_shift = GOP_MIU_CLIENT_GOP2;
2377 break;
2378 case E_GOP3:
2379 mask_shift = GOP_MIU_CLIENT_GOP3;
2380 break;
2381 case E_GOP4:
2382 mask_shift = GOP_MIU_CLIENT_GOP4;
2383 break;
2384 case E_GOP5:
2385 mask_shift = GOP_MIU_CLIENT_GOP5;
2386 break;
2387 case E_GOP_Dwin:
2388 mask_shift = GOP_MIU_CLIENT_DWIN;
2389 break;
2390 default:
2391 mask_shift = 0xFF;
2392 MS_CRITICAL_MSG(printf("ERROR gop miu client\n"));
2393 break;
2394 }
2395
2396 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_MIU_SEL, miusel<<mask_shift, 1<<mask_shift );
2397 #ifdef GOP_MIU_GROUP2
2398 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MIU_GROUP2, (miusel>>1)<<mask_shift, 1<<mask_shift );
2399 #endif
2400
2401 return GOP_SUCCESS;
2402 }
2403
2404 #ifdef GOP_CMDQ_ENABLE
HAL_GOP_CMDQ_WriteCommand(GOP_CTX_HAL_LOCAL * pGOPHalLocal,CAF_Struct * cmdq_struct,MS_U32 * number,MS_U32 u32addr,MS_U16 u16val,MS_U16 mask)2405 GOP_Result HAL_GOP_CMDQ_WriteCommand(GOP_CTX_HAL_LOCAL *pGOPHalLocal,CAF_Struct *cmdq_struct,MS_U32 *number,MS_U32 u32addr, MS_U16 u16val, MS_U16 mask)
2406 {
2407 MS_U16 u16xcSubbank=0;
2408 MS_U32 bank;
2409 MS_U32 direct_addr;
2410
2411 switch (u32addr & 0xFF00)
2412 {
2413 case GOP_REG_BASE:
2414 {
2415 bank = (u32addr & 0xFF0000) >> 8;
2416
2417 if(bank==0xE00)//GOP4: 0x121B00
2418 {
2419 bank=GOP_REG_GOP4_BK_OFFSET;
2420 }
2421 else if(bank==0xF00)//GWIN4: 0x121E00
2422 {
2423 bank=GOP_REG_GOP4_GW_OFFSET;
2424 }
2425 else if(bank==0x1000) //GOP4_ST
2426 {
2427 bank=GOP_REG_GOP4_ST_OFFSET;
2428 }
2429
2430 direct_addr = GOP_REG_DIRECT_BASE + bank + (u32addr & 0xFF);
2431
2432 cmdq_struct[(*number)].destionation_address = (direct_addr&0xFFFFFF);
2433 cmdq_struct[(*number)].destionation_value = u16val;
2434 cmdq_struct[(*number)].mask = ((~mask)&0xFFFF);
2435 cmdq_struct[(*number)].operation = 0x57;
2436 (*number)++;
2437 break;
2438 }
2439 case SC1_REG_BASE:
2440 u16xcSubbank = (u32addr & 0xFF0000)>>8 ;
2441 direct_addr = SC1_DIRREG_BASE + u16xcSubbank+ (u32addr & 0xFF);
2442
2443 cmdq_struct[(*number)].destionation_address = (direct_addr&0xFFFFFF);
2444 cmdq_struct[(*number)].destionation_value = u16val;
2445 cmdq_struct[(*number)].mask = ((~mask)&0xFFFF);
2446 cmdq_struct[(*number)].operation = 0x57;
2447 (*number)++;
2448 break;
2449 case GE_REG_BASE:
2450 case CKG_REG_BASE:
2451 case MIU_REG_BASE:
2452 {
2453 cmdq_struct[(*number)].destionation_address = (u32addr&0xFFFFF)+0x100000;
2454 cmdq_struct[(*number)].destionation_value = u16val;
2455 cmdq_struct[(*number)].mask = ((~mask)&0xFFFF);
2456 cmdq_struct[(*number)].operation = 0x57;
2457 (*number)++;
2458 break;
2459 }
2460 #ifdef GOP_MIU_GROUP2
2461 case (MIU2_REG_BASE & 0xFF00):
2462 {
2463 direct_addr = MIU2_REG_BASE + (u32addr & 0xFF); //Direct_Base + addr_offset
2464
2465 cmdq_struct[(*number)].destionation_address = (direct_addr&0xFFFFFF);
2466 cmdq_struct[(*number)].destionation_value = u16val;
2467 cmdq_struct[(*number)].mask = ((~mask)&0xFFFF);
2468 cmdq_struct[(*number)].operation = 0x57;
2469 (*number)++;
2470 break;
2471 }
2472 #endif
2473 default:
2474 {
2475 //Gop lib current do not support this HW ip base
2476 MS_ASSERT(0);
2477 break;
2478 }
2479
2480 }
2481 return GOP_SUCCESS;
2482 }
HAL_GOP_CMDQ_BegineDraw(GOP_CTX_HAL_LOCAL * pGOPHalLocal,CAF_Struct * target,MS_U32 * number,MS_U32 u32GopIdx)2483 GOP_Result HAL_GOP_CMDQ_BegineDraw(GOP_CTX_HAL_LOCAL *pGOPHalLocal,CAF_Struct *target,MS_U32 *number, MS_U32 u32GopIdx)
2484 {
2485 MS_U32 u32BankOffSet=0xFFFF;
2486 MS_U16 u16RegVal1 = 0;
2487 MS_BOOL bCheckValidGop = FALSE;
2488 MS_U8 u8CheckTimeCnt = 0;
2489 MS_U8 u8CurrentCmdGop = 0;
2490
2491 while (!bCheckValidGop && (u8CheckTimeCnt < (GOPG3_GOP_CMDQ_INT_3 - GOPG0_GOP_CMDQ_INT_0 + 2)))
2492 {
2493 if (u8CurrentCmdGop > (GOPG3_GOP_CMDQ_INT_3 - GOPG0_GOP_CMDQ_INT_0))
2494 {
2495 u8CurrentCmdGop = 0;
2496 }
2497 _GetBnkOfstByGop(u8CurrentCmdGop, &u32BankOffSet);
2498 HAL_GOP_Read16Reg(pGOPHalLocal, u32BankOffSet + GOP_4G_CTRL0, &u16RegVal1);
2499 if ((u16RegVal1 & GOP_BIT0) != 0) // gop not init, cmdq won't work
2500 {
2501 bCheckValidGop = FALSE;
2502 }
2503 else
2504 {
2505 bCheckValidGop = TRUE;
2506 break;
2507 }
2508
2509 // if current gop not init, use next gop instead, check order 0->2->1->3
2510 switch (u8CurrentCmdGop)
2511 {
2512 case 0:
2513 u8CurrentCmdGop = 2;
2514 break;
2515 case 1:
2516 u8CurrentCmdGop = 0;
2517 break;
2518 case 2:
2519 u8CurrentCmdGop = 3;
2520 break;
2521 case 3:
2522 u8CurrentCmdGop = 1;
2523 break;
2524 default:
2525 u8CurrentCmdGop = 0;
2526 break;
2527 }
2528 u8CheckTimeCnt++;
2529 }
2530 if (!bCheckValidGop)
2531 {
2532 printf("[%s] Error message no avalible gop can support current cmdq!!\n",__FUNCTION__);
2533 }
2534 _GetBnkOfstByGop(u8CurrentCmdGop, &u32BankOffSet);
2535 HAL_GOP_Read16Reg(pGOPHalLocal,u32BankOffSet+GOP_4G_MULTI_ALPHA,&u16RegVal1);
2536 HAL_GOP_CMDQ_WriteCommand(pGOPHalLocal,target,number,u32BankOffSet+GOP_4G_MULTI_ALPHA,(u16RegVal1|GOP_BIT4),0xFFFF);//reset mask
2537 HAL_GOP_CMDQ_WriteCommand(pGOPHalLocal,target,number,u32BankOffSet+GOP_4G_MULTI_ALPHA,(u16RegVal1&(~GOP_BIT4)) ,0xFFFF); //reset nable detect
2538 MDrv_CMDQ_Gen_WaitTrigger_Bus_Command(&(target[(*number)]),GOPG0_GOP_CMDQ_INT_0 + u8CurrentCmdGop,FALSE);
2539 (*number)++;
2540 return GOP_SUCCESS;
2541 }
HAL_GOP_CMDQ_EndDraw(GOP_CTX_HAL_LOCAL * pGOPHalLocal,CAF_Struct * target,MS_U32 * number,MS_U32 u32GopIdx)2542 GOP_Result HAL_GOP_CMDQ_EndDraw(GOP_CTX_HAL_LOCAL *pGOPHalLocal,CAF_Struct *target,MS_U32 *number, MS_U32 u32GopIdx)
2543 {
2544 CH_Struct ch_fire;
2545 MS_U32 Receive_Return_Value = 0,u32BankOffSet = 0,timer1 = 0x0,timer2 = 0x0;
2546 MS_U16 u16ret = 0,u16ret1 = 0;
2547 int i = 0;
2548
2549
2550 _GetBnkOfstByGop(0, &u32BankOffSet);
2551 HAL_GOP_Read16Reg(pGOPHalLocal,u32BankOffSet+GOP_4G_BG_CLR(1),&u16ret);
2552 HAL_GOP_CMDQ_WriteCommand(pGOPHalLocal,target,number,u32BankOffSet+GOP_4G_BG_CLR(1),u16ret+1,0xFFFF);//current GOP force write dis
2553 #if 0 //for Debug
2554 for(i=0;i<(*number);i++)
2555 {
2556 printf("\33[0;36m [%d]op = %d, addr = %lx,value = %x,mask = %x\33[m \n",i,target[i].operation,target[i].destionation_address,target[i].destionation_value,target[i].mask);
2557 }
2558 #endif
2559 ch_fire.Command_Number = *number;
2560 ch_fire.Pointer_To_CAFArray = target;
2561 Receive_Return_Value = MDrv_CMDQ_Receive(&ch_fire);
2562 if(Receive_Return_Value == DRVCMDQ_CMDQ_FULL)
2563 {
2564 Receive_Return_Value = 0;
2565 MDrv_CMDQ_Printf_Crash_Command();
2566 }
2567 HAL_GOP_Read16Reg(pGOPHalLocal,u32BankOffSet+GOP_4G_BG_CLR(1),&u16ret1);
2568 timer1 = MsOS_GetSystemTime();
2569 timer2 = MsOS_GetSystemTime();
2570 while( u16ret1 != (u16ret+1) && ((timer2 - timer1)<100))
2571 {
2572 HAL_GOP_Read16Reg(pGOPHalLocal,u32BankOffSet+GOP_4G_BG_CLR(1),&u16ret1);
2573 MsOS_DelayTask(1);
2574 timer2 = MsOS_GetSystemTime();
2575 }
2576 if(u16ret1 != (u16ret+1))
2577 printf("\33[0;36m %s:%d timeout = %ld org = %d target = %d\33[m \n",__FUNCTION__,__LINE__,(timer2 - timer1),u16ret1,(u16ret+1));
2578 return GOP_SUCCESS;
2579 }
2580
HAL_GOP_CMDQ_SetGOPACK(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U8 gop)2581 GOP_Result HAL_GOP_CMDQ_SetGOPACK(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 gop)
2582 {
2583 CAF_Struct fire_struct[24];
2584 MS_U32 u32BankOffSet=0xFFFF;
2585 MS_U32 number = 0;
2586 MS_U16 u16RegVal1 = 0,u16RegVal2 = 0,u16RegVal3 = 0,u16MiuClient = 0;
2587 _GetBnkOfstByGop(gop, &u32BankOffSet);
2588
2589 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_MIU_SEL, &u16RegVal1);
2590 #ifdef GOP_MIU_GROUP2
2591 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MIU_GROUP2, &u16RegVal3);
2592 #endif
2593 HAL_GOP_Read16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_BANK_FWR,&u16RegVal2);
2594 HAL_GOP_CMDQ_BegineDraw(pGOPHalLocal,fire_struct,&number,(MS_U32)0);
2595
2596 switch(gop)
2597 {
2598 case E_GOP0:
2599 {
2600 u16MiuClient = GOP_MIU_CLIENT_GOP0;
2601 break;
2602 }
2603 case E_GOP1:
2604 {
2605 u16MiuClient = GOP_MIU_CLIENT_GOP1;
2606 break;
2607 }
2608 case E_GOP2:
2609 {
2610 u16MiuClient = GOP_MIU_CLIENT_GOP2;
2611 break;
2612 }
2613 default:
2614 {
2615 MS_ASSERT(0);
2616 break;
2617 }
2618 }
2619 if(bMIUSelect[gop] == TRUE)
2620 {
2621 if(u16MIUSelect[gop] == 0)
2622 {
2623 u16RegVal1 &= ~(1<<u16MiuClient);
2624 u16RegVal3 &= ~(1<<u16MiuClient);
2625 }
2626 else if(u16MIUSelect[gop] == 1)
2627 {
2628 u16RegVal1 |= (1<<u16MiuClient);
2629 u16RegVal3 &= ~(1<<u16MiuClient);
2630 }
2631 else if(u16MIUSelect[gop] == 2)
2632 {
2633 u16RegVal1 &= ~(1<<u16MiuClient);
2634 u16RegVal3 |= (1<<u16MiuClient);
2635 }
2636 else if(u16MIUSelect[gop] == 3)
2637 {
2638 u16RegVal1 |= (1<<u16MiuClient);
2639 u16RegVal3 |= (1<<u16MiuClient);
2640 }
2641 bMIUSelect[gop] = FALSE;
2642 }
2643 HAL_GOP_CMDQ_WriteCommand(pGOPHalLocal,fire_struct,&number,u32BankOffSet+GOP_4G_BANK_FWR,(u16RegVal2|(GOP_BIT0)) ,0xFFFF);//current GOP force write en
2644 HAL_GOP_CMDQ_WriteCommand(pGOPHalLocal,fire_struct,&number,u32BankOffSet+GOP_4G_BANK_FWR,(u16RegVal2&(~GOP_BIT0)) ,0xFFFF);//current GOP force write en
2645 HAL_GOP_CMDQ_WriteCommand(pGOPHalLocal,fire_struct,&number,GOP_SC_MIU_SEL,u16RegVal1,0xFFFF);
2646 #ifdef GOP_MIU_GROUP2
2647 HAL_GOP_CMDQ_WriteCommand(pGOPHalLocal,fire_struct,&number,GOP_MIU_GROUP2,u16RegVal3,0xFFFF);
2648 #endif
2649 HAL_GOP_CMDQ_EndDraw(pGOPHalLocal,fire_struct,&number,(MS_U32)0);
2650 return GOP_SUCCESS;
2651 }
2652
HAL_GOP_CMDQ_SetGOPACKMask(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U16 u16GopMask)2653 GOP_Result HAL_GOP_CMDQ_SetGOPACKMask(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U16 u16GopMask)
2654 {
2655 CAF_Struct fire_struct[24];
2656 MS_U32 u32BankOffSet;
2657 MS_U32 number = 0;
2658 MS_U8 gop;
2659 MS_U16 u16RegVal1=0,u16RegVal2=0,u16RegVal3 = 0,u16MiuClient = 0;
2660
2661 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_SC_MIU_SEL, &u16RegVal1);
2662 #ifdef GOP_MIU_GROUP2
2663 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MIU_GROUP2, &u16RegVal3);
2664 #endif
2665 HAL_GOP_CMDQ_BegineDraw(pGOPHalLocal,fire_struct,&number,(MS_U32)0);
2666
2667 for(gop = 0; gop<MAX_GOP_SUPPORT; gop++)
2668 {
2669 switch(gop)
2670 {
2671 case E_GOP0:
2672 {
2673 u16MiuClient = GOP_MIU_CLIENT_GOP0;
2674 break;
2675 }
2676 case E_GOP1:
2677 {
2678 u16MiuClient = GOP_MIU_CLIENT_GOP1;
2679 break;
2680 }
2681 case E_GOP2:
2682 {
2683 u16MiuClient = GOP_MIU_CLIENT_GOP2;
2684 break;
2685 }
2686 default:
2687 {
2688 continue;
2689 }
2690 }
2691 if( ( u16GopMask & (1<<gop) ) )
2692 {
2693 _GetBnkOfstByGop(gop, &u32BankOffSet);
2694 if(bMIUSelect[gop] == TRUE)
2695 {
2696 if(u16MIUSelect[gop] == 0)
2697 {
2698 u16RegVal1 &= ~(1<<u16MiuClient);
2699 u16RegVal3 &= ~(1<<u16MiuClient);
2700 }
2701 else if(u16MIUSelect[gop] == 1)
2702 {
2703 u16RegVal1 |= (1<<u16MiuClient);
2704 u16RegVal3 &= ~(1<<u16MiuClient);
2705 }
2706 else if(u16MIUSelect[gop] == 2)
2707 {
2708 u16RegVal1 &= ~(1<<u16MiuClient);
2709 u16RegVal3 |= (1<<u16MiuClient);
2710 }
2711 else if(u16MIUSelect[gop] == 3)
2712 {
2713 u16RegVal1 |= (1<<u16MiuClient);
2714 u16RegVal3 |= (1<<u16MiuClient);
2715 }
2716 bMIUSelect[gop] = FALSE;
2717 }
2718 HAL_GOP_Read16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_BANK_FWR,&u16RegVal2);
2719 HAL_GOP_CMDQ_WriteCommand(pGOPHalLocal,fire_struct,&number,u32BankOffSet+GOP_4G_BANK_FWR,(u16RegVal2|(GOP_BIT0)) ,0xFFFF);//current GOP force write en
2720 HAL_GOP_CMDQ_WriteCommand(pGOPHalLocal,fire_struct,&number,u32BankOffSet+GOP_4G_BANK_FWR,(u16RegVal2&(~GOP_BIT0)) ,0xFFFF);//current GOP force write en
2721 }
2722 }
2723 HAL_GOP_CMDQ_WriteCommand(pGOPHalLocal,fire_struct,&number,GOP_SC_MIU_SEL,u16RegVal1,0xFFFF);
2724 #ifdef GOP_MIU_GROUP2
2725 HAL_GOP_CMDQ_WriteCommand(pGOPHalLocal,fire_struct,&number,GOP_MIU_GROUP2,u16RegVal3,0xFFFF);
2726 #endif
2727 HAL_GOP_CMDQ_EndDraw(pGOPHalLocal,fire_struct,&number,(MS_U32)0);
2728 return GOP_SUCCESS;
2729 }
2730 #endif
2731