Home
last modified time | relevance | path

Searched refs:x17 (Results 1 – 25 of 37) sorted by relevance

12

/rk3399_ARM-atf/lib/romlib/templates/
H A Dwrapper.S9 ldr x17, =jmptbl
11 ldr x17, [x17]
12 add x16, x16, x17
H A Dwrapper_bti.S10 ldr x17, =jmptbl
12 ldr x17, [x17]
13 add x16, x16, x17
/rk3399_ARM-atf/plat/amlogic/common/include/
H A Dplat_macros.S36 mov_imm x17, AML_GICC_BASE
39 ldr w8, [x17, #GICC_HPPIR]
40 ldr w9, [x17, #GICC_AHPPIR]
41 ldr w10, [x17, #GICC_CTLR]
/rk3399_ARM-atf/plat/renesas/common/include/
H A Dplat_macros_gic.S31 mov_imm x17, RCAR_GICC_BASE
37 ldr w8, [x17, #GICC_HPPIR]
38 ldr w9, [x17, #GICC_AHPPIR]
39 ldr w10, [x17, #GICC_CTLR]
/rk3399_ARM-atf/plat/hisilicon/hikey960/include/
H A Dplat_macros.S37 mov_imm x17, GICC_REG_BASE
42 ldr w8, [x17, #GICC_HPPIR]
43 ldr w9, [x17, #GICC_AHPPIR]
44 ldr w10, [x17, #GICC_CTLR]
/rk3399_ARM-atf/plat/hisilicon/hikey/include/
H A Dplat_macros.S37 mov_imm x17, PLAT_ARM_GICC_BASE
42 ldr w8, [x17, #GICC_HPPIR]
43 ldr w9, [x17, #GICC_AHPPIR]
44 ldr w10, [x17, #GICC_CTLR]
/rk3399_ARM-atf/plat/mediatek/mt8173/include/
H A Dplat_macros.S36 mov_imm x17, BASE_GICC_BASE
40 ldr w8, [x17, #GICC_HPPIR]
41 ldr w9, [x17, #GICC_AHPPIR]
42 ldr w10, [x17, #GICC_CTLR]
/rk3399_ARM-atf/plat/xilinx/versal/include/
H A Dplat_macros.S68 ldr w8, [x17, #GICC_HPPIR]
69 ldr w9, [x17, #GICC_AHPPIR]
70 ldr w10, [x17, #GICC_CTLR]
106 mov_imm x17, PLAT_ARM_GICD_BASE
/rk3399_ARM-atf/plat/arm/board/fvp/include/
H A Dplat_macros.S32 mov_imm x17, BASE_GICC_BASE
36 mov_imm x17, VE_GICC_BASE
/rk3399_ARM-atf/plat/xilinx/versal_net/include/
H A Dplat_macros.S69 ldr w8, [x17, #GICC_HPPIR]
70 ldr w9, [x17, #GICC_AHPPIR]
71 ldr w10, [x17, #GICC_CTLR]
/rk3399_ARM-atf/plat/amd/versal2/include/
H A Dplat_macros.S69 ldr w8, [x17, #GICC_HPPIR]
70 ldr w9, [x17, #GICC_AHPPIR]
71 ldr w10, [x17, #GICC_CTLR]
/rk3399_ARM-atf/include/plat/arm/common/aarch64/
H A Darm_macros.S73 ldr w8, [x17, #GICC_HPPIR]
74 ldr w9, [x17, #GICC_AHPPIR]
75 ldr w10, [x17, #GICC_CTLR]
/rk3399_ARM-atf/include/plat/marvell/armada/common/aarch64/
H A Dmarvell_macros.S76 ldr w8, [x17, #GICC_HPPIR]
77 ldr w9, [x17, #GICC_AHPPIR]
78 ldr w10, [x17, #GICC_CTLR]
/rk3399_ARM-atf/plat/nvidia/tegra/common/aarch64/
H A Dtegra_helpers.S210 mov x17, #BL31_BASE
211 cmp x18, x17
219 mov x0, x17
244 br x17
251 adr x17, tegra_bl31_phys_base
252 ldr x18, [x17]
255 str x18, [x17]
/rk3399_ARM-atf/plat/common/aarch64/
H A Dcrash_console_helpers.S114 stp x16, x17, [x1, #16]
148 ldp x16, x17, [x1, #16]
163 stp x16, x17, [x1, #16]
185 ldp x16, x17, [x1, #16]
/rk3399_ARM-atf/plat/nxp/common/psci/aarch64/
H A Dpsci_utils.S42 stp x16, x17, [sp, #-16]!
187 ldp x16, x17, [sp], #16
224 stp x16, x17, [sp, #-16]!
268 ldp x16, x17, [sp], #16
323 stp x16, x17, [sp, #-16]!
353 ldp x16, x17, [sp], #16
542 stp x16, x17, [sp, #-16]!
578 ldp x16, x17, [sp], #16
623 stp x16, x17, [sp, #-16]!
654 ldp x16, x17, [sp], #16
[all …]
/rk3399_ARM-atf/lib/el3_runtime/aarch64/
H A Dcontext.S331 ldr x17, [x9, #CTX_MPAM3_EL3]
332 msr S3_6_C10_C5_0, x17 /* mpam3_el3 */
361 stp x16, x17, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X16]
500 ldp x16, x17, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X16]
585 mrs x17, spsel
586 cmp x17, #MODE_SP_EL0
596 mov x17, sp
598 str x17, [sp, #CTX_EL3STATE_OFFSET + CTX_RUNTIME_SP]
620 ldr x17, [sp, #CTX_CVE_2018_3639_OFFSET + CTX_CVE_2018_3639_DISABLE]
621 cbz x17, 1f
[all …]
/rk3399_ARM-atf/plat/qti/msm8916/include/
H A Dplat_macros.S23 mov_imm x17, APCS_QGIC2_GICC
/rk3399_ARM-atf/plat/qemu/common/include/
H A Dplat_macros.S21 mov_imm x17, GICC_BASE
/rk3399_ARM-atf/plat/allwinner/common/include/
H A Dplat_macros.S22 mov_imm x17, SUNXI_GICC_BASE
/rk3399_ARM-atf/plat/marvell/armada/a3k/common/include/
H A Dplat_macros.S20 mov_imm x17, MVEBU_GICC_BASE
/rk3399_ARM-atf/plat/xilinx/zynqmp/include/
H A Dplat_macros.S22 mov_imm x17, BASE_GICC_BASE
/rk3399_ARM-atf/include/plat/arm/css/common/aarch64/
H A Dcss_macros.S27 mov_imm x17, PLAT_ARM_GICC_BASE
/rk3399_ARM-atf/include/plat/nuvoton/common/
H A Dplat_macros.S23 mov_imm x17, BASE_GICC_BASE
/rk3399_ARM-atf/bl32/tsp/aarch64/
H A Dtsp_exceptions.S30 stp x16, x17, [sp, #0x80]
43 ldp x16, x17, [sp, #0x80]

12