13fc4124cSDan Handley/* 2eeb9ff99SJeenu Viswambharan * Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved. 33fc4124cSDan Handley * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 53fc4124cSDan Handley */ 6c3cf06f1SAntonio Nino Diaz#ifndef PLAT_MACROS_S 7c3cf06f1SAntonio Nino Diaz#define PLAT_MACROS_S 83fc4124cSDan Handley 93fc4124cSDan Handley#include <arm_macros.S> 10*234bc7f8SAntonio Nino Diaz#include <platform_def.h> 113fc4124cSDan Handley 123fc4124cSDan Handley /* --------------------------------------------- 133fc4124cSDan Handley * The below required platform porting macro 14eeb9ff99SJeenu Viswambharan * prints out relevant GIC registers whenever an 15eeb9ff99SJeenu Viswambharan * unhandled exception is taken in BL31. 163fc4124cSDan Handley * Clobbers: x0 - x10, x16, x17, sp 173fc4124cSDan Handley * --------------------------------------------- 183fc4124cSDan Handley */ 199ff67fa6SGerald Lejeune .macro plat_crash_print_regs 203fc4124cSDan Handley /* 213fc4124cSDan Handley * Detect if we're using the base memory map or 223fc4124cSDan Handley * the legacy VE memory map 233fc4124cSDan Handley */ 243fc4124cSDan Handley mov_imm x0, (V2M_SYSREGS_BASE + V2M_SYS_ID) 253fc4124cSDan Handley ldr w16, [x0] 263fc4124cSDan Handley /* Extract BLD (12th - 15th bits) from the SYS_ID */ 273fc4124cSDan Handley ubfx x16, x16, #V2M_SYS_ID_BLD_SHIFT, #4 283fc4124cSDan Handley /* Check if VE mmap */ 293fc4124cSDan Handley cmp w16, #BLD_GIC_VE_MMAP 303fc4124cSDan Handley b.eq use_ve_mmap 31f14d1886SSoby Mathew /* Assume Base Cortex mmap */ 323fc4124cSDan Handley mov_imm x17, BASE_GICC_BASE 333fc4124cSDan Handley mov_imm x16, BASE_GICD_BASE 34f14d1886SSoby Mathew b print_gic_regs 353fc4124cSDan Handleyuse_ve_mmap: 363fc4124cSDan Handley mov_imm x17, VE_GICC_BASE 373fc4124cSDan Handley mov_imm x16, VE_GICD_BASE 38f14d1886SSoby Mathewprint_gic_regs: 393fc4124cSDan Handley arm_print_gic_regs 403fc4124cSDan Handley .endm 413fc4124cSDan Handley 42c3cf06f1SAntonio Nino Diaz#endif /* PLAT_MACROS_S */ 43