| /rk3399_ARM-atf/plat/nxp/s32/s32g274ardb2/ |
| H A D | plat_helpers.S | 23 mov_imm x0, UART_BASE
24 mov_imm x1, UART_CLOCK_HZ
25 mov_imm x2, UART_BAUDRATE
31 mov_imm x1, UART_BASE
38 mov_imm x0, UART_BASE
116 mov_imm x0, BL31_BASE
117 mov_imm x1, BL31_LIMIT
120 mov_imm x0, BL33_BASE
121 mov_imm x1, BL33_LIMIT
124 mov_imm x0, IO_BUFFER_BASE
[all …]
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| /rk3399_ARM-atf/plat/arm/board/fvp/include/ |
| H A D | plat_macros.S | 24 mov_imm x0, (V2M_SYSREGS_BASE + V2M_SYS_ID)
32 mov_imm x17, BASE_GICC_BASE
33 mov_imm x16, BASE_GICD_BASE
36 mov_imm x17, VE_GICC_BASE
37 mov_imm x16, VE_GICD_BASE
|
| /rk3399_ARM-atf/plat/st/stm32mp2/aarch64/ |
| H A D | stm32mp2_helper.S | 92 mov_imm x1, (RCC_BASE + DEBUG_UART_RST_REG)
108 mov_imm x1, (RCC_BASE + DEBUG_UART_TX_GPIO_BANK_CLK_REG)
113 mov_imm x1, DEBUG_UART_TX_GPIO_BANK_ADDRESS
142 mov_imm x1, (RCC_BASE + DEBUG_UART_PREDIV_CFGR)
145 mov_imm x1, (RCC_BASE + DEBUG_UART_FINDIV_CFGR)
149 mov_imm x1, (RCC_BASE + DEBUG_UART_TX_CLKSRC_REG)
150 mov_imm w2, (DEBUG_UART_TX_CLKSRC | RCC_XBARxCFGR_XBARxEN)
152 mov_imm x1, (RCC_BASE + DEBUG_UART_TX_EN_REG)
157 mov_imm x0, STM32MP_DEBUG_USART_BASE
158 mov_imm x1, STM32MP_DEBUG_USART_CLK_FRQ
[all …]
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| /rk3399_ARM-atf/plat/hisilicon/poplar/aarch64/ |
| H A D | poplar_helpers.S | 49 mov_imm x0, POPLAR_CRASH_UART_BASE
50 mov_imm x1, POPLAR_CRASH_UART_CLK_IN_HZ
51 mov_imm x2, POPLAR_CONSOLE_BAUDRATE
63 mov_imm x1, POPLAR_CRASH_UART_BASE
76 mov_imm x0, POPLAR_CRASH_UART_BASE
|
| /rk3399_ARM-atf/plat/arm/common/aarch64/ |
| H A D | arm_helpers.S | 50 mov_imm x0, PLAT_ARM_CRASH_UART_BASE
51 mov_imm x1, PLAT_ARM_CRASH_UART_CLK_IN_HZ
52 mov_imm x2, ARM_CONSOLE_BAUDRATE
64 mov_imm x1, PLAT_ARM_CRASH_UART_BASE
77 mov_imm x0, PLAT_ARM_CRASH_UART_BASE
|
| /rk3399_ARM-atf/plat/qemu/common/aarch32/ |
| H A D | plat_helpers.S | 70 mov_imm r2, PLAT_QEMU_HOLD_BASE
83 mov_imm r0, PLAT_QEMU_TRUSTED_MAILBOX_BASE
109 mov_imm r0, PLAT_QEMU_CRASH_UART_BASE
110 mov_imm r1, PLAT_QEMU_CRASH_UART_CLK_IN_HZ
111 mov_imm r2, PLAT_QEMU_CONSOLE_BAUDRATE
123 mov_imm r1, PLAT_QEMU_CRASH_UART_BASE
136 mov_imm r0, PLAT_QEMU_CRASH_UART_BASE
|
| /rk3399_ARM-atf/plat/qemu/common/aarch64/ |
| H A D | plat_helpers.S | 68 mov_imm x2, PLAT_QEMU_HOLD_BASE
80 mov_imm x0, PLAT_QEMU_TRUSTED_MAILBOX_BASE
106 mov_imm x0, PLAT_QEMU_CRASH_UART_BASE
107 mov_imm x1, PLAT_QEMU_CRASH_UART_CLK_IN_HZ
108 mov_imm x2, PLAT_QEMU_CONSOLE_BAUDRATE
120 mov_imm x1, PLAT_QEMU_CRASH_UART_BASE
133 mov_imm x0, PLAT_QEMU_CRASH_UART_BASE
|
| /rk3399_ARM-atf/plat/aspeed/ast2700/ |
| H A D | plat_helpers.S | 51 mov_imm x1, SCU_CPU_SMP_EP0
64 mov_imm x0, CONSOLE_UART_BASE
65 mov_imm x1, CONSOLE_UART_CLKIN_HZ
66 mov_imm x2, CONSOLE_UART_BAUDRATE
72 mov_imm x1, CONSOLE_UART_BASE
78 mov_imm x0, CONSOLE_UART_BASE
|
| /rk3399_ARM-atf/plat/socionext/synquacer/ |
| H A D | sq_helpers.S | 50 mov_imm x0, BL2_MAILBOX_BASE
88 mov_imm x0, PLAT_SQ_BOOT_UART_BASE
89 mov_imm x1, PLAT_SQ_BOOT_UART_CLK_IN_HZ
90 mov_imm x2, SQ_CONSOLE_BAUDRATE
101 mov_imm x1, PLAT_SQ_BOOT_UART_BASE
113 mov_imm x0, PLAT_SQ_BOOT_UART_BASE
|
| /rk3399_ARM-atf/plat/qti/msm8916/aarch64/ |
| H A D | msm8916_helpers.S | 38 mov_imm x1, BLSP_UART_BASE
52 mov_imm x1, BLSP_UART_BASE
64 mov_imm x1, BLSP_UART_BASE
75 mov_imm x0, MPM_PS_HOLD
117 mov_imm x1, APCS_CFG(0)
141 mov_imm x1, BL31_BASE
|
| /rk3399_ARM-atf/plat/amlogic/common/aarch64/ |
| H A D | aml_helpers.S | 64 mov_imm x0, AML_UART0_AO_BASE
65 mov_imm x1, AML_UART0_AO_CLK_IN_HZ
66 mov_imm x2, AML_UART_BAUDRATE
76 mov_imm x1, AML_UART0_AO_BASE
87 mov_imm x0, AML_UART0_AO_BASE
|
| /rk3399_ARM-atf/plat/imx/imx7/common/ |
| H A D | imx7_helpers.S | 38 mov_imm r0, PLAT_IMX7_BOOT_UART_BASE
39 mov_imm r1, PLAT_IMX7_BOOT_UART_CLK_IN_HZ
40 mov_imm r2, PLAT_IMX7_CONSOLE_BAUDRATE
45 mov_imm r1, PLAT_IMX7_BOOT_UART_BASE
|
| /rk3399_ARM-atf/plat/allwinner/common/ |
| H A D | plat_helpers.S | 20 mov_imm x0, SUNXI_UART0_BASE
21 mov_imm x1, SUNXI_UART0_CLK_IN_HZ
22 mov_imm x2, SUNXI_UART0_BAUDRATE
27 mov_imm x1, SUNXI_UART0_BASE
|
| /rk3399_ARM-atf/plat/rpi/common/aarch64/ |
| H A D | plat_helpers.S | 90 mov_imm x2, PLAT_RPI3_TM_HOLD_BASE
108 mov_imm x0, PLAT_RPI3_TM_ENTRYPOINT
148 mov_imm x0, PLAT_RPI3_TM_HOLD_BASE
176 mov_imm x0, PLAT_RPI_CRASH_UART_BASE
178 mov_imm x1, RPI4_PL011_UART_CLOCK
179 mov_imm x2, PLAT_RPI_UART_BAUDRATE
196 mov_imm x1, PLAT_RPI_CRASH_UART_BASE
213 mov_imm x0, PLAT_RPI_CRASH_UART_BASE
|
| /rk3399_ARM-atf/plat/arm/board/juno/aarch64/ |
| H A D | juno_helpers.S | 159 mov_imm x0, (V2M_SYSREGS_BASE + V2M_SYS_ID)
216 mov_imm x0, PLAT_ARM_TRUSTED_MAILBOX_BASE
229 mov_imm \_reg_d, (0xe3000000 | \
239 mov_imm \_reg_d, (0xe3400000 | \
264 mov_imm w2, 0xe12fff10
267 mov_imm x3, HI_VECTOR_BASE
|
| /rk3399_ARM-atf/plat/intel/soc/common/aarch64/ |
| H A D | plat_helpers.S | 40 mov_imm x0, PLAT_SEC_ENTRY
45 mov_imm x0, PLAT_SEC_ENTRY
47 mov_imm x2, PLAT_CPUID_RELEASE
133 mov_imm x1, PLAT_SEC_ENTRY
216 mov_imm x1, PLAT_SEC_ENTRY
230 mov_imm x0, CRASH_CONSOLE_BASE
231 mov_imm x1, PLAT_UART_CLOCK
232 mov_imm x2, PLAT_BAUDRATE
244 mov_imm x1, CRASH_CONSOLE_BASE
249 mov_imm x0, CRASH_CONSOLE_BASE
|
| /rk3399_ARM-atf/plat/hisilicon/hikey960/include/ |
| H A D | plat_macros.S | 36 mov_imm x16, GICD_REG_BASE
37 mov_imm x17, GICC_REG_BASE
67 mov_imm x7, (CCI400_REG_BASE + SLAVE_IFACE_OFFSET( \
71 mov_imm x7, (CCI400_REG_BASE + SLAVE_IFACE_OFFSET( \
|
| /rk3399_ARM-atf/plat/hisilicon/hikey/include/ |
| H A D | plat_macros.S | 36 mov_imm x16, PLAT_ARM_GICD_BASE
37 mov_imm x17, PLAT_ARM_GICC_BASE
67 mov_imm x7, (CCI400_BASE + SLAVE_IFACE_OFFSET( \
71 mov_imm x7, (CCI400_BASE + SLAVE_IFACE_OFFSET( \
|
| /rk3399_ARM-atf/plat/mediatek/mt8183/include/ |
| H A D | plat_macros.S | 35 mov_imm x26, BASE_GICD_BASE
36 mov_imm x27, BASE_GICC_BASE
69 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
73 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
|
| /rk3399_ARM-atf/plat/mediatek/mt8173/include/ |
| H A D | plat_macros.S | 35 mov_imm x16, BASE_GICD_BASE
36 mov_imm x17, BASE_GICC_BASE
69 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
73 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
|
| /rk3399_ARM-atf/plat/arm/board/fvp/aarch64/ |
| H A D | fvp_helpers.S | 58 mov_imm x1, PWRC_BASE
71 mov_imm x0, PLAT_ARM_TRUSTED_MAILBOX_BASE
109 mov_imm x1, PWRC_BASE
129 mov_imm x0, PLAT_ARM_TRUSTED_MAILBOX_BASE
152 mov_imm x1, MPIDR_AFFINITY_MASK
|
| /rk3399_ARM-atf/plat/ti/common/ |
| H A D | k3_helpers.S | 147 mov_imm x0, CRASH_CONSOLE_BASE
148 mov_imm x1, CRASH_CONSOLE_CLK
149 mov_imm x2, CRASH_CONSOLE_BAUD_RATE
163 mov_imm x1, CRASH_CONSOLE_BASE
177 mov_imm x0, CRASH_CONSOLE_BASE
|
| /rk3399_ARM-atf/plat/hisilicon/hikey/aarch64/ |
| H A D | hikey_helpers.S | 46 mov_imm x0, CRASH_CONSOLE_BASE
47 mov_imm x1, PL011_UART_CLK_IN_HZ
48 mov_imm x2, PL011_BAUDRATE
60 mov_imm x1, CRASH_CONSOLE_BASE
73 mov_imm x0, CRASH_CONSOLE_BASE
|
| /rk3399_ARM-atf/plat/arm/board/corstone1000/common/ |
| H A D | corstone1000_helpers.S | 63 mov_imm x2, CORSTONE1000_SECONDARY_CORE_HOLD_BASE
66 mov_imm x3, CORSTONE1000_SECONDARY_CORE_STATE_WAIT
75 mov_imm x0, PLAT_ARM_TRUSTED_MAILBOX_BASE
122 mov_imm x1, MPIDR_AFFINITY_MASK
|
| /rk3399_ARM-atf/plat/qti/msm8916/include/ |
| H A D | plat_macros.S | 22 mov_imm x16, APCS_QGIC2_GICD
23 mov_imm x17, APCS_QGIC2_GICC
|