xref: /rk3399_ARM-atf/plat/nxp/s32/s32g274ardb2/plat_helpers.S (revision d0ce1ac58476f546ee87233112b59f4c73e11228)
18b81a39eSGhennadi Procopciuc/*
2*dbf400d0SGhennadi Procopciuc * Copyright 2024-2025 NXP
38b81a39eSGhennadi Procopciuc *
48b81a39eSGhennadi Procopciuc * SPDX-License-Identifier: BSD-3-Clause
58b81a39eSGhennadi Procopciuc */
68b81a39eSGhennadi Procopciuc
78b81a39eSGhennadi Procopciuc#include <asm_macros.S>
88b81a39eSGhennadi Procopciuc#include <platform_def.h>
95071f7c7SGhennadi Procopciuc#include <s32cc-ncore.h>
108b81a39eSGhennadi Procopciuc
118b81a39eSGhennadi Procopciuc.globl	plat_crash_console_flush
128b81a39eSGhennadi Procopciuc.globl	plat_crash_console_init
138b81a39eSGhennadi Procopciuc.globl	plat_crash_console_putc
148b81a39eSGhennadi Procopciuc.globl	plat_is_my_cpu_primary
15e73c3c3aSGhennadi Procopciuc.globl	plat_my_core_pos
168b81a39eSGhennadi Procopciuc.globl	plat_reset_handler
178b81a39eSGhennadi Procopciuc.globl	plat_secondary_cold_boot_setup
188b81a39eSGhennadi Procopciuc.globl	platform_mem_init
198b81a39eSGhennadi Procopciuc.globl	s32g2_core_pos_by_mpidr
208b81a39eSGhennadi Procopciuc
218b81a39eSGhennadi Procopciuc/* int plat_crash_console_init(void); */
228b81a39eSGhennadi Procopciucfunc plat_crash_console_init
238b81a39eSGhennadi Procopciuc	mov_imm	x0, UART_BASE
248b81a39eSGhennadi Procopciuc	mov_imm	x1, UART_CLOCK_HZ
258b81a39eSGhennadi Procopciuc	mov_imm	x2, UART_BAUDRATE
268b81a39eSGhennadi Procopciuc	b	console_linflex_core_init
278b81a39eSGhennadi Procopciucendfunc plat_crash_console_init
288b81a39eSGhennadi Procopciuc
298b81a39eSGhennadi Procopciuc/* int plat_crash_console_putc(int); */
308b81a39eSGhennadi Procopciucfunc plat_crash_console_putc
318b81a39eSGhennadi Procopciuc	mov_imm	x1, UART_BASE
328b81a39eSGhennadi Procopciuc	b	console_linflex_core_putc
338b81a39eSGhennadi Procopciuc	ret
348b81a39eSGhennadi Procopciucendfunc plat_crash_console_putc
358b81a39eSGhennadi Procopciuc
368b81a39eSGhennadi Procopciuc/* void plat_crash_console_flush(void); */
378b81a39eSGhennadi Procopciucfunc plat_crash_console_flush
3895ac568bSGhennadi Procopciuc	mov_imm	x0, UART_BASE
3995ac568bSGhennadi Procopciuc	b	console_linflex_core_flush
408b81a39eSGhennadi Procopciuc	ret
418b81a39eSGhennadi Procopciucendfunc plat_crash_console_flush
428b81a39eSGhennadi Procopciuc
438b81a39eSGhennadi Procopciuc/**
448b81a39eSGhennadi Procopciuc * unsigned int s32g2_core_pos_by_mpidr(u_register_t mpidr);
458b81a39eSGhennadi Procopciuc *
468b81a39eSGhennadi Procopciuc * In: x0 -  MPIDR_EL1
478b81a39eSGhennadi Procopciuc * Out: x0
488b81a39eSGhennadi Procopciuc * Clobber list: x0, x1
498b81a39eSGhennadi Procopciuc */
508b81a39eSGhennadi Procopciucfunc s32g2_core_pos_by_mpidr
518b81a39eSGhennadi Procopciuc	and	x1, x0, #MPIDR_CPU_MASK
528b81a39eSGhennadi Procopciuc	and	x0, x0, #MPIDR_CLUSTER_MASK
538b81a39eSGhennadi Procopciuc	lsr	x0, x0, #MPIDR_AFF1_SHIFT
548b81a39eSGhennadi Procopciuc	add	x0, x1, x0, lsl #PLATFORM_MPIDR_CPU_MASK_BITS
558b81a39eSGhennadi Procopciuc	ret
568b81a39eSGhennadi Procopciucendfunc s32g2_core_pos_by_mpidr
578b81a39eSGhennadi Procopciuc
588b81a39eSGhennadi Procopciuc/**
598b81a39eSGhennadi Procopciuc * unsigned int plat_my_core_pos(void);
608b81a39eSGhennadi Procopciuc *
618b81a39eSGhennadi Procopciuc * Out: x0
628b81a39eSGhennadi Procopciuc * Clobber list: x0, x1, x8
638b81a39eSGhennadi Procopciuc */
648b81a39eSGhennadi Procopciucfunc plat_my_core_pos
658b81a39eSGhennadi Procopciuc	mov	x8, x30
668b81a39eSGhennadi Procopciuc	mrs x0, mpidr_el1
678b81a39eSGhennadi Procopciuc	bl	s32g2_core_pos_by_mpidr
688b81a39eSGhennadi Procopciuc	mov	x30, x8
698b81a39eSGhennadi Procopciuc	ret
708b81a39eSGhennadi Procopciucendfunc plat_my_core_pos
718b81a39eSGhennadi Procopciuc
728b81a39eSGhennadi Procopciuc/**
738b81a39eSGhennadi Procopciuc * unsigned int plat_is_my_cpu_primary(void);
748b81a39eSGhennadi Procopciuc *
758b81a39eSGhennadi Procopciuc * Clobber list: x0, x1, x7, x8
768b81a39eSGhennadi Procopciuc */
778b81a39eSGhennadi Procopciucfunc plat_is_my_cpu_primary
788b81a39eSGhennadi Procopciuc	mov	x7, x30
798b81a39eSGhennadi Procopciuc	bl	plat_my_core_pos
808b81a39eSGhennadi Procopciuc	cmp	x0, #PLATFORM_PRIMARY_CPU
818b81a39eSGhennadi Procopciuc	cset	x0, eq
828b81a39eSGhennadi Procopciuc	mov	x30, x7
838b81a39eSGhennadi Procopciuc	ret
848b81a39eSGhennadi Procopciucendfunc plat_is_my_cpu_primary
858b81a39eSGhennadi Procopciuc
868b81a39eSGhennadi Procopciuc
878b81a39eSGhennadi Procopciuc/**
888b81a39eSGhennadi Procopciuc * void plat_secondary_cold_boot_setup (void);
898b81a39eSGhennadi Procopciuc */
908b81a39eSGhennadi Procopciucfunc plat_secondary_cold_boot_setup
918b81a39eSGhennadi Procopciuc	ret
928b81a39eSGhennadi Procopciucendfunc plat_secondary_cold_boot_setup
938b81a39eSGhennadi Procopciuc
948b81a39eSGhennadi Procopciuc/**
958b81a39eSGhennadi Procopciuc * void plat_reset_handler(void);
968b81a39eSGhennadi Procopciuc *
978b81a39eSGhennadi Procopciuc * Set the CAIUTC[IsolEn] bit for the primary A53 cluster.
988b81a39eSGhennadi Procopciuc * This is so cache invalidate operations from the early TF-A boot code
998b81a39eSGhennadi Procopciuc * won't cause Ncore to crash.
1008b81a39eSGhennadi Procopciuc *
1018b81a39eSGhennadi Procopciuc * Clobber list: x0, x1, x2
1028b81a39eSGhennadi Procopciuc */
1038b81a39eSGhennadi Procopciucfunc plat_reset_handler
1045071f7c7SGhennadi Procopciuc	mov	x0, #NCORE_CAIU0_BASE_ADDR
1055071f7c7SGhennadi Procopciuc	ldr	w1, [x0, #NCORE_CAIUTC_OFF]
1068b81a39eSGhennadi Procopciuc	movz	w2, #1
1075071f7c7SGhennadi Procopciuc	lsl	w2, w2, #NCORE_CAIUTC_ISOLEN_SHIFT
1088b81a39eSGhennadi Procopciuc	orr	w1, w1, w2
1095071f7c7SGhennadi Procopciuc	str	w1, [x0, #NCORE_CAIUTC_OFF]
1108b81a39eSGhennadi Procopciuc	ret
1118b81a39eSGhennadi Procopciucendfunc plat_reset_handler
1128b81a39eSGhennadi Procopciuc
1138b81a39eSGhennadi Procopciuc/* void platform_mem_init(void); */
1148b81a39eSGhennadi Procopciucfunc platform_mem_init
1158b81a39eSGhennadi Procopciuc	mov	x10, x30
1165221661eSGhennadi Procopciuc	mov_imm	x0, BL31_BASE
1175221661eSGhennadi Procopciuc	mov_imm	x1, BL31_LIMIT
1188b81a39eSGhennadi Procopciuc	sub	x1, x1, x0
1198b81a39eSGhennadi Procopciuc	bl	zeromem
1205221661eSGhennadi Procopciuc	mov_imm	x0, BL33_BASE
1215221661eSGhennadi Procopciuc	mov_imm	x1, BL33_LIMIT
1228b81a39eSGhennadi Procopciuc	sub	x1, x1, x0
1238b81a39eSGhennadi Procopciuc	bl	zeromem
124*dbf400d0SGhennadi Procopciuc	mov_imm	x0, IO_BUFFER_BASE
125*dbf400d0SGhennadi Procopciuc	mov_imm	x1, IO_BUFFER_SIZE
126*dbf400d0SGhennadi Procopciuc	bl	zeromem
1278b81a39eSGhennadi Procopciuc	mov	x30, x10
1288b81a39eSGhennadi Procopciuc	ret
1298b81a39eSGhennadi Procopciucendfunc platform_mem_init
1308b81a39eSGhennadi Procopciuc
131