Merge changes from topic "hold-pen-generic" into integration

* changes:
fix(corstone-1000): use generic hold pen
refactor(platforms): add generic hold pen

refactor(platforms): add generic hold pen

Introduce a common hold pen implementation for SMP secondary CPU
bring-up. Each core has a cache-line-aligned hold_slot struct
whose 'entry' field holds HO

refactor(platforms): add generic hold pen

Introduce a common hold pen implementation for SMP secondary CPU
bring-up. Each core has a cache-line-aligned hold_slot struct
whose 'entry' field holds HOLD_STATE_WAIT (all-ones sentinel)
while the core should keep polling, or the warm boot entrypoint
address when it should go.

plat_hold_pen_init() sets all slots to HOLD_STATE_WAIT and flushes
them to main memory. This is called once during boot to
establish a known-good state, overwriting any stale cached data
left by earlier boot stages (e.g. a BL2 dcsw_op_all).

plat_hold_pen_signal() writes the entrypoint into the target slot,
flushes it, and issues SEV.

The plat_hold_pen_wait_and_jump assembly macro provides the
secondary CPU polling loop for both AArch64 and AArch32.

Change-Id: Id7322cb9e8caa6a750348d194b4db66e2a515623
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>

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