Merge changes from topic "msm8916-plats" into integration

* changes:
docs(msm8916): document new platforms
feat(msm8916): add port for MDM9607
refactor(msm8916): handle single core platforms

Merge changes from topic "msm8916-plats" into integration

* changes:
docs(msm8916): document new platforms
feat(msm8916): add port for MDM9607
refactor(msm8916): handle single core platforms
feat(msm8916): add port for MSM8939
feat(msm8916): power on L2 caches for secondary clusters
feat(msm8916): initialize CCI-400 for multiple clusters
refactor(msm8916): handle multiple CPU clusters
feat(msm8916): add port for MSM8909
feat(msm8916): clear CACHE_LOCK for MMU-500 r2p0+
style(msm8916): add missing braces to while statements

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refactor(msm8916): handle single core platforms

Some Qualcomm modem platforms (MDM*) are quite similar to MSM8916
except that there is just a single CPU core. This requires some special
handling:

refactor(msm8916): handle single core platforms

Some Qualcomm modem platforms (MDM*) are quite similar to MSM8916
except that there is just a single CPU core. This requires some special
handling:

- There is no GPU so the GPU SMMU also does not exist.
- Looking closely at dumps of the MMIO register regions reveals that
some of the register addresses are slightly different.

Add the necessary checks for this to allow building for those
platforms.

No functional change for existing platforms.

Change-Id: I0380ac3734876243e970a55d8bec5a8247175343
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>

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refactor(msm8916): handle multiple CPU clusters

Some Qualcomm platforms similar to MSM8916 have multiple CPU clusters.
In this case, some of the hardware blocks are duplicated and must be
configured

refactor(msm8916): handle multiple CPU clusters

Some Qualcomm platforms similar to MSM8916 have multiple CPU clusters.
In this case, some of the hardware blocks are duplicated and must be
configured separately.

Refactor the code to handle additional clusters by introducing loops
and some conditionals.

No functional change for existing single cluster platforms.

Change-Id: I5b4b1ad2a1adde559d5b79b7698afe73733b2e90
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>

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Merge changes from topic "msm8916-spmin" into integration

* changes:
docs(msm8916): document new build options
feat(msm8916): allow selecting which UART to use
feat(msm8916): add SP_MIN port f

Merge changes from topic "msm8916-spmin" into integration

* changes:
docs(msm8916): document new build options
feat(msm8916): allow selecting which UART to use
feat(msm8916): add SP_MIN port for AArch32
refactor(msm8916): detect cold boot in plat_get_my_entrypoint
feat(msm8916): add Test Secure Payload (TSP) port
build(msm8916): place bl32 directly after bl31
refactor(msm8916): separate common platform setup code

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feat(msm8916): allow selecting which UART to use

At the moment the msm8916 platform port always uses UART number 2 for
debug output. In some situations it is necessary to change this, either
because

feat(msm8916): allow selecting which UART to use

At the moment the msm8916 platform port always uses UART number 2 for
debug output. In some situations it is necessary to change this, either
because only the other UART is exposed on the board or for runtime
debugging, to avoid conflicting with the normal world.

Make the UART to use configurable using QTI_UART_NUM on the make
command line and also add QTI_RUNTIME_UART as an option to keep using
the UART after early boot. The latter is disabled by default since it
requires reserving the UART and related clocks inside the normal world.

Change-Id: I14725f954bbcecebcf317e8601922a3d00f2ec28
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>

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refactor(msm8916): detect cold boot in plat_get_my_entrypoint

The msm8916 platform port needs to disable the TCM redirect to the L2
cache as early as possible during cold boot to avoid crashes. Righ

refactor(msm8916): detect cold boot in plat_get_my_entrypoint

The msm8916 platform port needs to disable the TCM redirect to the L2
cache as early as possible during cold boot to avoid crashes. Right now
this is done in plat_reset_handler by checking if BL31 was started
through the "boot remapper", which redirects memory accesses around the
fixed CPU reset address (0x0) to the actual link address of BL31. On
AArch64 this is always the case during cold boot, since a CPU reset was
necessary to switch from AArch32 in the initial bootloader to AArch64.

On AArch32, SP_MIN starts running at the real link address immediately,
so the initial cold boot must be detected with a different approach.

To keep the AArch32 and AArch64 implementation of this functionality
consistent, move this functionality to plat_get_my_entrypoint, by
checking if the msm8916_entry_point is still zero or was already
updated for later warm boots by the PSCI code.

Also, avoid entering BL31 twice and instead add the BL31_BASE offset
to the return address in the link register. This allows preserving the
bootloader arguments in x0-x3 because they otherwise get lost.

Change-Id: I90286c6cacf23f44ed7930a3e7e33804ca63c391
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>

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Merge changes I5bb43cb0,I6aebe2ca,Ib59df16a,I9d037ab2,I9df5a465, ... into integration

* changes:
fix(msm8916): add timeout for crash console TX flush
style(msm8916): use size macros
feat(msm89

Merge changes I5bb43cb0,I6aebe2ca,Ib59df16a,I9d037ab2,I9df5a465, ... into integration

* changes:
fix(msm8916): add timeout for crash console TX flush
style(msm8916): use size macros
feat(msm8916): expose more timer frames
fix(msm8916): drop unneeded initialization of CNTACR
build(msm8916): disable unneeded workarounds
fix(msm8916): flush dcache after writing msm8916_entry_point
fix(msm8916): print \r before \n on UART console

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fix(msm8916): add timeout for crash console TX flush

Resetting the UART DM controller while there are still remaining
characters in the FIFO often results in corruption on the UART receiver
side. To

fix(msm8916): add timeout for crash console TX flush

Resetting the UART DM controller while there are still remaining
characters in the FIFO often results in corruption on the UART receiver
side. To avoid this the msm8916 crash console implementation tries to
wait until the TX FIFO is empty.

Unfortunately this might spin forever if the transmitter was disabled
before it has fully finished transmitting. In this case the TXEMT bit
console_uartdm_core_flush is waiting for will never get set.

There seems to be no good way to detect if the transmitter is actually
enabled via the status registers. However, the TX FIFO is fairly small
and should not take too long to get flushed, so fix this by simply
limiting the amount of iterations with a short timeout.

Move the code to console_uartdm_core_init to ensure that this always
happens before resetting the transmitter (also during initialization).

Change-Id: I5bb43cb0b6c029bcd15e253d60d36c0b310e108b
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>

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Merge changes from topic "msm8916" into integration

* changes:
feat(msm8916): allow booting secondary CPU cores
feat(msm8916): setup hardware for non-secure world
feat(gic): allow overriding G

Merge changes from topic "msm8916" into integration

* changes:
feat(msm8916): allow booting secondary CPU cores
feat(msm8916): setup hardware for non-secure world
feat(gic): allow overriding GICD_PIDR2_GICV2 address
feat(msm8916): initial platform port
docs(msm8916): new port for Qualcomm Snapdragon 410

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feat(msm8916): initial platform port

Introduce the bare mimimum base of the msm8916 BL31 port. This is
pretty much just a standard platform "skeleton" with CPU/memory
initialization and an UART driv

feat(msm8916): initial platform port

Introduce the bare mimimum base of the msm8916 BL31 port. This is
pretty much just a standard platform "skeleton" with CPU/memory
initialization and an UART driver. This allows booting into
e.g. U-Boot with working UART output.

Note that the plat/qti/msm8916 port is completely separate and does not
make use of anything in plat/qti/common at the moment. The main reason
for that is that plat/qti/common is heavily focused around having a
binary "qtiseclib" component, while the MSM8916 port is fully
open-source (and therefore somewhat limited to publicly documented
functionality).

In the future it might be possible to re-use some of the open-source
parts in plat/qti/common (e.g. spmi_arb.c or pm_ps_hold.c) but it's
not strictly required for the basic functionality supported so far.

Change-Id: I7b4375df0f947b3bd1e55b0b52b21edb6e6d175b
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>

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