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9f0f203d |
| 16-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1756 from antonio-nino-diaz-arm/an/header-deps
plat/arm: Fix header dependencies
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234bc7f8 |
| 15-Jan-2019 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
plat/arm: Fix header dependencies
From now on, platform_def.h must include any header with definitions that are platform-specific (like arm_def.h) and the included headers mustn't include back platf
plat/arm: Fix header dependencies
From now on, platform_def.h must include any header with definitions that are platform-specific (like arm_def.h) and the included headers mustn't include back platform_def.h, and shouldn't be used by other files. Only platform_def.h should be included in other files. This will ensure that all needed definitions are present, rather than needing to include all the headers in all the definitions' headers just in case.
This also prevents problems like cyclic dependencies.
Change-Id: I9d3cf4d1de4b956fa035c79545222697acdaf5ca Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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9a207532 |
| 04-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1726 from antonio-nino-diaz-arm/an/includes
Sanitise includes across codebase
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09d40e0e |
| 14-Dec-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - inclu
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them).
For example, this patch had to be created because two headers were called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3a282 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988b9 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems.
Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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1278f363 |
| 18-Oct-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1631 from deepan02/deepak-arm/relocate-jump_if_cpu_midr
plat/arm: relocate the jump_if_cpu_midr macro.
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da3b038f |
| 11-Oct-2018 |
Deepak Pandey <Deepak.Pandey@arm.com> |
plat/arm: relocate the jump_if_cpu_midr macro.
macro jump_if_cpu_midr is used commonly by many arm platform. It has now been relocated to common place to remove duplication of code.
Change-Id: Ic08
plat/arm: relocate the jump_if_cpu_midr macro.
macro jump_if_cpu_midr is used commonly by many arm platform. It has now been relocated to common place to remove duplication of code.
Change-Id: Ic0876097dbc085df4f90eadb4b7687dde7c726da Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
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ff07ca20 |
| 11-Sep-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1086 from robertovargas-arm/dead_loop
juno: Fix bug in plat_get_my_entrypoint
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d9b7636e |
| 01-Sep-2017 |
Roberto Vargas <roberto.vargas@arm.com> |
juno: Fix bug in plat_get_my_entrypoint
plat_get_my_entrypoint was branching to juno_do_reset_to_aarch_32_state, which is not supposed to return, and in case of returning it implemented an infinite
juno: Fix bug in plat_get_my_entrypoint
plat_get_my_entrypoint was branching to juno_do_reset_to_aarch_32_state, which is not supposed to return, and in case of returning it implemented an infinite loop. The problem was that plat_get_my_entrypoint was using "b" instead of "bl", so juno_do_reset_to_aarch_32_state was returning to the caller of plat_get_my_entrypoint instead of stop the system with a panic.
To avoid this problem juno_do_reset_to_aarch_32_state was modified to call directly to plat_panic_handler if it tries to return.
Change-Id: I591cf2dd78d27d8568fb15b91366e4b3dce027b5 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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38fe380a |
| 27-Jun-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1000 from dp-arm/dp/aarch32-boot
juno/aarch32: Fix boot on Cortex A57 and A72
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35bd2dda |
| 19-Jun-2017 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
juno: Invalidate all caches before warm reset to AArch32 state.
On Juno AArch32, the L2 cache may contain garbage after the warm reset from AArch64 to AArch32. This is all fine until the MMU is con
juno: Invalidate all caches before warm reset to AArch32 state.
On Juno AArch32, the L2 cache may contain garbage after the warm reset from AArch64 to AArch32. This is all fine until the MMU is configured and the data caches enabled. To avoid fetching stale data from the L2 unified cache, invalidate it before the warm reset to AArch32 state.
Change-Id: I7d27e810692c02c3e83c9f31de67f6bae59a960a Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
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6de8b24f |
| 16-Jun-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #953 from vwadekar/tegra-misra-fixes-v1
Tegra misra fixes v1
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fb7d32e5 |
| 05-Jun-2017 |
Varun Wadekar <vwadekar@nvidia.com> |
Unique names for defines in the CPU libraries
This patch makes all the defines in the CPU libraries unique, by prefixing them with the CPU name.
NOTE: PLATFORMS USING THESE MACROS WILL HAVE TO UPDA
Unique names for defines in the CPU libraries
This patch makes all the defines in the CPU libraries unique, by prefixing them with the CPU name.
NOTE: PLATFORMS USING THESE MACROS WILL HAVE TO UPDATE THEIR CODE TO START USING THE UPDATED NAMES
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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f132b4a0 |
| 04-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #925 from dp-arm/dp/spdx
Use SPDX license identifiers
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82cb2c1a |
| 03-May-2017 |
dp-arm <dimitris.papastamos@arm.com> |
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by FreeBSD have not been modified.
[0]: https://spdx.org/
Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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0f22bef3 |
| 29-Apr-2017 |
Scott Branden <sbranden@users.noreply.github.com> |
Merge branch 'integration' into tf_issue_461
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484acce3 |
| 21-Apr-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #910 from dp-arm/dp/AArch32-juno-port
Add AArch32 support for Juno
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07570d59 |
| 14-Nov-2016 |
Yatharth Kochar <yatharth.kochar@arm.com> |
Changes to support execution in AArch32 state for JUNO
Following steps are required to boot JUNO in AArch32 state: 1> BL1, in AArch64 state, loads BL2. 2> BL2, in AArch64 state, initializes DDR. L
Changes to support execution in AArch32 state for JUNO
Following steps are required to boot JUNO in AArch32 state: 1> BL1, in AArch64 state, loads BL2. 2> BL2, in AArch64 state, initializes DDR. Loads SP_MIN & BL33 (AArch32 executable)images. Calls RUN_IMAGE SMC to go back to BL1. 3> BL1 writes AArch32 executable opcodes, to load and branch at the entrypoint address of SP_MIN, at HI-VECTOR address and then request for warm reset in AArch32 state using RMR_EL3.
This patch makes following changes to facilitate above steps: * Added assembly function to carry out step 3 above. * Added region in TZC that enables Secure access to the HI-VECTOR(0xFFFF0000) address space. * AArch32 image descriptor is used, in BL2, to load SP_MIN and BL33 AArch32 executable images.
A new flag `JUNO_AARCH32_EL3_RUNTIME` is introduced that controls above changes. By default this flag is disabled.
NOTE: BL1 and BL2 are not supported in AArch32 state for JUNO.
Change-Id: I091d56a0e6d36663e6d9d2bb53c92c672195d1ec Signed-off-by: Yatharth Kochar <yatharth.kochar@arm.com> Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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1b5fa6ef |
| 12-Dec-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #774 from jeenu-arm/no-return-macro
Define and use no_ret macro where no return is expected
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a806dad5 |
| 30-Nov-2016 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
Define and use no_ret macro where no return is expected
There are many instances in ARM Trusted Firmware where control is transferred to functions from which return isn't expected. Such jumps are ma
Define and use no_ret macro where no return is expected
There are many instances in ARM Trusted Firmware where control is transferred to functions from which return isn't expected. Such jumps are made using 'bl' instruction to provide the callee with the location from which it was jumped to. Additionally, debuggers infer the caller by examining where 'lr' register points to. If a 'bl' of the nature described above falls at the end of an assembly function, 'lr' will be left pointing to a location outside of the function range. This misleads the debugger back trace.
This patch defines a 'no_ret' macro to be used when jumping to functions from which return isn't expected. The macro ensures to use 'bl' instruction for the jump, and also, for debug builds, places a 'nop' instruction immediately thereafter (unless instructed otherwise) so as to leave 'lr' pointing within the function range.
Change-Id: Ib34c69fc09197cfd57bc06e147cc8252910e01b0 Co-authored-by: Douglas Raillard <douglas.raillard@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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3dd9835f |
| 25-Jul-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #667 from soby-mathew/sm/PSCI_lib
Introduce PSCI library
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4c0d0390 |
| 16-Jun-2016 |
Soby Mathew <soby.mathew@arm.com> |
Rework type usage in Trusted Firmware
This patch reworks type usage in generic code, drivers and ARM platform files to make it more portable. The major changes done with respect to type usage are as
Rework type usage in Trusted Firmware
This patch reworks type usage in generic code, drivers and ARM platform files to make it more portable. The major changes done with respect to type usage are as listed below:
* Use uintptr_t for storing address instead of uint64_t or unsigned long. * Review usage of unsigned long as it can no longer be assumed to be 64 bit. * Use u_register_t for register values whose width varies depending on whether AArch64 or AArch32. * Use generic C types where-ever possible.
In addition to the above changes, this patch also modifies format specifiers in print invocations so that they are AArch64/AArch32 agnostic. Only files related to upcoming feature development have been reworked.
Change-Id: I9f8c78347c5a52ba7027ff389791f1dad63ee5f8
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63a6d09a |
| 16-Mar-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #550 from antonio-nino-diaz-arm/an/dead_loops
Remove all non-configurable dead loops
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1c3ea103 |
| 01-Feb-2016 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Remove all non-configurable dead loops
Added a new platform porting function plat_panic_handler, to allow platforms to handle unexpected error situations. It must be implemented in assembly as it ma
Remove all non-configurable dead loops
Added a new platform porting function plat_panic_handler, to allow platforms to handle unexpected error situations. It must be implemented in assembly as it may be called before the C environment is initialized. A default implementation is provided, which simply spins.
Corrected all dead loops in generic code to call this function instead. This includes the dead loop that occurs at the end of the call to panic().
All unnecesary wfis from bl32/tsp/aarch64/tsp_exceptions.S have been removed.
Change-Id: I67cb85f6112fa8e77bd62f5718efcef4173d8134
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4a1dcde7 |
| 19-Nov-2015 |
Achin Gupta <achin.gupta@arm.com> |
Merge pull request #435 from sandrine-bailleux/sb/juno-r2
Changes to platform reset handler for Juno r2
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1dbe3159 |
| 18-Nov-2015 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Juno R2: Configure the correct L2 RAM latency values
The default reset values for the L2 Data & Tag RAM latencies on the Cortex-A72 on Juno R2 are not suitable. This patch modifies the Juno platform
Juno R2: Configure the correct L2 RAM latency values
The default reset values for the L2 Data & Tag RAM latencies on the Cortex-A72 on Juno R2 are not suitable. This patch modifies the Juno platform reset handler to configure the right settings on Juno R2.
Change-Id: I20953de7ba0619324a389e0b7bbf951b64057db8
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