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Searched refs:fixed (Results 1 – 25 of 47) sorted by relevance

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/rk3399_ARM-atf/plat/renesas/common/
H A Drcar_common.c55 unsigned int fixed = 0; in plat_ea_handler() local
57 fixed |= rcar_pcie_fixup(0); in plat_ea_handler()
58 fixed |= rcar_pcie_fixup(1); in plat_ea_handler()
60 if (fixed) in plat_ea_handler()
/rk3399_ARM-atf/docs/design/
H A Dcpu-specific-build-macros.rst212 CPU. This needs to be enabled only for revision r0p0 of the CPU, and is fixed
217 is fixed in r1p1.
262 It is fixed in r3p0.
265 revisions of Cortex-A76 CPU. This errata is fixed in r3p0 but due to
271 It is fixed in r3p0.
306 fixed in r1p1.
310 fixed in r1p1.
314 fixed in r1p1.
363 CPU. This needs to be enabled for revision r0p0, it is fixed in r1p0.
421 fixed in r0p1.
[all …]
/rk3399_ARM-atf/docs/security_advisories/
H A Dsecurity-advisory-tfv-13.rst47 | cortex-x4 | r0p0, r0p1, r0p2 | fixed in r0p3 |
49 | cortex-x925 | r0p0, r0p1 | fixed in r0p2 |
53 | neoverse-v3 | r0p0, r0p1 | fixed in r0p2 |
55 | neoverse-v3ae | r0p0, r0p1 | fixed in r0p2 |
57 | c1-premium | r0p0 | fixed in r1p0 |
59 | c1-pro | r0p0, r1p0 | fixed in r1p1 |
61 | c1-ultra | r0p0 | fixed in r1p0 |
H A Dsecurity-advisory-tfv-5.rst50 NOTE: The original pull request referenced above only fixed the issue for S-EL1
51 whereas the EL3 was fixed in the later commits.
/rk3399_ARM-atf/fdts/
H A Dmorello.dtsi85 compatible = "fixed-clock";
92 compatible = "fixed-clock";
99 compatible = "fixed-clock";
H A Dcorstone700.dtsi51 compatible = "fixed-clock";
59 compatible = "fixed-clock";
67 compatible = "fixed-clock";
H A Dn1sdp-single-chip.dts34 compatible = "fixed-clock";
41 compatible = "fixed-clock";
H A Drtsm_ve-motherboard.dtsi14 compatible = "fixed-clock";
21 compatible = "fixed-clock";
28 compatible = "fixed-clock";
35 compatible = "regulator-fixed";
H A Dtc-base.dtsi46 /* Use fixed clocks */
341 compatible = "fixed-clock";
348 compatible = "fixed-clock";
355 compatible = "fixed-clock";
373 compatible = "fixed-clock";
380 compatible = "fixed-clock";
428 compatible = "fixed-clock";
442 compatible = "regulator-fixed";
463 compatible = "fixed-clock";
469 compatible = "fixed-clock";
H A Dstm32mp15xx-dhcor-io1v8.dtsi11 compatible = "regulator-fixed";
H A Darm_fpga.dts68 compatible = "fixed-clock";
75 compatible = "fixed-clock";
H A Dstm32mp251.dtsi30 compatible = "fixed-clock";
36 compatible = "fixed-clock";
42 compatible = "fixed-clock";
48 compatible = "fixed-clock";
54 compatible = "fixed-clock";
H A Dstm32mp211.dtsi86 compatible = "fixed-clock";
92 compatible = "fixed-clock";
98 compatible = "fixed-clock";
104 compatible = "fixed-clock";
110 compatible = "fixed-clock";
H A Drdaspen.dts56 compatible = "fixed-clock";
118 /* UART is fixed as 24MHz, both UARTCLK and PCLK */
H A Dstm32mp131.dtsi32 compatible = "fixed-clock";
38 compatible = "fixed-clock";
44 compatible = "fixed-clock";
50 compatible = "fixed-clock";
56 compatible = "fixed-clock";
H A Dstm32mp231.dtsi67 compatible = "fixed-clock";
73 compatible = "fixed-clock";
79 compatible = "fixed-clock";
85 compatible = "fixed-clock";
91 compatible = "fixed-clock";
H A Dn1sdp.dtsi71 compatible = "fixed-clock";
78 compatible = "fixed-clock";
H A Dstm32mp157c-lxa-mc1.dts40 compatible = "regulator-fixed";
H A Dstm32mp151.dtsi43 compatible = "fixed-clock";
49 compatible = "fixed-clock";
55 compatible = "fixed-clock";
61 compatible = "fixed-clock";
67 compatible = "fixed-clock";
H A Dfvp-ve-Cortex-A7x1.dts64 compatible = "fixed-clock";
H A Dstm32mp135f-dk.dts36 compatible = "regulator-fixed";
44 compatible = "regulator-fixed";
H A Dmorello-soc.dts279 compatible = "fixed-clock";
302 compatible = "fixed-clock";
453 compatible = "fixed-clock";
H A Dstm32mp153c-lxa-fairytux2.dts40 compatible = "regulator-fixed";
H A Dstm32mp157c-lxa-tac.dts40 compatible = "regulator-fixed";
/rk3399_ARM-atf/docs/plat/
H A Drpi5.rst31 - ``PRELOADED_BL33_BASE``: Used to specify the fixed address of a BL33 binary
35 - ``RPI3_PRELOADED_DTB_BASE``: This option allows to specify the fixed address of

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