Merge changes from topic "stm32mp2_fixes" into integration

* changes:
fix(stm32mp2-fdts): set SDMMC max frequency to 166 MHz on stm32mp25
fix(stm32mp25-fdts): new swizzle configuration for STM32

Merge changes from topic "stm32mp2_fixes" into integration

* changes:
fix(stm32mp2-fdts): set SDMMC max frequency to 166 MHz on stm32mp25
fix(stm32mp25-fdts): new swizzle configuration for STM32MP257F-EV1 board
fix(st-clock): prevent panic when external oscillator is absent
feat(st-clock): rename RCC_USBTCCFGR register into RCC_UCPDCFGR
fix(dt-bindings): bad FLEXGEN configuration of pred-division for STM32MP25
fix(st-clock): force ARM_DIVSEL for flexgen63 config at 400MHz

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fix(stm32mp2-fdts): set SDMMC max frequency to 166 MHz on stm32mp25

Set SDMMC max frequency to 166 MHz on stm32mp25.

Change-Id: Ibc1eadcf7d942c9723bfe41d711a78371dfed99f
Signed-off-by: Christophe K

fix(stm32mp2-fdts): set SDMMC max frequency to 166 MHz on stm32mp25

Set SDMMC max frequency to 166 MHz on stm32mp25.

Change-Id: Ibc1eadcf7d942c9723bfe41d711a78371dfed99f
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>

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Merge changes Ib220a866,I38e6af65,I1554efdb,Iae99985e,I96f96267, ... into integration

* changes:
feat(stm32mp25-fdts): enable rng nodes for ST boards
feat(stm32mp2): prepare DDR secure area encr

Merge changes Ib220a866,I38e6af65,I1554efdb,Iae99985e,I96f96267, ... into integration

* changes:
feat(stm32mp25-fdts): enable rng nodes for ST boards
feat(stm32mp2): prepare DDR secure area encryption
feat(stm32mp2): add some platform helpers
feat(st-drivers): add RISAF driver
feat(fdts): add RISAF nodes for STM32MP25
feat(stm32mp2-fdts): add memory firewall node
feat(stm32mp2-fdts): add firewall nodes in fw-config
feat(stm32mp2): add RIF dt-binding defines
feat(stm32mp1-fdts): add MCE support for STM32MP13 DK board
feat(stm32mp1): prepare DDR secure area encryption for STM32MP13
feat(stm32mp1): enable MCE driver for STM32MP13
feat(st-drivers): add Memory Cipher Engine driver
feat(dt-bindings): add MCE DT bindings for STM32MP13
fix(st-crypto): improve RNG health test configuration
feat(st): add RNG minor version
feat(st-crypto): add multi instance and error management in RNG driver
feat(stm32mp2): add HASH and RNG compilation
feat(stm32mp25-fdts): add RNG node

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feat(fdts): add RISAF nodes for STM32MP25

Add RISAF2 and RISAF4 nodes in STM32MP25 SoC DT file.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.ba

feat(fdts): add RISAF nodes for STM32MP25

Add RISAF2 and RISAF4 nodes in STM32MP25 SoC DT file.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I96f96267292e7f7a498a87c60e35310e25b41d6d

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feat(stm32mp25-fdts): add RNG node

IP aligned with STM32MP13, use same compatible.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Cha

feat(stm32mp25-fdts): add RNG node

IP aligned with STM32MP13, use same compatible.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change-Id: I230c405a8e2baaf952d90646aaa54239fed9fdf4

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Merge changes Ic79429c3,Ie2d5272e,Iec73f9c5,Ie63f48dc,I951da75a, ... into integration

* changes:
feat(stm32mp2): load FW binaries to DDR
feat(stm32mp2-fdts): update STM32MP257F-EV1 DT
feat(fdt

Merge changes Ic79429c3,Ie2d5272e,Iec73f9c5,Ie63f48dc,I951da75a, ... into integration

* changes:
feat(stm32mp2): load FW binaries to DDR
feat(stm32mp2-fdts): update STM32MP257F-EV1 DT
feat(fdts): add DDR4 files for STM32MP2
feat(stm32mp25-fdts): add DDRCTRL and DDRPHY settings in DDR node
feat(stm32mp25-fdts): add DDR power supplies
feat(stm32mp2-fdts): add memory node
feat(stm32mp2): enable DDR driver

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feat(stm32mp2-fdts): add memory node

Add ddr node in stm32mp251.dtsi file, which gives addresses to DDR PHY
and DDR controller.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I719bfd1

feat(stm32mp2-fdts): add memory node

Add ddr node in stm32mp251.dtsi file, which gives addresses to DDR PHY
and DDR controller.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I719bfd1640a8217ff79e79b5b53845b75421d298

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Merge changes I14df5d21,I7f952205,I6f52ec2c,Ibe0cacf8 into integration

* changes:
feat(stm32mp2-fdts): describe stpmic2 power supplies
feat(stm32mp2-fdts): add I2C7 pin muxing
feat(stm32mp2-fd

Merge changes I14df5d21,I7f952205,I6f52ec2c,Ibe0cacf8 into integration

* changes:
feat(stm32mp2-fdts): describe stpmic2 power supplies
feat(stm32mp2-fdts): add I2C7 pin muxing
feat(stm32mp2-fdts): add UART and I2C nodes for STM32MP2
feat(st-pmic): add STPMIC2 driver

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feat(stm32mp2-fdts): add UART and I2C nodes for STM32MP2

Update stm32mp251.dtsi SoC DT file to include UART and I2C nodes.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Maxi

feat(stm32mp2-fdts): add UART and I2C nodes for STM32MP2

Update stm32mp251.dtsi SoC DT file to include UART and I2C nodes.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change-Id: I6f52ec2c1735d28ba4a424af71e7eae5b0ac3e0d

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Merge changes from topic "stm32mp2_bl2_updates" into integration

* changes:
feat(stm32mp2): load fw-config file
feat(stm32mp2): add fw-config compilation
feat(stm32mp2-fdts): add fw-config fil

Merge changes from topic "stm32mp2_bl2_updates" into integration

* changes:
feat(stm32mp2): load fw-config file
feat(stm32mp2): add fw-config compilation
feat(stm32mp2-fdts): add fw-config files for STM32MP257F-EV1
feat(stm32mp2-fdts): add fw-config file
feat(stm32mp2-fdts): add clock tree for STM32MP257F-EV1
feat(stm32mp2): enable DDR sub-system clock
feat(stm32mp2): add fixed regulators support
feat(stm32mp2): print board info
feat(stm32mp2): display CPU info
feat(stm32mp2): get chip ID
feat(stm32mp2): add BL2 boot first steps
feat(stm32mp2): add defines for the PWR peripheral
feat(stm32mp2-fdts): add SD-card and eMMC support on STM32MP257F-EV1
feat(stm32mp2-fdts): add sdmmc pins definition
feat(stm32mp2-fdts): add sdmmc nodes in SoC DT file
feat(stm32mp2-fdts): add io_policies
feat(stm32mp2-fdts): remove pins-are-numbered

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feat(stm32mp2): display CPU info

Print information about CPU type, package and revision.
SoC revision ID of MP2 family are defined with the OTP 102.

Signed-off-by: Maxime Méré <maxime.mere@foss.st.

feat(stm32mp2): display CPU info

Print information about CPU type, package and revision.
SoC revision ID of MP2 family are defined with the OTP 102.

Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I14a95c8a7cb9b06ce32c2e592ae69a1741067e8d

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feat(stm32mp2-fdts): add sdmmc nodes in SoC DT file

Add the sdmmc1 & sdmmc2 nodes in stm32mp251.dtsi file, to support
eMMC or SD-cards.
To avoid increasing DT size if SD-card or eMMC boot is not sel

feat(stm32mp2-fdts): add sdmmc nodes in SoC DT file

Add the sdmmc1 & sdmmc2 nodes in stm32mp251.dtsi file, to support
eMMC or SD-cards.
To avoid increasing DT size if SD-card or eMMC boot is not selected,
the nodes are removed from DT thanks to stm32mp25-bl2.dtsi overlay.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I2ed841442b7dddf0c441ae3b3d2462ef535f9951

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feat(stm32mp2-fdts): remove pins-are-numbered

Remove the deprecated property "pins-are-numbered" from pinctrl and
pinctrl_z nodes of stm32mp25 soc to conform with the upstream series
of the link bel

feat(stm32mp2-fdts): remove pins-are-numbered

Remove the deprecated property "pins-are-numbered" from pinctrl and
pinctrl_z nodes of stm32mp25 soc to conform with the upstream series
of the link below.

Link: https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=69786

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I1ed98c94c5003bc9903229957cb072da4211238f

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Merge changes from topic "st-bsec-otp" into integration

* changes:
feat(stm32mp2-fdts): add board ID OTP in STM32MP257F-EV1
feat(stm32mp2-fdts): add OTP nodes in STM32MP251 SoC DT file
fix(stm

Merge changes from topic "st-bsec-otp" into integration

* changes:
feat(stm32mp2-fdts): add board ID OTP in STM32MP257F-EV1
feat(stm32mp2-fdts): add OTP nodes in STM32MP251 SoC DT file
fix(stm32mp2): add missing include
feat(st): do not directly call BSEC functions in common code
feat(st): use stm32_get_otp_value_from_idx() in BL31
refactor(st): update test for closed chip
refactor(st-bsec): improve BSEC driver
refactor(st): use dashes for BSEC node names

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feat(stm32mp2-fdts): add OTP nodes in STM32MP251 SoC DT file

Add the BSEC node in STM32MP25 device tree file, with the OTP fuses
that will be used by TF-A.

Signed-off-by: Yann Gautier <yann.gautier

feat(stm32mp2-fdts): add OTP nodes in STM32MP251 SoC DT file

Add the BSEC node in STM32MP25 device tree file, with the OTP fuses
that will be used by TF-A.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I1ffdbd17829f4adf7b113ae0bec7547a6d1b4bac

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Merge "feat(st): update STM32MP DT files" into integration

feat(st): update STM32MP DT files

This is an alignment with Linux DT files that have been merged in
stm32 tree [1], and will be in Linux 6.7.
The /omit-if-no-ref/ in overlay files are now removed, a

feat(st): update STM32MP DT files

This is an alignment with Linux DT files that have been merged in
stm32 tree [1], and will be in Linux 6.7.
The /omit-if-no-ref/ in overlay files are now removed, as already in
pinctrl files.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Iab94b0ba7a4a0288ca53d1ae57ab590566967415

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Merge changes from topic "stm32mp2" into integration

* changes:
feat(stm32mp2): generate stm32 file
feat(stm32mp2-fdts): add stm32mp257f-ev1 board
feat(stm32mp2-fdts): introduce stm32mp25 pinc

Merge changes from topic "stm32mp2" into integration

* changes:
feat(stm32mp2): generate stm32 file
feat(stm32mp2-fdts): add stm32mp257f-ev1 board
feat(stm32mp2-fdts): introduce stm32mp25 pinctrl files
feat(stm32mp2-fdts): introduce stm32mp25 SoCs family
feat(stm32mp2): add console configuration
feat(st): add RCC registers list
feat(st-uart): add AARCH64 stm32_console driver
feat(st): introduce new platform STM32MP2
feat(dt-bindings): add the STM32MP2 clock and reset bindings
docs(changelog): add scopes for STM32MP2
feat(docs): introduce STM32MP2 doc
refactor(docs): add a sub-menu for ST platforms
refactor(st): move plat_image_load.c
refactor(st): rename PLAT_NB_FIXED_REGS
refactor(st): move some storage definitions to common part
refactor(st): move SDMMC definitions to driver
feat(st-clock): stub fdt_get_rcc_secure_state
feat(st-clock): allow aarch64 compilation of STGEN functions
feat(st): allow AARCH64 compilation for common code
refactor(st): rename QSPI macros

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feat(stm32mp2-fdts): introduce stm32mp25 SoCs family

STM32MP25 family is composed of 4 SoCs defined as following:

-STM32MP251: common part composed of 1*Cortex-A35, common peripherals
like SDMMC, U

feat(stm32mp2-fdts): introduce stm32mp25 SoCs family

STM32MP25 family is composed of 4 SoCs defined as following:

-STM32MP251: common part composed of 1*Cortex-A35, common peripherals
like SDMMC, UART, SPI, I2C, PCIe, USB3, parallel and DSI display,
1*ETH ...

-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH,
CAN-FD and LVDS display.

-STM32MP255: STM32MP253 + GPU/AI and video encode/decode.
-STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).

A second diversity layer exists for security features/ A35 frequency:
-STM32MP25xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.

Change-Id: Icd1351e20b862675d257dede55df190a90acbd59
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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