| #
e6a0994c |
| 23-Jan-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "st-bsec-otp" into integration
* changes:
feat(stm32mp2-fdts): add board ID OTP in STM32MP257F-EV1
feat(stm32mp2-fdts): add OTP nodes in STM32MP251 SoC DT file
fix(stm
Merge changes from topic "st-bsec-otp" into integration
* changes:
feat(stm32mp2-fdts): add board ID OTP in STM32MP257F-EV1
feat(stm32mp2-fdts): add OTP nodes in STM32MP251 SoC DT file
fix(stm32mp2): add missing include
feat(st): do not directly call BSEC functions in common code
feat(st): use stm32_get_otp_value_from_idx() in BL31
refactor(st): update test for closed chip
refactor(st-bsec): improve BSEC driver
refactor(st): use dashes for BSEC node names
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|
| #
b8816d3c |
| 04-Jan-2024 |
Yann Gautier <yann.gautier@st.com> |
refactor(st): use dashes for BSEC node names
This is something commonly asked by Linux kernel DT maintainers [1].
The mentioned doc is not upstreamed, but may be checked with dtbs_check.
While at it
refactor(st): use dashes for BSEC node names
This is something commonly asked by Linux kernel DT maintainers [1].
The mentioned doc is not upstreamed, but may be checked with dtbs_check.
While at it align some nodes with Linux or OP-TEE.
[1] https://lore.kernel.org/linux-arm-kernel/20231125184422.12315-1-krzysztof.kozlowski@linaro.org/
Change-Id: I63e983c2a00eda3cd8b81c66c0cd1a97cf8249b7
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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|
| #
c20b0c58 |
| 25-Oct-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(st): update STM32MP DT files" into integration
|
| #
4c8e8ea7 |
| 18-Oct-2023 |
Yann Gautier <yann.gautier@st.com> |
feat(st): update STM32MP DT files
This is an alignment with Linux DT files that have been merged in
stm32 tree [1], and will be in Linux 6.7.
The /omit-if-no-ref/ in overlay files are now removed, a
feat(st): update STM32MP DT files
This is an alignment with Linux DT files that have been merged in
stm32 tree [1], and will be in Linux 6.7.
The /omit-if-no-ref/ in overlay files are now removed, as already in
pinctrl files.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Iab94b0ba7a4a0288ca53d1ae57ab590566967415
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| #
28a8efd2 |
| 17-Jan-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "st_dt_update" into integration
* changes:
refactor(stm32mp15-fdts): remove unused PMIC nodes
fix(stm32mp15-fdts): use interrupts-extended for i2c2
style(stm32mp15-fdt
Merge changes from topic "st_dt_update" into integration
* changes:
refactor(stm32mp15-fdts): remove unused PMIC nodes
fix(stm32mp15-fdts): use interrupts-extended for i2c2
style(stm32mp15-fdts): remove extra spaces on vbus
show more ...
|
| #
600c8f7d |
| 21-Oct-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(stm32mp15-fdts): use interrupts-extended for i2c2
Update SoC DT file STM32MP151 to use interrupts-extended instead of
interrupts for i2c2. This correct a compilation warning:
build/stm32mp1/debu
fix(stm32mp15-fdts): use interrupts-extended for i2c2
Update SoC DT file STM32MP151 to use interrupts-extended instead of
interrupts for i2c2. This correct a compilation warning:
build/stm32mp1/debug/fdts/stm32mp157c-ev1-bl2.pre.dts:23.3-26:
Warning (interrupts_property): /soc/i2c@40013000:#interrupt-cells:
size is (28), expected multiple of 12
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: If512807cd23c72f95e1e02b15f30d20a849d8412
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| #
c3170fd8 |
| 14-Nov-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "stm32mp1-trusted-boot" into integration
* changes:
docs(st): update documentation for TRUSTED_BOARD_BOOT
fix(build): ensure that the correct rule is called for tools
Merge changes from topic "stm32mp1-trusted-boot" into integration
* changes:
docs(st): update documentation for TRUSTED_BOARD_BOOT
fix(build): ensure that the correct rule is called for tools
feat(stm32mp1): add the platform specific build for tools
fix(stm32mp13-fdts): remove secure status
feat(stm32mp1-fdts): add CoT and fuse references for authentication
feat(stm32mp1): add a check on TRUSTED_BOARD_BOOT with secure chip
feat(stm32mp1): add the decryption support
feat(stm32mp1): add the TRUSTED_BOARD_BOOT support
feat(stm32mp1): update ROM code API for header v2 management
feat(stm32mp1): remove unused function from boot API
refactor(stm32mp1): remove authentication using STM32 image mode
fix(fconf): fix type error displaying disable_auth
feat(tbbr): increase PK_DER_LEN size
fix(auth): correct sign-compare warning
feat(auth): allow to verify PublicKey with platform format PK
feat(cert-create): update for ECDSA brainpoolP256r/t1 support
feat(stm32mp1): add RNG initialization in BL2 for STM32MP13
feat(st-crypto): remove BL32 HASH driver usage
feat(stm32mp1): add a stm32mp crypto library
feat(st-crypto): add STM32 RNG driver
feat(st-crypto): add AES decrypt/auth by SAES IP
feat(st-crypto): add ECDSA signature check with PKA
feat(st-crypto): update HASH for new hardware version used in STM32MP13
show more ...
|
| #
928fa662 |
| 06-Oct-2022 |
Lionel Debieve <lionel.debieve@foss.st.com> |
feat(stm32mp1-fdts): add CoT and fuse references for authentication
Add the stm32mp1 CoT description file. Include the TRUSTED_BOARD_BOOT
entry in the platform device tree file.
Add the missing publ
feat(stm32mp1-fdts): add CoT and fuse references for authentication
Add the stm32mp1 CoT description file. Include the TRUSTED_BOARD_BOOT
entry in the platform device tree file.
Add the missing public root key reference for stm32mp15 and the
encryption key reference for stm32mp13.
Change-Id: I0ae2454979a3df6dd3e4361510317742e8fbc109
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
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|
| #
51d52c79 |
| 17-Aug-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "st-etzpc-cleanup" into integration
* changes:
refactor(stm32mp15-fdts): remove ETZPC status
refactor(st-drivers): do not rely on DT in etzpc_init
|
| #
33223c3a |
| 29-Mar-2022 |
Yann Gautier <yann.gautier@foss.st.com> |
refactor(stm32mp15-fdts): remove ETZPC status
The ETZPC is always secure, and the driver does no more rely on
secure-status (and status) DT property. Remove them from the SoC
DT file.
Signed-off-by
refactor(stm32mp15-fdts): remove ETZPC status
The ETZPC is always secure, and the driver does no more rely on
secure-status (and status) DT property. Remove them from the SoC
DT file.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I5f1d3534679553d79e6866396cd70e21a595ef6a
show more ...
|
| #
f341c10e |
| 11-Jul-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes Ie650728a,Ie2736ef4 into integration
* changes:
refactor(stm32mp1-fdts): add missing spaces for consistent codestyle
refactor(stm32mp1-fdts): drop unused DDR calibration result on
Merge changes Ie650728a,Ie2736ef4 into integration
* changes:
refactor(stm32mp1-fdts): add missing spaces for consistent codestyle
refactor(stm32mp1-fdts): drop unused DDR calibration result on DHCOM
show more ...
|
| #
119e1c42 |
| 08-Jul-2022 |
Johann Neuhauser <jneuhauser@dh-electronics.com> |
refactor(stm32mp1-fdts): add missing spaces for consistent codestyle
Change-Id: Ie650728a0c671f553679b050afd969ce604ca111
Signed-off-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
|
| #
60942bc9 |
| 07-Jun-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "st-pinctrl" into integration
* changes:
feat(stm32mp1-fdts): change pin-controller to pinctrl
feat(st): search pinctrl node by compatible
|
| #
44fea93b |
| 11-Mar-2022 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1-fdts): change pin-controller to pinctrl
Due to commit updating kernel yaml file [1], we need to align TF-A DT
files to what is done in kernel.
[1] c09acbc499e8 ("dt-bindings: pinctrl:
feat(stm32mp1-fdts): change pin-controller to pinctrl
Due to commit updating kernel yaml file [1], we need to align TF-A DT
files to what is done in kernel.
[1] c09acbc499e8 ("dt-bindings: pinctrl: use pinctrl.yaml")
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Id717162e42d3959339d6c01883e87a9d4399f5d9
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|
| #
dfc59a7b |
| 19-Apr-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "st_nvmem_layout" into integration
* changes:
refactor(stm32mp1-fdts): remove nvmem_layout node
refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node
refactor(st):
Merge changes from topic "st_nvmem_layout" into integration
* changes:
refactor(stm32mp1-fdts): remove nvmem_layout node
refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node
refactor(st): remove useless includes
show more ...
|
| #
578a4795 |
| 04-Mar-2022 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
refactor(stm32mp1-fdts): remove nvmem_layout node
Remove the nvmem_layout node with compatible "st,stm32-nvmem-layout"
no more used in TF-A code to simplify the device tree.
Signed-off-by: Patrick
refactor(stm32mp1-fdts): remove nvmem_layout node
Remove the nvmem_layout node with compatible "st,stm32-nvmem-layout"
no more used in TF-A code to simplify the device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I3748b20b7d3c60ee64ead15541fac1fd12656600
show more ...
|
| #
884a6506 |
| 31-Jan-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "st-nvmem" into integration
* changes:
feat(stm32mp1): manage monotonic counter
feat(stm32mp1): new way to access platform OTP
feat(stm32mp1-fdts): update NVMEM nodes
Merge changes from topic "st-nvmem" into integration
* changes:
feat(stm32mp1): manage monotonic counter
feat(stm32mp1): new way to access platform OTP
feat(stm32mp1-fdts): update NVMEM nodes
refactor(st-drivers): improve BSEC driver
feat(stm32mp1-fdts): add nvmem_layout node and OTP definitions
feat(stm32mp1): add NVMEM layout compatibility definition
show more ...
|
| #
ff8767cb |
| 25-Sep-2020 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
feat(stm32mp1-fdts): add nvmem_layout node and OTP definitions
A new nvmem_layout node includes nvmem platform-dependent layout
information, such as OTP NVMEM cell lists (phandle, name).
This list a
feat(stm32mp1-fdts): add nvmem_layout node and OTP definitions
A new nvmem_layout node includes nvmem platform-dependent layout
information, such as OTP NVMEM cell lists (phandle, name).
This list allows easy access to OTP offsets defined in BSEC node,
where more OTP definitions with offsets in bytes and length have
been added (replace hard-coded values).
Each board may redefine this list, especially for board_id info.
Change-Id: I910ae671b3bf3320ee6500fecc9ec335ae67bbda
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
show more ...
|
| #
dcb40592 |
| 05-Nov-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(fdts stm32mp1): correct copyright dates" into integration
|
| #
8d260291 |
| 02-Nov-2021 |
Yann Gautier <yann.gautier@st.com> |
fix(fdts stm32mp1): correct copyright dates
Add 2021 year in the file header Copyright line.
Change-Id: I09f7bef1f746c429ff308286169354e58648a1cd
Signed-off-by: Yann Gautier <yann.gautier@st.com>
|
| #
fea7f369 |
| 29-Oct-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "st_dt_update" into integration
* changes:
fix(fdts stm32mp1): update PLL nodes for ED1/EV1 boards
fix(fdts stm32mp1): set ETH clock on PLL4P on ST boards
feat(fdts st
Merge changes from topic "st_dt_update" into integration
* changes:
fix(fdts stm32mp1): update PLL nodes for ED1/EV1 boards
fix(fdts stm32mp1): set ETH clock on PLL4P on ST boards
feat(fdts stm32mp1): delete nodes for non-used boot devices
fix(fdts stm32mp1): use 'kHz' as kilohertz abbreviation
refactor(fdts stm32mp1): move STM32MP DDR node
feat(fdts stm32mp1): align DT with latest kernel
show more ...
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| #
8cafbda6 |
| 25-Feb-2021 |
Nicolas Le Bayon <nicolas.le.bayon@foss.st.com> |
refactor(fdts stm32mp1): move STM32MP DDR node
Move the generic part of DDR node in SOC dtsi file.
DDR dtsi files only include the part configured by CubeMX tool.
Signed-off-by: Patrick Delaunay <p
refactor(fdts stm32mp1): move STM32MP DDR node
Move the generic part of DDR node in SOC dtsi file.
DDR dtsi files only include the part configured by CubeMX tool.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>
Change-Id: I8c211e9782604da32aeaab98d0ef75fb1cd9c58d
show more ...
|
| #
e8a953a9 |
| 20-Oct-2021 |
Yann Gautier <yann.gautier@st.com> |
feat(fdts stm32mp1): align DT with latest kernel
Update STM32MP1 device tree files with kernel 5.15.
Change-Id: Id405a79e18c61e80cd2292a4f87b7b9641df9c82
Signed-off-by: Yann Gautier <yann.gautier@s
feat(fdts stm32mp1): align DT with latest kernel
Update STM32MP1 device tree files with kernel 5.15.
Change-Id: Id405a79e18c61e80cd2292a4f87b7b9641df9c82
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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|
| #
067cb3ae |
| 28-Apr-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I2c9aecc9,Ie6a019f4,Ief6f0a63,Iec9c80f2 into integration
* changes:
fdts: stm32mp1: add support for the Seeed Odyssey SoM and board
fdts: stm32mp1: add alternative SDMMC2 pins to t
Merge changes I2c9aecc9,Ie6a019f4,Ief6f0a63,Iec9c80f2 into integration
* changes:
fdts: stm32mp1: add support for the Seeed Odyssey SoM and board
fdts: stm32mp1: add alternative SDMMC2 pins to the pinctrl
fdts: stm32mp1: add I2C2 pins in the pinctrl
fdts: stm32mp1: add the I2C2 peripheral in the SoC DTS
show more ...
|
| #
3ef2208b |
| 21-Apr-2021 |
Grzegorz Szymaszek <gszymaszek@short.pl> |
fdts: stm32mp1: add the I2C2 peripheral in the SoC DTS
Some STM32MP1‐based boards, like Seeed Studio’s SoM‐STM32MP157C, have
the SoC connected to the PMIC via I2C2 instead of I2C4 (which is used on
fdts: stm32mp1: add the I2C2 peripheral in the SoC DTS
Some STM32MP1‐based boards, like Seeed Studio’s SoM‐STM32MP157C, have
the SoC connected to the PMIC via I2C2 instead of I2C4 (which is used on
the official ST development boards). This commit brings TF‑A one step
closer to boot on such boards.
Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Change-Id: Iec9c80f29ce95496e8f1b079b7a23f1914b74901
show more ...
|