History log of /rk3399_ARM-atf/fdts/stm32mp131.dtsi (Results 1 – 20 of 20)
Revision Date Author Comments
# e6a0994c 23-Jan-2024 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "st-bsec-otp" into integration

* changes:
feat(stm32mp2-fdts): add board ID OTP in STM32MP257F-EV1
feat(stm32mp2-fdts): add OTP nodes in STM32MP251 SoC DT file
fix(stm

Merge changes from topic "st-bsec-otp" into integration

* changes:
feat(stm32mp2-fdts): add board ID OTP in STM32MP257F-EV1
feat(stm32mp2-fdts): add OTP nodes in STM32MP251 SoC DT file
fix(stm32mp2): add missing include
feat(st): do not directly call BSEC functions in common code
feat(st): use stm32_get_otp_value_from_idx() in BL31
refactor(st): update test for closed chip
refactor(st-bsec): improve BSEC driver
refactor(st): use dashes for BSEC node names

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# b8816d3c 04-Jan-2024 Yann Gautier <yann.gautier@st.com>

refactor(st): use dashes for BSEC node names

This is something commonly asked by Linux kernel DT maintainers [1].
The mentioned doc is not upstreamed, but may be checked with dtbs_check.
While at it

refactor(st): use dashes for BSEC node names

This is something commonly asked by Linux kernel DT maintainers [1].
The mentioned doc is not upstreamed, but may be checked with dtbs_check.
While at it align some nodes with Linux or OP-TEE.

[1] https://lore.kernel.org/linux-arm-kernel/20231125184422.12315-1-krzysztof.kozlowski@linaro.org/

Change-Id: I63e983c2a00eda3cd8b81c66c0cd1a97cf8249b7
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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# c20b0c58 25-Oct-2023 Manish Pandey <manish.pandey2@arm.com>

Merge "feat(st): update STM32MP DT files" into integration


# 4c8e8ea7 18-Oct-2023 Yann Gautier <yann.gautier@st.com>

feat(st): update STM32MP DT files

This is an alignment with Linux DT files that have been merged in
stm32 tree [1], and will be in Linux 6.7.
The /omit-if-no-ref/ in overlay files are now removed, a

feat(st): update STM32MP DT files

This is an alignment with Linux DT files that have been merged in
stm32 tree [1], and will be in Linux 6.7.
The /omit-if-no-ref/ in overlay files are now removed, as already in
pinctrl files.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Iab94b0ba7a4a0288ca53d1ae57ab590566967415

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# 1d64109e 06-Jun-2023 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes from topic "st-fixes" into integration

* changes:
fix(spi-nand): add Quad Enable management
fix(st-clock): disabling CKPER clock is not functional on stm32mp13
fix(st-uart): skip

Merge changes from topic "st-fixes" into integration

* changes:
fix(spi-nand): add Quad Enable management
fix(st-clock): disabling CKPER clock is not functional on stm32mp13
fix(st-uart): skip console flush if UART is disabled
fix(st): flush UART at the end of uart_read()
fix(stm32mp1): use the BSEC nodes compatible for stm32mp13
fix(stm32mp13-fdts): correct the BSEC nodes compatible
fix(stm32mp1-fdts): move /omit-if-no-ref/ to overlay files
fix(stm32mp1): properly check PSCI functions return

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# 85c2ea8f 16-Feb-2022 Patrick Delaunay <patrick.delaunay@foss.st.com>

fix(stm32mp13-fdts): correct the BSEC nodes compatible

Device tree alignment with kernel and latest binding for BSEC node:
the rev2.0 is used on STM32MP13x devices with the new compatible
compatible

fix(stm32mp13-fdts): correct the BSEC nodes compatible

Device tree alignment with kernel and latest binding for BSEC node:
the rev2.0 is used on STM32MP13x devices with the new compatible
compatible = "st,stm32mp13-bsec".

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I62c4090ae5d5c1de901e6df1e8ea5d1a3296a272

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# c3170fd8 14-Nov-2022 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "stm32mp1-trusted-boot" into integration

* changes:
docs(st): update documentation for TRUSTED_BOARD_BOOT
fix(build): ensure that the correct rule is called for tools

Merge changes from topic "stm32mp1-trusted-boot" into integration

* changes:
docs(st): update documentation for TRUSTED_BOARD_BOOT
fix(build): ensure that the correct rule is called for tools
feat(stm32mp1): add the platform specific build for tools
fix(stm32mp13-fdts): remove secure status
feat(stm32mp1-fdts): add CoT and fuse references for authentication
feat(stm32mp1): add a check on TRUSTED_BOARD_BOOT with secure chip
feat(stm32mp1): add the decryption support
feat(stm32mp1): add the TRUSTED_BOARD_BOOT support
feat(stm32mp1): update ROM code API for header v2 management
feat(stm32mp1): remove unused function from boot API
refactor(stm32mp1): remove authentication using STM32 image mode
fix(fconf): fix type error displaying disable_auth
feat(tbbr): increase PK_DER_LEN size
fix(auth): correct sign-compare warning
feat(auth): allow to verify PublicKey with platform format PK
feat(cert-create): update for ECDSA brainpoolP256r/t1 support
feat(stm32mp1): add RNG initialization in BL2 for STM32MP13
feat(st-crypto): remove BL32 HASH driver usage
feat(stm32mp1): add a stm32mp crypto library
feat(st-crypto): add STM32 RNG driver
feat(st-crypto): add AES decrypt/auth by SAES IP
feat(st-crypto): add ECDSA signature check with PKA
feat(st-crypto): update HASH for new hardware version used in STM32MP13

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# 928fa662 06-Oct-2022 Lionel Debieve <lionel.debieve@foss.st.com>

feat(stm32mp1-fdts): add CoT and fuse references for authentication

Add the stm32mp1 CoT description file. Include the TRUSTED_BOARD_BOOT
entry in the platform device tree file.
Add the missing publ

feat(stm32mp1-fdts): add CoT and fuse references for authentication

Add the stm32mp1 CoT description file. Include the TRUSTED_BOARD_BOOT
entry in the platform device tree file.
Add the missing public root key reference for stm32mp15 and the
encryption key reference for stm32mp13.

Change-Id: I0ae2454979a3df6dd3e4361510317742e8fbc109
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>

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# 6c152355 19-Aug-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes from topic "stm32mp13-updates" into integration

* changes:
feat(stm32mp1): manage STM32MP13 rev.Y
feat(stm32mp13-fdts): use STM32MP_DDR_S_SIZE in fw-config
fix(stm32mp13-fdts): c

Merge changes from topic "stm32mp13-updates" into integration

* changes:
feat(stm32mp1): manage STM32MP13 rev.Y
feat(stm32mp13-fdts): use STM32MP_DDR_S_SIZE in fw-config
fix(stm32mp13-fdts): cleanup DT files
fix(stm32mp13-fdts): update SDMMC max frequency
fix(stm32mp13-fdts): align sdmmc pins with kernel

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# 4c07deb5 02-May-2022 Yann Gautier <yann.gautier@foss.st.com>

fix(stm32mp13-fdts): cleanup DT files

Instead of adding all peripheral nodes in SoC DT files, and then
removing them with BL2 overlay file, just remove them from SoC files.
And remove peripherals th

fix(stm32mp13-fdts): cleanup DT files

Instead of adding all peripheral nodes in SoC DT files, and then
removing them with BL2 overlay file, just remove them from SoC files.
And remove peripherals that are not used in TF-A on STM32MP13.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I0c408d29b55cb94644c92539460fc62485781223

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# c9a4cb55 02-May-2022 Yann Gautier <yann.gautier@foss.st.com>

fix(stm32mp13-fdts): update SDMMC max frequency

On STM32MP13, the max frequency for IOs is 130MHz, update the SDMMC
max-frequency property with this value. This is an alignment with
Linux DT file.

fix(stm32mp13-fdts): update SDMMC max frequency

On STM32MP13, the max frequency for IOs is 130MHz, update the SDMMC
max-frequency property with this value. This is an alignment with
Linux DT file.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: If4b364f53f87d4b5d276a976af486a3bf083f49b

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# f341c10e 11-Jul-2022 Manish Pandey <manish.pandey2@arm.com>

Merge changes Ie650728a,Ie2736ef4 into integration

* changes:
refactor(stm32mp1-fdts): add missing spaces for consistent codestyle
refactor(stm32mp1-fdts): drop unused DDR calibration result on

Merge changes Ie650728a,Ie2736ef4 into integration

* changes:
refactor(stm32mp1-fdts): add missing spaces for consistent codestyle
refactor(stm32mp1-fdts): drop unused DDR calibration result on DHCOM

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# 119e1c42 08-Jul-2022 Johann Neuhauser <jneuhauser@dh-electronics.com>

refactor(stm32mp1-fdts): add missing spaces for consistent codestyle

Change-Id: Ie650728a0c671f553679b050afd969ce604ca111
Signed-off-by: Johann Neuhauser <jneuhauser@dh-electronics.com>


# 60942bc9 07-Jun-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes from topic "st-pinctrl" into integration

* changes:
feat(stm32mp1-fdts): change pin-controller to pinctrl
feat(st): search pinctrl node by compatible


# 44fea93b 11-Mar-2022 Yann Gautier <yann.gautier@st.com>

feat(stm32mp1-fdts): change pin-controller to pinctrl

Due to commit updating kernel yaml file [1], we need to align TF-A DT
files to what is done in kernel.

[1] c09acbc499e8 ("dt-bindings: pinctrl:

feat(stm32mp1-fdts): change pin-controller to pinctrl

Due to commit updating kernel yaml file [1], we need to align TF-A DT
files to what is done in kernel.

[1] c09acbc499e8 ("dt-bindings: pinctrl: use pinctrl.yaml")

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Id717162e42d3959339d6c01883e87a9d4399f5d9

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# dfc59a7b 19-Apr-2022 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "st_nvmem_layout" into integration

* changes:
refactor(stm32mp1-fdts): remove nvmem_layout node
refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node
refactor(st):

Merge changes from topic "st_nvmem_layout" into integration

* changes:
refactor(stm32mp1-fdts): remove nvmem_layout node
refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node
refactor(st): remove useless includes

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# 578a4795 04-Mar-2022 Patrick Delaunay <patrick.delaunay@foss.st.com>

refactor(stm32mp1-fdts): remove nvmem_layout node

Remove the nvmem_layout node with compatible "st,stm32-nvmem-layout"
no more used in TF-A code to simplify the device tree.

Signed-off-by: Patrick

refactor(stm32mp1-fdts): remove nvmem_layout node

Remove the nvmem_layout node with compatible "st,stm32-nvmem-layout"
no more used in TF-A code to simplify the device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I3748b20b7d3c60ee64ead15541fac1fd12656600

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# 2ff6a49e 22-Mar-2022 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "stm32mp13" into integration

* changes:
feat(stm32mp1): select platform compilation either by flag or DT
feat(stm32mp1-fdts): add support for STM32MP13 DK board
feat(s

Merge changes from topic "stm32mp13" into integration

* changes:
feat(stm32mp1): select platform compilation either by flag or DT
feat(stm32mp1-fdts): add support for STM32MP13 DK board
feat(stm32mp1-fdts): add DDR support for STM32MP13
feat(stm32mp1-fdts): add st-io_policies node for STM32MP13
feat(stm32mp1): updates for STM32MP13 device tree compilation
feat(stm32mp1-fdts): add DT files for STM32MP13
feat(dt-bindings): add TZC400 bindings for STM32MP13
feat(stm32mp1): add "Boot mode" management for STM32MP13
feat(stm32mp1): manage HSLV on STM32MP13
feat(stm32mp1): add sdmmc compatible in platform define
feat(st-sdmmc2): allow compatible to be defined in platform code
feat(stm32mp1): update IO compensation on STM32MP13
feat(stm32mp1): call pmic_voltages_init() in platform init
feat(st-pmic): add pmic_voltages_init() function
feat(stm32mp1): update CFG0 OTP for STM32MP13
feat(stm32mp1): usb descriptor update for STM32MP13
feat(st-clock): add clock driver for STM32MP13
feat(dt-bindings): add bindings for STM32MP13
feat(stm32mp1): get CPU info from SYSCFG on STM32MP13
feat(stm32mp1): use only one filter for TZC400 on STM32MP13
feat(stm32mp1): add a second fixed regulator
feat(stm32mp1): adaptations for STM32MP13 image header
feat(stm32mp1): update boot API for header v2.0
feat(stm32mp1): update IP addresses for STM32MP13
feat(stm32mp1): add part numbers for STM32MP13
feat(stm32mp1): chip rev. Z is 0x1001 on STM32MP13
feat(stm32mp1): update BACKUP_BOOT_MODE for STM32MP13
feat(stm32mp1): stm32mp_is_single_core() for STM32MP13
feat(stm32mp1): remove unsupported features on STM32MP13
feat(stm32mp1): update memory mapping for STM32MP13
feat(stm32mp1): introduce new flag for STM32MP13
feat(st): update stm32image tool for header v2

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# e6fddbc9 12-Jan-2021 Nicolas Le Bayon <nicolas.le.bayon@st.com>

feat(stm32mp1-fdts): add DDR support for STM32MP13

Add dedicated device tree files for STM32MP13.
Add new DDR compatible for STM32MP13x.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.co

feat(stm32mp1-fdts): add DDR support for STM32MP13

Add dedicated device tree files for STM32MP13.
Add new DDR compatible for STM32MP13x.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: Ib1bb9ad8cb2ab9f5f81549635d6604093aeb99d3

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# 3b99ab6e 25-Feb-2020 Yann Gautier <yann.gautier@st.com>

feat(stm32mp1-fdts): add DT files for STM32MP13

STM32MP13 is a single Cortex-A7 CPU, without co-processor.
As for STM32MP15x SoC family, STM32MP15x SoCs come with different
features, depending on So

feat(stm32mp1-fdts): add DT files for STM32MP13

STM32MP13 is a single Cortex-A7 CPU, without co-processor.
As for STM32MP15x SoC family, STM32MP15x SoCs come with different
features, depending on SoC version. Each peripheral node is created.
Some are left empty for the moment , and will be filled later on.

Change-Id: I0166bb70dfa7f717e89e89883b059a5b873c4ef7
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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