Merge "fix(morello): fix the incorrect order of gpu interrupts in dt" into integration

fix(morello): fix the incorrect order of gpu interrupts in dt

Declare the GPU DT interrupts in the same order as defined
in the DT schema for arm,mali-bifrost.

Signed-off-by: Chandni Cherukuri <cha

fix(morello): fix the incorrect order of gpu interrupts in dt

Declare the GPU DT interrupts in the same order as defined
in the DT schema for arm,mali-bifrost.

Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
Change-Id: If3e72d33dcba4143900a5032688cf9340c717259

show more ...

Merge "feat(morello): add cpuidle support" into integration

feat(morello): add cpuidle support

This patch adds necessary device-tree idle state definitions and enables
relevant platform makefile options.

Co-authored-by: Karl Meakin <karl.meakin@arm.com>
Sig

feat(morello): add cpuidle support

This patch adds necessary device-tree idle state definitions and enables
relevant platform makefile options.

Co-authored-by: Karl Meakin <karl.meakin@arm.com>
Signed-off-by: sahil <sahil@arm.com>
Change-Id: Iaf95867095f0514ec3994b9c9efd9756ed49ef43

show more ...

Merge "feat(fdts/morello): add thermal framework" into integration

feat(fdts/morello): add thermal framework

Add thermal zones, cooling maps (passive cooling via DVFS),
trip points, etc. for Morello SoC.

Change-Id: I5bbc2999a5fd16ebbb3bb2f987eeb42f70961b98
Signed-

feat(fdts/morello): add thermal framework

Add thermal zones, cooling maps (passive cooling via DVFS),
trip points, etc. for Morello SoC.

Change-Id: I5bbc2999a5fd16ebbb3bb2f987eeb42f70961b98
Signed-off-by: Anurag Koul <anurag.koul@arm.com>

show more ...

Merge "feat(morello): add support for I2S audio" into integration

feat(morello): add support for I2S audio

Add support for Morello I2S audio subsystem. This includes adding the
audio formatter and I2S transmitter nodes and gluing them together with
the hdmi codec

feat(morello): add support for I2S audio

Add support for Morello I2S audio subsystem. This includes adding the
audio formatter and I2S transmitter nodes and gluing them together with
the hdmi codec using a simple sound card machine node.

Change-Id: I3de4b06ef965c8e0555d074118b944fe6b4b78bb
Signed-off-by: Anurag Koul <anurag.koul@arm.com>
Signed-off-by: Faiz Abbas <faiz.abbas@arm.com>

show more ...

Merge "feat(morello): fdts: add CoreSight DeviceTree bindings" into integration

feat(morello): fdts: add CoreSight DeviceTree bindings

Signed-off-by: Werner Lewis <werner.lewis@arm.com>
Change-Id: I6bc524aa9a4810e2c2df92df7fd13a27b0328766

Merge "feat(morello): add GPU DT node" into integration

feat(morello): add GPU DT node

Signed-off-by: Patrik Berglund <patrik.berglund@arm.com>
Change-Id: Ie82158aeaaf9e4bc68bc4bb91e3a9cc572b40d23

Merge changes from topic "morello-dt-fix" into integration

* changes:
fix(morello): dts: remove #a-c and #s-c from memory node
fix(morello): dts: fix GICv3 compatible string
fix(morello): dts:

Merge changes from topic "morello-dt-fix" into integration

* changes:
fix(morello): dts: remove #a-c and #s-c from memory node
fix(morello): dts: fix GICv3 compatible string
fix(morello): dts: fix DT node naming
fix(morello): dts: fix SCMI shmem/mboxes grouping
fix(morello): dts: use documented DPU compatible string
fix(morello): dts: fix DP SMMU IRQ ordering
fix(morello): dts: fix SMMU IRQ ordering
fix(morello): dts: add model names
fix(morello): dts: fix stdout-path target

show more ...

fix(morello): dts: remove #a-c and #s-c from memory node

The #address-cells and #size-cells properties affect the size of reg
properties in *child* nodes only, they have no effect on the current
nod

fix(morello): dts: remove #a-c and #s-c from memory node

The #address-cells and #size-cells properties affect the size of reg
properties in *child* nodes only, they have no effect on the current
node.

The /memory node has no children, hence there is no need to specify
those properties. dt-validate complains about this:
==========
morello-soc.dtb: /: memory@80000000: '#address-cells', '#size-cells' do
not match any of the regexes: 'pinctrl-[0-9]+'
From schema: dt-schema.git/dtschema/schemas/memory.yaml
==========

Remove the unneeded properties.

Change-Id: I35058a00fa9bfa1007f31a4c21898dd45c586aa8
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

show more ...

fix(morello): dts: fix DT node naming

The various official DT bindings only allow certain node name patterns.
Linux' "make dtbs_check" reports:
===========
.../morello-soc.dt.yaml: sram@45200000: 's

fix(morello): dts: fix DT node naming

The various official DT bindings only allow certain node name patterns.
Linux' "make dtbs_check" reports:
===========
.../morello-soc.dt.yaml: sram@45200000: 'scp-shmem@0', 'scp-shmem@80' do not match any of the regexes: '^([a-z0-9]*-)?sram(-section)?@[a-f0-9]+$', 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/sram/sram.yaml
.../morello-soc.dt.yaml: uart@2a400000: $nodename:0: 'uart@2a400000' does not match '^serial(@.*)?$'
From schema: Documentation/devicetree/bindings/serial/pl011.yaml
.../morello-soc.dt.yaml: interrupt-controller@2c010000: 'its@30040000', 'its@30060000', 'its@30080000', 'its@300a0000' do not match any of the regexes: '^(msi-controller|gic-its|interrupt-controller)@[0-9a-f]+$', '^gic-its@', '^interrupt-controller@[0-9a-f]+$', 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
===========

Rename the node names to improve bindings compliance.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: Ieff576512853eb2bf932c7a2b338c91e0c116b87

show more ...

fix(morello): dts: fix SCMI shmem/mboxes grouping

The official Arm MHU DT binding suggests to group the shmem (and mboxes)
values to signify the number of mailboxes supported.
Linux' "make dtbs_chec

fix(morello): dts: fix SCMI shmem/mboxes grouping

The official Arm MHU DT binding suggests to group the shmem (and mboxes)
values to signify the number of mailboxes supported.
Linux' "make dtbs_check" reports:
============
.../morello-soc.dt.yaml: scmi: shmem:0: [17, 18] is too long
From schema: dt-schema.git/dtschema/schemas/mbox/mbox-consumer.yaml
============

Add angle brackets at the right location to mark the boundaries between
the two mailbox instances used.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: If585c98b5e8e55cd5c0b1261e03ce4b91a4c0413

show more ...

fix(morello): dts: use documented DPU compatible string

The official Arm Komeda DPU DT binding only mentions the "arm,mali-d71"
string as a possible compatible string. The D32 version is just a
vari

fix(morello): dts: use documented DPU compatible string

The official Arm Komeda DPU DT binding only mentions the "arm,mali-d71"
string as a possible compatible string. The D32 version is just a
variant of the D71, and the revision can and will be auto-detected at
runtime.
Add the usual fallback compatible string scheme to contain a documented
compatible string.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: Ic1eade122b030dc983944b161eec175facf75357

show more ...

fix(morello): dts: fix DP SMMU IRQ ordering

The official SMMUv3 DT bindings require a certain order of the
interrupts, Linux' "make dtbs_check" reports:
============
.../morello-soc.dt.yaml: iommu@2

fix(morello): dts: fix DP SMMU IRQ ordering

The official SMMUv3 DT bindings require a certain order of the
interrupts, Linux' "make dtbs_check" reports:
============
.../morello-soc.dt.yaml: iommu@2ce00000: interrupt-names: 'oneOf' conditional failed, one must be fixed:
['eventq', 'cmdq-sync', 'gerror'] is too long
'combined' was expected
'gerror' was expected
'priq' was expected
'cmdq-sync' was expected
From schema: Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
============

Swap the order of the interrupts to improve bindings compliance.

Actually in this case the binding needs to be extended, since PRI is not
implemented in the SMMU in this case, so the PRI IRQ should be optional,
but we still want to describe the CMDQ sync IRQ. A patch for the binding
is pending.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: I3978f1c087136cd4c2e8f7fd4d1bba5b95f72726

show more ...

fix(morello): dts: fix SMMU IRQ ordering

The official SMMUv3 DT bindings require a certain order of the
interrupts, Linux' "make dtbs_check" reports:
============
.../morello-soc.dt.yaml: iommu@4f40

fix(morello): dts: fix SMMU IRQ ordering

The official SMMUv3 DT bindings require a certain order of the
interrupts, Linux' "make dtbs_check" reports:
============
.../morello-soc.dt.yaml: iommu@4f400000: interrupt-names: 'oneOf' conditional failed, one must be fixed:
['eventq', 'priq', 'cmdq-sync', 'gerror'] is too long
'combined' was expected
'gerror' was expected
'priq' was expected
'cmdq-sync' was expected
From schema: Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
============

Swap the order of the interrupt-names and their corresponding interrupts
values to improve bindings compliance.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: I2110b8509593a4f1aadff11bd518ec4a0f3f5d3c

show more ...

fix(morello): dts: add model names

The core root node DT bindings require every DT to have a "model"
property. Linux' "make dtbs_check" reports:
============
.../morello-soc.dt.yaml: /: 'model' is a

fix(morello): dts: add model names

The core root node DT bindings require every DT to have a "model"
property. Linux' "make dtbs_check" reports:
============
.../morello-soc.dt.yaml: /: 'model' is a required property
From schema: dt-schema.git/dtschema/schemas/root-node.yaml
============

Add a model name to both the SoC and FVP files to improve bindings
compliance.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: I64923edb947f8939dfa24c13a37996b1ba34ea54

show more ...

fix(morello): dts: fix stdout-path target

According to the DT spec, stdout-path must either start with the full
path to a node, or with an alias.
"soc_uart0" is neither of them, and consequently the

fix(morello): dts: fix stdout-path target

According to the DT spec, stdout-path must either start with the full
path to a node, or with an alias.
"soc_uart0" is neither of them, and consequently the Linux kernel
complains that it cannot find the root console device when just given
"earlycon" on the kernel command line:
===========
[ 0.000000] OF: fdt: earlycon: stdout-path soc_uart0 not found
===========

Use the already defined "serial0" alias to fix this and make "earlycon"
work in Linux.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: Ie0ddb1909160c930af3831246f0140363bc0b5db

show more ...

Merge changes from topic "morello_plat_support" into integration

* changes:
feat(morello): expose scmi protocols in fdts
fix(morello): change the AP runtime UART address
feat(morello): add sup

Merge changes from topic "morello_plat_support" into integration

* changes:
feat(morello): expose scmi protocols in fdts
fix(morello): change the AP runtime UART address
feat(morello): add support for nt_fw_config
feat(morello): split platform_info sds struct
feat(morello): add changes to enable TBBR boot
feat(morello): add DTS for Morello SoC platform
feat(morello): configure DMC-Bing mode
feat(morello): zero out the DDR memory space
feat(morello): add TARGET_PLATFORM flag
fix(morello): fix SoC reference clock frequency
fix(arm): use PLAT instead of TARGET_PLATFORM

show more ...

feat(morello): expose scmi protocols in fdts

Add 'firmware' node in morello-soc.dts to expose SCMI
support to the kernel. The SCMI protocols supported at
the moment are SCMI Base, Clock and Perf (DV

feat(morello): expose scmi protocols in fdts

Add 'firmware' node in morello-soc.dts to expose SCMI
support to the kernel. The SCMI protocols supported at
the moment are SCMI Base, Clock and Perf (DVFS).

The current mailbox memory region in MHU SRAM has an issue
with any access not aligned to a 4-byte boundary. So, the SCMI
mailbox memory region has been relocated to AP non-trusted
RAM to get around the problem.

Signed-off-by: Anurag Koul <anurag.koul@arm.com>
Change-Id: Ibcbce8823b751a0fc3be7e9bc3588c1dc47ae024

show more ...

feat(morello): add DTS for Morello SoC platform

Added Morello SoC specific DTS file.

Change-Id: I099e74ec95ed9e1b47f7d5a68b0dd1e251439e11
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
Signed-of

feat(morello): add DTS for Morello SoC platform

Added Morello SoC specific DTS file.

Change-Id: I099e74ec95ed9e1b47f7d5a68b0dd1e251439e11
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>

show more ...