Searched refs:PLAT_CSS_MHU_BASE (Results 1 – 16 of 16) sorted by relevance
| /rk3399_ARM-atf/drivers/arm/css/mhu/ |
| H A D | css_mhu.c | 47 while (mmio_read_32(PLAT_CSS_MHU_BASE + CPU_INTR_S_STAT) & in mhu_secure_message_start()
55 assert(!(mmio_read_32(PLAT_CSS_MHU_BASE + CPU_INTR_S_STAT) & in mhu_secure_message_send()
59 mmio_write_32(PLAT_CSS_MHU_BASE + CPU_INTR_S_SET, 1 << slot_id); in mhu_secure_message_send()
66 while (!(response = mmio_read_32(PLAT_CSS_MHU_BASE + SCP_INTR_S_STAT))) in mhu_secure_message_wait()
80 mmio_write_32(PLAT_CSS_MHU_BASE + SCP_INTR_S_CLEAR, 1 << slot_id); in mhu_secure_message_end()
94 assert(mmio_read_32(PLAT_CSS_MHU_BASE + CPU_INTR_S_STAT) == 0); in mhu_secure_init()
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| /rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/ |
| H A D | nrd_bl31_setup.c | 30 .db_reg_addr = PLAT_CSS_MHU_BASE + SENDER_REG_SET(0),
39 .db_reg_addr = PLAT_CSS_MHU_BASE
50 .db_reg_addr = PLAT_CSS_MHU_BASE +
61 .db_reg_addr = PLAT_CSS_MHU_BASE +
73 .db_reg_addr = PLAT_CSS_MHU_BASE + MHU_V3_SENDER_REG_SET(0),
82 .db_reg_addr = PLAT_CSS_MHU_BASE +
94 .db_reg_addr = PLAT_CSS_MHU_BASE +
106 .db_reg_addr = PLAT_CSS_MHU_BASE +
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| /rk3399_ARM-atf/plat/arm/board/automotive_rd/platform/rd1ae/ |
| H A D | rd1ae_bl31_setup.c | 13 .db_reg_addr = PLAT_CSS_MHU_BASE + MHU_V3_SENDER_REG_SET(0),
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| /rk3399_ARM-atf/plat/arm/board/juno/ |
| H A D | juno_topology.c | 17 .db_reg_addr = PLAT_CSS_MHU_BASE + CSS_SCMI_MHU_DB_REG_OFF,
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| /rk3399_ARM-atf/plat/arm/board/automotive_rd/platform/rdaspen/ |
| H A D | rdaspen_bl31_setup.c | 15 .db_reg_addr = PLAT_CSS_MHU_BASE + MHU_V3_SENDER_REG_SET(0),
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| /rk3399_ARM-atf/plat/arm/board/morello/ |
| H A D | morello_bl31_setup.c | 24 .db_reg_addr = PLAT_CSS_MHU_BASE + CSS_SCMI_MHU_DB_REG_OFF,
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| /rk3399_ARM-atf/plat/arm/board/morello/include/ |
| H A D | platform_def.h | 169 #define PLAT_CSS_MHU_BASE UL(0x45000000) macro
170 #define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE
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| /rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/nrd2/ |
| H A D | nrd_plat_arm_def2.h | 253 #define PLAT_CSS_MHU_BASE NRD_CSS_AP_SCP_S_MHU_BASE macro
254 #define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE
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| /rk3399_ARM-atf/plat/arm/board/tc/include/ |
| H A D | platform_def.h | 346 #define PLAT_CSS_MHU_BASE UL(0x46000000) macro
347 #define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE
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| /rk3399_ARM-atf/plat/arm/board/n1sdp/ |
| H A D | n1sdp_bl31_setup.c | 42 .db_reg_addr = PLAT_CSS_MHU_BASE + CSS_SCMI_MHU_DB_REG_OFF,
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| /rk3399_ARM-atf/plat/arm/board/automotive_rd/platform/rd1ae/include/ |
| H A D | platform_def.h | 45 #define PLAT_CSS_MHU_BASE UL(0x2A920000) macro
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| /rk3399_ARM-atf/plat/arm/board/tc/ |
| H A D | tc_bl31_setup.c | 60 .db_reg_addr = PLAT_CSS_MHU_BASE + MHU_V3_SENDER_REG_SET(0),
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| /rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/nrd3/ |
| H A D | nrd_plat_arm_def3.h | 213 #define PLAT_CSS_MHU_BASE NRD_CSS_AP_SCP_SECURE_MHU_BASE macro
214 #define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE
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| /rk3399_ARM-atf/plat/arm/board/automotive_rd/platform/rdaspen/include/ |
| H A D | platform_def.h | 106 #define PLAT_CSS_MHU_BASE UL(0x400A0000)
104 #define PLAT_CSS_MHU_BASE global() macro
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| /rk3399_ARM-atf/plat/arm/board/n1sdp/include/ |
| H A D | platform_def.h | 191 #define PLAT_CSS_MHU_BASE 0x45000000 macro
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| /rk3399_ARM-atf/plat/arm/board/juno/include/ |
| H A D | platform_def.h | 320 #define PLAT_CSS_MHU_BASE UL(0x2b1f0000) macro
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