1dfd5bfb0SChandni Cherukuri /*
2*1d59d686SBoyan Karatotev * Copyright (c) 2020-2025, Arm Limited. All rights reserved.
3dfd5bfb0SChandni Cherukuri *
4dfd5bfb0SChandni Cherukuri * SPDX-License-Identifier: BSD-3-Clause
5dfd5bfb0SChandni Cherukuri */
6dfd5bfb0SChandni Cherukuri
7dfd5bfb0SChandni Cherukuri #include <drivers/arm/css/css_mhu_doorbell.h>
8dfd5bfb0SChandni Cherukuri #include <drivers/arm/css/scmi.h>
9cc266bcdSChandni Cherukuri #include <drivers/arm/css/sds.h>
10cc266bcdSChandni Cherukuri #include <lib/smccc.h>
11dfd5bfb0SChandni Cherukuri #include <plat/arm/common/plat_arm.h>
12cc266bcdSChandni Cherukuri #include <services/arm_arch_svc.h>
13dfd5bfb0SChandni Cherukuri
14dfd5bfb0SChandni Cherukuri #include "morello_def.h"
1502a5bcb0SWerner Lewis #include "morello_private.h"
16dfd5bfb0SChandni Cherukuri #include <platform_def.h>
17dfd5bfb0SChandni Cherukuri
18468a6016SWerner Lewis #ifdef TARGET_PLATFORM_SOC
19cc266bcdSChandni Cherukuri struct morello_plat_info plat_info;
20cc266bcdSChandni Cherukuri #endif
21cc266bcdSChandni Cherukuri
22dfd5bfb0SChandni Cherukuri static scmi_channel_plat_info_t morello_scmi_plat_info = {
23dfd5bfb0SChandni Cherukuri .scmi_mbx_mem = MORELLO_SCMI_PAYLOAD_BASE,
24dfd5bfb0SChandni Cherukuri .db_reg_addr = PLAT_CSS_MHU_BASE + CSS_SCMI_MHU_DB_REG_OFF,
25dfd5bfb0SChandni Cherukuri .db_preserve_mask = 0xfffffffe,
26dfd5bfb0SChandni Cherukuri .db_modify_mask = 0x1,
27dfd5bfb0SChandni Cherukuri .ring_doorbell = &mhu_ring_doorbell
28dfd5bfb0SChandni Cherukuri };
29dfd5bfb0SChandni Cherukuri
plat_css_get_scmi_info(unsigned int channel_id)30f0f2c903STony K Nadackal scmi_channel_plat_info_t *plat_css_get_scmi_info(unsigned int channel_id)
31dfd5bfb0SChandni Cherukuri {
32dfd5bfb0SChandni Cherukuri return &morello_scmi_plat_info;
33dfd5bfb0SChandni Cherukuri }
34dfd5bfb0SChandni Cherukuri
plat_arm_psci_override_pm_ops(plat_psci_ops_t * ops)35dfd5bfb0SChandni Cherukuri const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops)
36dfd5bfb0SChandni Cherukuri {
3702a5bcb0SWerner Lewis ops->pwr_domain_off = morello_pwr_domain_off;
38dfd5bfb0SChandni Cherukuri return css_scmi_override_pm_ops(ops);
39dfd5bfb0SChandni Cherukuri }
40dfd5bfb0SChandni Cherukuri
bl31_platform_setup(void)41dfd5bfb0SChandni Cherukuri void bl31_platform_setup(void)
42dfd5bfb0SChandni Cherukuri {
43cc266bcdSChandni Cherukuri #ifdef TARGET_PLATFORM_SOC
44cc266bcdSChandni Cherukuri int ret;
45cc266bcdSChandni Cherukuri
4648d42ed5STamas Ban ret = sds_init(SDS_SCP_AP_REGION_ID);
47cc266bcdSChandni Cherukuri if (ret != SDS_OK) {
48cc266bcdSChandni Cherukuri ERROR("SDS initialization failed. ret:%d\n", ret);
49cc266bcdSChandni Cherukuri panic();
50cc266bcdSChandni Cherukuri }
51cc266bcdSChandni Cherukuri
5248d42ed5STamas Ban ret = sds_struct_read(SDS_SCP_AP_REGION_ID,
5348d42ed5STamas Ban MORELLO_SDS_PLATFORM_INFO_STRUCT_ID,
54cc266bcdSChandni Cherukuri MORELLO_SDS_PLATFORM_INFO_OFFSET,
55cc266bcdSChandni Cherukuri &plat_info,
56cc266bcdSChandni Cherukuri MORELLO_SDS_PLATFORM_INFO_SIZE,
57cc266bcdSChandni Cherukuri SDS_ACCESS_MODE_NON_CACHED);
58cc266bcdSChandni Cherukuri if (ret != SDS_OK) {
59cc266bcdSChandni Cherukuri ERROR("Error getting platform info from SDS. ret:%d\n", ret);
60cc266bcdSChandni Cherukuri panic();
61cc266bcdSChandni Cherukuri }
62cc266bcdSChandni Cherukuri #endif
63dfd5bfb0SChandni Cherukuri arm_bl31_platform_setup();
64*1d59d686SBoyan Karatotev
65*1d59d686SBoyan Karatotev gic_set_gicr_frames(arm_gicr_base_addrs);
66dfd5bfb0SChandni Cherukuri }
67cc266bcdSChandni Cherukuri
68cc266bcdSChandni Cherukuri #ifdef TARGET_PLATFORM_SOC
69cc266bcdSChandni Cherukuri /*****************************************************************************
70cc266bcdSChandni Cherukuri * plat_is_smccc_feature_available() - This function checks whether SMCCC
71cc266bcdSChandni Cherukuri * feature is availabile for platform.
72cc266bcdSChandni Cherukuri * @fid: SMCCC function id
73cc266bcdSChandni Cherukuri *
74cc266bcdSChandni Cherukuri * Return SMC_ARCH_CALL_SUCCESS if SMCCC feature is available and
75cc266bcdSChandni Cherukuri * SMC_ARCH_CALL_NOT_SUPPORTED otherwise.
76cc266bcdSChandni Cherukuri *****************************************************************************/
plat_is_smccc_feature_available(u_register_t fid)77cc266bcdSChandni Cherukuri int32_t plat_is_smccc_feature_available(u_register_t fid)
78cc266bcdSChandni Cherukuri {
79cc266bcdSChandni Cherukuri switch (fid) {
80cc266bcdSChandni Cherukuri case SMCCC_ARCH_SOC_ID:
81cc266bcdSChandni Cherukuri return SMC_ARCH_CALL_SUCCESS;
82cc266bcdSChandni Cherukuri default:
83cc266bcdSChandni Cherukuri return SMC_ARCH_CALL_NOT_SUPPORTED;
84cc266bcdSChandni Cherukuri }
85cc266bcdSChandni Cherukuri }
86cc266bcdSChandni Cherukuri
87cc266bcdSChandni Cherukuri /* Get SOC version */
plat_get_soc_version(void)88cc266bcdSChandni Cherukuri int32_t plat_get_soc_version(void)
89cc266bcdSChandni Cherukuri {
90cc266bcdSChandni Cherukuri int ssc_version;
91cc266bcdSChandni Cherukuri
92cc266bcdSChandni Cherukuri ssc_version = mmio_read_32(SSC_VERSION);
93cc266bcdSChandni Cherukuri
94cc266bcdSChandni Cherukuri return (int32_t)
95cc266bcdSChandni Cherukuri (SOC_ID_SET_JEP_106(ARM_SOC_CONTINUATION_CODE,
96cc266bcdSChandni Cherukuri ARM_SOC_IDENTIFICATION_CODE) |
97cc266bcdSChandni Cherukuri (GET_SSC_VERSION_PART_NUM(ssc_version) & SOC_ID_IMPL_DEF_MASK));
98cc266bcdSChandni Cherukuri }
99cc266bcdSChandni Cherukuri
100cc266bcdSChandni Cherukuri /* Get SOC revision */
plat_get_soc_revision(void)101cc266bcdSChandni Cherukuri int32_t plat_get_soc_revision(void)
102cc266bcdSChandni Cherukuri {
103cc266bcdSChandni Cherukuri return (int32_t)plat_info.silicon_revision;
104cc266bcdSChandni Cherukuri }
105cc266bcdSChandni Cherukuri #endif
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