| #
e8460bd9 |
| 02-Oct-2025 |
Mark Dykes <mark.dykes@arm.com> |
Merge "fix(arm): don't override the gic redistributor frames" into integration
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| #
1d59d686 |
| 25-Sep-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
fix(arm): don't override the gic redistributor frames
Patch 75170704c made an oversight - it would provide a default value for the gicr_frames variable but would always set to it, regardless of whet
fix(arm): don't override the gic redistributor frames
Patch 75170704c made an oversight - it would provide a default value for the gicr_frames variable but would always set to it, regardless of whether the platform might want to use something different. The thinking was to provide a default and then let each platform override it, however the order was swapped.
To fix this, put the gic_set_gicr_frames() in bl31_platform_setup() rather than arm_bl31_platform_setup(). This way, platforms that use the default can still enjoy it automatically pulled in from common code, platforms that need fully custom gicr_frames can simply set it, and platforms that override bl31_platform_setup() for unrelated reasons only have to redo the call to gic_set_gicr_frames(). This has a tiny benefit over the old approach in that there will never be 2 gicr_frames arrays.
Change-Id: I734737d3bd37ddbb3286abcdd92c88676c68cdc3 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| #
2b6ae948 |
| 23-Sep-2025 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "refactor(tc): neaten platform code after TC2 removal" into integration
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| #
8de6021b |
| 22-Sep-2025 |
Ryan Everett <ryan.everett@arm.com> |
refactor(tc): neaten platform code after TC2 removal
Now that TC2 has been removed, the only TC platforms are TC3 and TC4. Therefore, it no longer makes sense to have both tc-base and tc3-4-base dts
refactor(tc): neaten platform code after TC2 removal
Now that TC2 has been removed, the only TC platforms are TC3 and TC4. Therefore, it no longer makes sense to have both tc-base and tc3-4-base dtsi files. This patch combines the two base TC dtsi files, and removes tautological ifdefs in TC platform code.
Change-Id: I011b5fe1f645d6d53276007b11a17bd6cf952ecb Signed-off-by: Ryan Everett <ryan.everett@arm.com>
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| #
9e7679ed |
| 23-Jun-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "feat(tc): add support for configuring DSU settings" into integration
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| #
fd4e6026 |
| 14-May-2025 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
feat(tc): add support for configuring DSU settings
This patch allows tc platforms to update DSU CLUSTERPWRDN_EL1 and CLUSTERPWRCTLR_EL1 settings. TC22 and TC23 use the DSU-120. Currently we use the
feat(tc): add support for configuring DSU settings
This patch allows tc platforms to update DSU CLUSTERPWRDN_EL1 and CLUSTERPWRCTLR_EL1 settings. TC22 and TC23 use the DSU-120. Currently we use the reset values as default settings as per the DSU-120 TRM.
Reference: https://developer.arm.com/documentation/102547/0201
Change-Id: I48e0b5bd5881612e9b8b804948260f69c25c34d9 Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
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| #
c76da4ec |
| 25-Apr-2025 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "chore(tc): remove TC2 platform variant" into integration
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| #
f036ddaf |
| 09-Apr-2025 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
chore(tc): remove TC2 platform variant
Remove TC2 platform support which was deprecated in the last release.
Change-Id: Ibf4a94a0168151ebc66eaca044a143c51e974a1f Signed-off-by: Manish V Badarkhe <M
chore(tc): remove TC2 platform variant
Remove TC2 platform support which was deprecated in the last release.
Change-Id: Ibf4a94a0168151ebc66eaca044a143c51e974a1f Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| #
29de2aa4 |
| 03-Apr-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge changes from topic "jc/tc_fw_handoff" into integration
* changes: feat(tc): port BL31-BL33 interface to firmware handoff framework feat(tc): port BL2-BL31 interface to firmware handoff fra
Merge changes from topic "jc/tc_fw_handoff" into integration
* changes: feat(tc): port BL31-BL33 interface to firmware handoff framework feat(tc): port BL2-BL31 interface to firmware handoff framework feat(tc): port BL1-BL2 interface to firmware handoff framework
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| #
25a6bcd5 |
| 01-Mar-2025 |
Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
feat(tc): port BL31-BL33 interface to firmware handoff framework
Adding support for this framework at the handoff boundary between firmware stage BL31 and BL33 on TC.
Signed-off-by: Jayanth Dodderi
feat(tc): port BL31-BL33 interface to firmware handoff framework
Adding support for this framework at the handoff boundary between firmware stage BL31 and BL33 on TC.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Change-Id: Ia6cd29c8b6cdda0a127a3bac02f6fa1dcfc07151
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| #
c997a8de |
| 31-Mar-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge changes from topic "jc/tc_fw_handoff" into integration
* changes: refactor(arm): simplify early platform setup function in BL31 refactor(arm): simplify early platform setup function in BL2
Merge changes from topic "jc/tc_fw_handoff" into integration
* changes: refactor(arm): simplify early platform setup function in BL31 refactor(arm): simplify early platform setup function in BL2 feat(arm): add support for Transfer List creation
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| #
b6e6e2e6 |
| 20-Mar-2025 |
Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
refactor(arm): simplify early platform setup function in BL31
Refactor `arm_bl31_early_platform_setup` to accept generic u_register_t values, enabling support for firmware handoff boot arguments in
refactor(arm): simplify early platform setup function in BL31
Refactor `arm_bl31_early_platform_setup` to accept generic u_register_t values, enabling support for firmware handoff boot arguments in common code. This simplifies the interface for early platform setup.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Change-Id: Iff20300d2372e1a9825827ddccbd1b3bc6751e40
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| #
2e0354f5 |
| 25-Feb-2025 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes I3d950e72,Id315a8fe,Ib62e6e9b,I1d0475b2 into integration
* changes: perf(cm): drop ZCR_EL3 saving and some ISBs and replace them with root context perf(psci): get PMF timestamps wi
Merge changes I3d950e72,Id315a8fe,Ib62e6e9b,I1d0475b2 into integration
* changes: perf(cm): drop ZCR_EL3 saving and some ISBs and replace them with root context perf(psci): get PMF timestamps with no cache flushes if possible perf(amu): greatly simplify AMU context management perf(mpmm): greatly simplify MPMM enablement
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| #
83ec7e45 |
| 06-Nov-2024 |
Boyan Karatotev <boyan.karatotev@arm.com> |
perf(amu): greatly simplify AMU context management
The current code is incredibly resilient to updates to the spec and has worked quite well so far. However, recent implementations expose a weakness
perf(amu): greatly simplify AMU context management
The current code is incredibly resilient to updates to the spec and has worked quite well so far. However, recent implementations expose a weakness in that this is rather slow. A large part of it is written in assembly, making it opaque to the compiler for optimisations. The future proofness requires reading registers that are effectively `volatile`, making it even harder for the compiler, as well as adding lots of implicit barriers, making it hard for the microarchitecutre to optimise as well.
We can make a few assumptions, checked by a few well placed asserts, and remove a lot of this burden. For a start, at the moment there are 4 group 0 counters with static assignments. Contexting them is a trivial affair that doesn't need a loop. Similarly, there can only be up to 16 group 1 counters. Contexting them is a bit harder, but we can do with a single branch with a falling through switch. If/when both of these change, we have a pair of asserts and the feature detection mechanism to guard us against pretending that we support something we don't.
We can drop contexting of the offset registers. They are fully accessible by EL2 and as such are its responsibility to preserve on powerdown.
Another small thing we can do, is pass the core_pos into the hook. The caller already knows which core we're running on, we don't need to call this non-trivial function again.
Finally, knowing this, we don't really need the auxiliary AMUs to be described by the device tree. Linux doesn't care at the moment, and any information we need for EL3 can be neatly placed in a simple array.
All of this, combined with lifting the actual saving out of assembly, reduces the instructions to save the context from 180 to 40, including a lot fewer branches. The code is also much shorter and easier to read.
Also propagate to aarch32 so that the two don't diverge too much.
Change-Id: Ib62e6e9ba5be7fb9fb8965c8eee148d5598a5361 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| #
e0be63c8 |
| 13-Feb-2025 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes I712712d7,I1932500e,I75dda77e,I12f3b8a3,Ia72e5900 into integration
* changes: refactor(rse)!: remove rse_comms_init refactor(arm): switch to rse_mbx_init refactor(rse): put MHU c
Merge changes I712712d7,I1932500e,I75dda77e,I12f3b8a3,Ia72e5900 into integration
* changes: refactor(rse)!: remove rse_comms_init refactor(arm): switch to rse_mbx_init refactor(rse): put MHU code in a dedicated file refactor(tc): add plat_rse_comms_init refactor(arm)!: rename PLAT_MHU_VERSION flag
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| #
5b46aacc |
| 04-Oct-2024 |
Yann Gautier <yann.gautier@st.com> |
refactor(tc): add plat_rse_comms_init
The same way it is done for neoverse_rd, create a plat_rse_comms_init() function to call rse_comms_init().
Signed-off-by: Yann Gautier <yann.gautier@st.com> Ch
refactor(tc): add plat_rse_comms_init
The same way it is done for neoverse_rd, create a plat_rse_comms_init() function to call rse_comms_init().
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I12f3b8a38a5369decb4b97f8aceeb0dc81cbea28
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| #
697290a9 |
| 04-Feb-2025 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "us_tc_trng" into integration
* changes: feat(tc): get entropy with PSA Crypto API feat(psa): add interface with RSE for retrieving entropy fix(psa): guard Crypto APIs
Merge changes from topic "us_tc_trng" into integration
* changes: feat(tc): get entropy with PSA Crypto API feat(psa): add interface with RSE for retrieving entropy fix(psa): guard Crypto APIs with CRYPTO_SUPPORT feat(tc): enable trng feat(tc): initialize the RSE communication in earlier phase
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| #
a3f96179 |
| 31-May-2024 |
Leo Yan <leo.yan@arm.com> |
feat(tc): initialize the RSE communication in earlier phase
Move the RSE MHU channel initialization to the platform setup phase, this allows the services (e.g. TRNG service) to talk to RSE during th
feat(tc): initialize the RSE communication in earlier phase
Move the RSE MHU channel initialization to the platform setup phase, this allows the services (e.g. TRNG service) to talk to RSE during the service init function.
Change-Id: Id0ff6e49117008463f11b2dc3c585daca00f609c Signed-off-by: Leo Yan <leo.yan@arm.com> Signed-off-by: Icen Zeyada <Icen.Zeyada2@arm.com>
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| #
8a7a54b4 |
| 19-Dec-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "mcn" into integration
* changes: feat(tc): add MCN PMU nodes in dts for TC4 feat(tc): add 'kaslr-seed' node in device tree for TC3 feat(tc): enable MCN non-secure acc
Merge changes from topic "mcn" into integration
* changes: feat(tc): add MCN PMU nodes in dts for TC4 feat(tc): add 'kaslr-seed' node in device tree for TC3 feat(tc): enable MCN non-secure access to pmu counters on TC4 feat(tc): define MCN related macros for TC4
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| #
d1062c47 |
| 19-Jun-2024 |
Jagdish Gediya <jagdish.gediya@arm.com> |
feat(tc): enable MCN non-secure access to pmu counters on TC4
MCN PMU counters are by default non-accesible from non-secure world, so enable the non-secure access to those PMU counters so that linux
feat(tc): enable MCN non-secure access to pmu counters on TC4
MCN PMU counters are by default non-accesible from non-secure world, so enable the non-secure access to those PMU counters so that linux perf driver can read them.
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com> Signed-off-by: Icen Zeyada <Icen.Zeyada2@arm.com> Change-Id: I1cf1f88f97e9062592fd5603a78fd36f15a15f89
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| #
8f61c204 |
| 19-Jun-2024 |
Jagdish Gediya <jagdish.gediya@arm.com> |
feat(tc): define MCN related macros for TC4
Define MCN related macros for TC4 to add TC4 specific MCN PMU nodes in dts and to enable MCN PMU NS access in further commits.
Signed-off-by: Jagdish Ged
feat(tc): define MCN related macros for TC4
Define MCN related macros for TC4 to add TC4 specific MCN PMU nodes in dts and to enable MCN PMU NS access in further commits.
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com> Signed-off-by: Icen Zeyada <Icen.Zeyada2@arm.com> Change-Id: Ifc02fcd833888a9953fac404585468316aa0168c
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| #
8f3e82ac |
| 18-Dec-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "fix(tc): define status to fix SPM tests" into integration
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| #
8d4d1909 |
| 17-Dec-2024 |
Icen.Zeyada <Icen.Zeyada2@arm.com> |
fix(tc): define status to fix SPM tests
The failure was caused by missing a variable definition, `status` in the RSE initialisation patch.
Change-Id: I937a39e20fae39f3a6d14fe66af578c166545301 Signe
fix(tc): define status to fix SPM tests
The failure was caused by missing a variable definition, `status` in the RSE initialisation patch.
Change-Id: I937a39e20fae39f3a6d14fe66af578c166545301 Signed-off-by: Icen.Zeyada <Icen.Zeyada2@arm.com>
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| #
3c72b2ab |
| 16-Dec-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "fix(tc): eliminate unneeded MbedTLS dependency" into integration
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| #
22220e69 |
| 15-Dec-2024 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
fix(tc): eliminate unneeded MbedTLS dependency
The rse_platform_api.h file includes certain MbedTLS headers, introducing an unnecessary dependency when building the TC platform with RSE support unco
fix(tc): eliminate unneeded MbedTLS dependency
The rse_platform_api.h file includes certain MbedTLS headers, introducing an unnecessary dependency when building the TC platform with RSE support unconditionally. However, these headers are not required, as the BL31 implementation only initializes RSE communication, which does not rely on MbedTLS.
Change-Id: If45122aaf158be128f8978422fd870dbb0a0d090 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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