| #
e8460bd9 |
| 02-Oct-2025 |
Mark Dykes <mark.dykes@arm.com> |
Merge "fix(arm): don't override the gic redistributor frames" into integration
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| #
1d59d686 |
| 25-Sep-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
fix(arm): don't override the gic redistributor frames
Patch 75170704c made an oversight - it would provide a default value for the gicr_frames variable but would always set to it, regardless of whet
fix(arm): don't override the gic redistributor frames
Patch 75170704c made an oversight - it would provide a default value for the gicr_frames variable but would always set to it, regardless of whether the platform might want to use something different. The thinking was to provide a default and then let each platform override it, however the order was swapped.
To fix this, put the gic_set_gicr_frames() in bl31_platform_setup() rather than arm_bl31_platform_setup(). This way, platforms that use the default can still enjoy it automatically pulled in from common code, platforms that need fully custom gicr_frames can simply set it, and platforms that override bl31_platform_setup() for unrelated reasons only have to redo the call to gic_set_gicr_frames(). This has a tiny benefit over the old approach in that there will never be 2 gicr_frames arrays.
Change-Id: I734737d3bd37ddbb3286abcdd92c88676c68cdc3 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| #
514d022f |
| 14-Feb-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "DPE" into integration
* changes: feat(tc): add RSS SDS region right after SCMI payload refactor(n1sdp): update SDS driver calls refactor(morello): update SDS driver c
Merge changes from topic "DPE" into integration
* changes: feat(tc): add RSS SDS region right after SCMI payload refactor(n1sdp): update SDS driver calls refactor(morello): update SDS driver calls refactor(juno): update SDS driver calls refactor(sgi): update SDS driver calls refactor(css): support multiple SDS regions
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| #
48d42ed5 |
| 08-May-2023 |
Tamas Ban <tamas.ban@arm.com> |
refactor(morello): update SDS driver calls
Update SDS driver calls to align with recent changes [1] of the SDS driver.
- The driver now requires us to explicitly pass the SDS region id to act on.
refactor(morello): update SDS driver calls
Update SDS driver calls to align with recent changes [1] of the SDS driver.
- The driver now requires us to explicitly pass the SDS region id to act on. - Implement plat_sds_get_regions() platform function which is used by the driver to get SDS region information per platform.
[1]: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/24609/
Change-Id: I942599edb4d9734c0455f67c6b5673aace62e444 Signed-off-by: Tamas Ban <tamas.ban@arm.com> Signed-off-by: David Vincze <david.vincze@arm.com>
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| #
666aec40 |
| 19-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I0a307cc1,Ic2ad5a56 into integration
* changes: fix(morello): remove platform specific pwr_domain_suspend wrapper fix(n1sdp): remove platform specific pwr_domain_suspend wrapper
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d5ca76fc |
| 19-May-2023 |
sahil <sahil@arm.com> |
fix(morello): remove platform specific pwr_domain_suspend wrapper
Turning redistributor off during suspend disables any wakeup interrupts resulting in cpu getting stuck. This patch removes the platf
fix(morello): remove platform specific pwr_domain_suspend wrapper
Turning redistributor off during suspend disables any wakeup interrupts resulting in cpu getting stuck. This patch removes the platform specific psci pwr_domain_suspend handler.
Signed-off-by: sahil <sahil@arm.com> Change-Id: I0a307cc140447e91fd0808fcfb309593f24c14ca
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5bfdb732 |
| 11-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(morello): add platform-specific power domain functions" into integration
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02a5bcb0 |
| 15-Feb-2023 |
Werner Lewis <werner.lewis@arm.com> |
fix(morello): add platform-specific power domain functions
Commit 4d8c18196378824e388cf31ef991ba8fbbb09cbf added a redistributor power off to resolve an error on N1SDP/Morello. Prior to this fix, tu
fix(morello): add platform-specific power domain functions
Commit 4d8c18196378824e388cf31ef991ba8fbbb09cbf added a redistributor power off to resolve an error on N1SDP/Morello. Prior to this fix, turning off both cores in a cluster would cause a hang when powering back on either core. This change introduced issues on other platforms with a different GIC implementation, and was reverted in commit 60719e4e0965aead49d927f12bf2a37bd2629012.
This commit uses the previous fix in platform-specific implementations of power domain off/suspend functions.
Signed-off-by: Werner Lewis <werner.lewis@arm.com> Change-Id: Ib7689a5e08ada3862406fa92019a6f0bcfb48d79
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33b4041d |
| 25-Apr-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "refactor(morello): remove duplication of platform information struct" into integration
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| #
468a6016 |
| 22-Mar-2023 |
Werner Lewis <werner.lewis@arm.com> |
refactor(morello): remove duplication of platform information struct
morello_plat_info is defined identically in multiple files, definition is moved to a header file to avoid duplication.
Signed-of
refactor(morello): remove duplication of platform information struct
morello_plat_info is defined identically in multiple files, definition is moved to a header file to avoid duplication.
Signed-off-by: Werner Lewis <werner.lewis@arm.com> Change-Id: I607354902c55f5c31f0732de9db60604b82aef97
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3e8b6f43 |
| 15-Mar-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "feat(morello): implement methods to retrieve soc-id information" into integration
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| #
cc266bcd |
| 16-Feb-2023 |
Chandni Cherukuri <chandni.cherukuri@arm.com> |
feat(morello): implement methods to retrieve soc-id information
Added silicon revision in the platform information SDS structure.
Implemented platform functions to retrieve the soc-id information f
feat(morello): implement methods to retrieve soc-id information
Added silicon revision in the platform information SDS structure.
Implemented platform functions to retrieve the soc-id information for the morello SoC platform. SoC revision, which is same as silicon revision, is fetched from the morello_plat_info structure and SoC version is populated with the part number from SSC_VERSION register, and is reflected in bits[0:15] of soc-id.
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com> Change-Id: I8e0c5b2bc21e393e6d638858cc2ea9f4638f04b9
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| #
557bc9dc |
| 09-Dec-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "tonnad01/gcc_warn_fix" into integration
* changes: fix(scmi): change function prototype to fix gcc error fix(rdn1edge): change variable type to fix gcc sign conversion
Merge changes from topic "tonnad01/gcc_warn_fix" into integration
* changes: fix(scmi): change function prototype to fix gcc error fix(rdn1edge): change variable type to fix gcc sign conversion error
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f0f2c903 |
| 07-Dec-2022 |
Tony K Nadackal <tony.nadackal@arm.com> |
fix(scmi): change function prototype to fix gcc error
Change function prototype of plat_css_get_scmi_info() to fix the GCC sign conversion error "comparison between signed and unsigned integer expre
fix(scmi): change function prototype to fix gcc error
Change function prototype of plat_css_get_scmi_info() to fix the GCC sign conversion error "comparison between signed and unsigned integer expressions". Changing channel_id type to unsigned int since it can never be a negative value.
Signed-off-by: Tony K Nadackal <tony.nadackal@arm.com> Change-Id: I579b21497329db40897c10d86c8fc68e4877f3db
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92eba866 |
| 07-Jul-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "fix(morello): move BL31 to run from DRAM space" into integration
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05330a49 |
| 23-Jun-2022 |
Manoj Kumar <manoj.kumar3@arm.com> |
fix(morello): move BL31 to run from DRAM space
The EL3 runtime firmware has been running from internal trusted SRAM space on the Morello platform. Due to unavailability of tag support for the intern
fix(morello): move BL31 to run from DRAM space
The EL3 runtime firmware has been running from internal trusted SRAM space on the Morello platform. Due to unavailability of tag support for the internal trusted SRAM this becomes a problem if we enable capability pointers in BL31.
To support capability pointers in BL31 it has to be run from the main DDR memory space. This patch updates the Morello platform configuration such that BL31 is loaded and run from DDR space.
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com> Change-Id: I16d4d757fb6f58c364f5133236d50fc06845e0b4
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| #
1d996e56 |
| 17-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "morello_plat_support" into integration
* changes: feat(morello): expose scmi protocols in fdts fix(morello): change the AP runtime UART address feat(morello): add sup
Merge changes from topic "morello_plat_support" into integration
* changes: feat(morello): expose scmi protocols in fdts fix(morello): change the AP runtime UART address feat(morello): add support for nt_fw_config feat(morello): split platform_info sds struct feat(morello): add changes to enable TBBR boot feat(morello): add DTS for Morello SoC platform feat(morello): configure DMC-Bing mode feat(morello): zero out the DDR memory space feat(morello): add TARGET_PLATFORM flag fix(morello): fix SoC reference clock frequency fix(arm): use PLAT instead of TARGET_PLATFORM
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| #
6ad6465e |
| 18-Nov-2021 |
sah01 <sahil@arm.com> |
feat(morello): add support for nt_fw_config
This patch adds support to load nt_fw_config with the information from plat_info sds structure which is then passed from BL2 to BL33.
Signed-off-by: sah0
feat(morello): add support for nt_fw_config
This patch adds support to load nt_fw_config with the information from plat_info sds structure which is then passed from BL2 to BL33.
Signed-off-by: sah01 <sahil@arm.com> Change-Id: I2242da7404c72a4f9c2e3d7f3b5c154890a78526
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| #
4a7a9daf |
| 02-Dec-2021 |
sah01 <sahil@arm.com> |
feat(morello): split platform_info sds struct
Different platform_info sds struct definition will be used for fvp and soc.
Signed-off-by: sahil <sahil@arm.com> Change-Id: I92f0e1b2d0d755ad0405ceebfe
feat(morello): split platform_info sds struct
Different platform_info sds struct definition will be used for fvp and soc.
Signed-off-by: sahil <sahil@arm.com> Change-Id: I92f0e1b2d0d755ad0405ceebfeb78d6e4c67013d
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| #
4af53977 |
| 10-Jan-2021 |
Manoj Kumar <manoj.kumar3@arm.com> |
feat(morello): add changes to enable TBBR boot
This patch adds all SOC and FVP related changes required to boot a standard TBBR style boot on Morello.
Signed-off-by: sahil <sahil@arm.com> Change-Id
feat(morello): add changes to enable TBBR boot
This patch adds all SOC and FVP related changes required to boot a standard TBBR style boot on Morello.
Signed-off-by: sahil <sahil@arm.com> Change-Id: Ib8f7f326790b13082cbe8db21a980e048e3db88c
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| #
9b8c431e |
| 30-Nov-2021 |
Chandni Cherukuri <chandni.cherukuri@arm.com> |
feat(morello): configure DMC-Bing mode
Based on the SCC configuration value obtained from the SDS platform information structure configure DMC-Bing Server or Client mode after zeroing out the memory
feat(morello): configure DMC-Bing mode
Based on the SCC configuration value obtained from the SDS platform information structure configure DMC-Bing Server or Client mode after zeroing out the memory.
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com> Change-Id: I0555fa06c9c1906264848f4e32ca413b4742cdee
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| #
2d39b397 |
| 26-Aug-2021 |
Manoj Kumar <manoj.kumar3@arm.com> |
feat(morello): zero out the DDR memory space
For Morello SoC, we use ECC capability for the RDIMMs which require the entire DDR memory space to be zeroed out before it can be accessed.
Change-Id: I
feat(morello): zero out the DDR memory space
For Morello SoC, we use ECC capability for the RDIMMs which require the entire DDR memory space to be zeroed out before it can be accessed.
Change-Id: Icbe9916f9a2d3c4ce839d8bf7f867efa18f33e23 Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com> Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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| #
edbe490b |
| 11-Feb-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "morello: Modify morello_plat_info structure" into integration
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| #
42ea8d67 |
| 20-Jan-2021 |
Manoj Kumar <manoj.kumar3@arm.com> |
morello: Modify morello_plat_info structure
The structure has been modified to specify the memory size in bytes instead of Gigabytes.
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com> Signed-off-by
morello: Modify morello_plat_info structure
The structure has been modified to specify the memory size in bytes instead of Gigabytes.
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com> Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com> Change-Id: I3384677d79af4f3cf55d3c353b6c20bb827b5ae7
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| #
14bac449 |
| 02-Oct-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Merge "morello: Add changes to fix build of Morello Platform" into integration
|