| /OK3568_Linux_fs/u-boot/board/dbau1x00/ |
| H A D | lowlevel_init.S | 27 li t0, MEM_STCFG2 29 sw t1, 0(t0) 31 li t0, MEM_STTIME2 33 sw t1, 0(t0) 35 li t0, MEM_STADDR2 37 sw t1, 0(t0) 39 li t0, MEM_STCFG1 41 sw t1, 0(t0) 43 li t0, MEM_STTIME1 45 sw t1, 0(t0) [all …]
|
| /OK3568_Linux_fs/u-boot/board/pb1x00/ |
| H A D | lowlevel_init.S | 27 li t0, MEM_STCFG1 29 sw t1, 0(t0) 31 li t0, MEM_STTIME1 33 sw t1, 0(t0) 35 li t0, MEM_STADDR1 37 sw t1, 0(t0) 55 li t0, AU1500_SYS_ADDR 57 sw t1, sys_endian(t0) 112 li t0, SYS_CPUPLL 114 sw t1, 0(t0) [all …]
|
| /OK3568_Linux_fs/u-boot/board/imgtec/malta/ |
| H A D | lowlevel_init.S | 32 PTR_LI t0, CKSEG1ADDR(MALTA_REVISION) 33 lw t0, 0(t0) 34 srl t0, t0, MALTA_REVISION_CORID_SHF 35 andi t0, t0, (MALTA_REVISION_CORID_MSK >> \ 40 beq t0, t1, _gt64120 44 beq t0, t1, _msc01 67 li t0, CPU_TO_GT32(0xdf000000) 68 sw t0, GT_ISD_OFS(t1) 74 li t0, CPU_TO_GT32(0xc0000000) 75 sw t0, GT_PCI0IOLD_OFS(t1) [all …]
|
| /OK3568_Linux_fs/u-boot/arch/mips/lib/ |
| H A D | cache_init.S | 126 mfc0 t0, CP0_CONFIG, 1 127 bgez t0, l2_probe_done 137 mfc0 t0, CP0_CONFIG, 2 138 bgez t0, l2_probe_cop0 139 mfc0 t0, CP0_CONFIG, 3 140 bgez t0, l2_probe_cop0 141 mfc0 t0, CP0_CONFIG, 4 142 bgez t0, l2_probe_cop0 145 mfc0 t0, CP0_CONFIG, 5 146 and R_L2_L2C, t0, MIPS_CONF5_L2C [all …]
|
| /OK3568_Linux_fs/kernel/arch/riscv/lib/ |
| H A D | memset.S | 13 move t0, a0 /* Preserve return value */ 23 addi a3, t0, SZREG-1 25 beq a3, t0, 2f /* Skip if already aligned */ 27 sub a4, a3, t0 29 sb a1, 0(t0) 30 addi t0, t0, 1 31 bltu t0, a3, 1b 48 add a3, t0, a4 56 sub t0, t0, a4 67 REG_S a1, 0(t0) [all …]
|
| /OK3568_Linux_fs/kernel/arch/mips/kernel/ |
| H A D | cps-vec.S | 117 li t0, CAUSEF_IV 118 mtc0 t0, CP0_CAUSE 121 li t0, ST0_CU1 | ST0_CU0 | ST0_BEV | STATUS_BITDEPS 122 mtc0 t0, CP0_STATUS 135 li t0, 0xff 136 sw t0, GCR_CL_COHERENCE_OFS(v1) 140 1: mfc0 t0, CP0_CONFIG 141 ori t0, 0x7 142 xori t0, 0x7 143 or t0, t0, s0 [all …]
|
| H A D | bmips_5xxx_init.S | 33 and t0, kva, t2 ; \ 36 9: cache op, 0(t0) ; \ 37 bne t0, t1, 9b ; \ 38 addu t0, linesize ; \ 123 move t0, a0 150 move a0, t0 178 move a0, t0 216 move t0, a0 242 move a0, t0 269 move a0, t0 [all …]
|
| H A D | octeon_switch.S | 34 dmfc0 t0, $11,7 /* CvmMemCtl */ 35 bbit0 t0, 6, 3f /* Is user access enabled? */ 39 andi t0, 0x3f 41 sll t0, 7-LONGLOG-1 48 subu t0, 1 /* Decrement loop var */ 53 bnez t0, 2b /* Loop until we've copied it all */ 58 dmfc0 t0, $11,7 /* CvmMemCtl */ 59 xori t0, t0, 0x40 /* Bit 6 is CVMSEG user enable */ 60 dmtc0 t0, $11,7 /* CvmMemCtl */ 77 PTR_ADDU t0, $28, _THREAD_SIZE - 32 [all …]
|
| /OK3568_Linux_fs/kernel/drivers/soc/bcm/brcmstb/pm/ |
| H A D | s3-mips.S | 25 la t0, gp_regs 26 sw ra, 0(t0) 27 sw s0, 4(t0) 28 sw s1, 8(t0) 29 sw s2, 12(t0) 30 sw s3, 16(t0) 31 sw s4, 20(t0) 32 sw s5, 24(t0) 33 sw s6, 28(t0) 34 sw s7, 32(t0) [all …]
|
| H A D | s2-mips.S | 42 move t0, a0 44 lw s0, 0(t0) 45 lw s1, 4(t0) 46 lw s2, 8(t0) 47 lw s3, 12(t0) 48 lw s4, 16(t0) 49 lw s5, 20(t0) 55 la t0, brcm_pm_do_s2 56 and t0, t1 61 1: cache 0x1c, 0(t0) [all …]
|
| /OK3568_Linux_fs/kernel/arch/arm/crypto/ |
| H A D | sha512-armv4.pl | 73 $t0="r9"; 97 mov $t0,$Elo,lsr#14 101 eor $t0,$t0,$Ehi,lsl#18 105 eor $t0,$t0,$Elo,lsr#18 107 eor $t0,$t0,$Ehi,lsl#14 109 eor $t0,$t0,$Ehi,lsr#9 111 eor $t0,$t0,$Elo,lsl#23 113 adds $Tlo,$Tlo,$t0 114 ldr $t0,[sp,#$Foff+0] @ f.lo 122 eor $t0,$t0,$t2 [all …]
|
| /OK3568_Linux_fs/kernel/arch/mips/include/asm/mach-loongson64/ |
| H A D | kernel-entry-init.h | 23 mfc0 t0, CP0_CONFIG3 24 or t0, (0x1 << 7) 25 mtc0 t0, CP0_CONFIG3 27 mfc0 t0, CP0_PAGEGRAIN 28 or t0, (0x1 << 29) 29 mtc0 t0, CP0_PAGEGRAIN 31 mfc0 t0, CP0_PRID 33 andi t1, t0, PRID_IMP_MASK 38 andi t0, (PRID_IMP_MASK | PRID_REV_MASK) 39 slti t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0) [all …]
|
| /OK3568_Linux_fs/kernel/arch/mips/power/ |
| H A D | hibernate_asm.S | 15 PTR_LA t0, saved_regs 16 PTR_S ra, PT_R31(t0) 17 PTR_S sp, PT_R29(t0) 18 PTR_S fp, PT_R30(t0) 19 PTR_S gp, PT_R28(t0) 20 PTR_S s0, PT_R16(t0) 21 PTR_S s1, PT_R17(t0) 22 PTR_S s2, PT_R18(t0) 23 PTR_S s3, PT_R19(t0) 24 PTR_S s4, PT_R20(t0) [all …]
|
| /OK3568_Linux_fs/kernel/arch/mips/netlogic/common/ |
| H A D | reset.S | 59 li t0, LSU_DEFEATURE 60 mfcr t1, t0 64 mtcr t1, t0 66 li t0, ICU_DEFEATURE 67 mfcr t1, t0 69 mtcr t1, t0 71 li t0, SCHED_DEFEATURE 73 mtcr t1, t0 82 mfc0 t0, CP0_PAGEMASK, 1 84 or t0, t1 [all …]
|
| /OK3568_Linux_fs/kernel/arch/mips/include/asm/mach-ip27/ |
| H A D | kernel-entry-init.h | 34 dli t0, 0xffffffffc0000000 35 dmtc0 t0, CP0_ENTRYHI 36 li t0, 0x1c000 # Offset of text into node memory 39 or t1, t1, t0 # Physical load address of kernel text 40 or t2, t2, t0 # Physical load address of kernel data 45 li t0, ((PAGE_GLOBAL | PAGE_VALID | CACHE_CACHABLE_COW) >> 6) 46 or t0, t0, t1 47 mtc0 t0, CP0_ENTRYLO0 # physaddr, VG, cach exlwr 48 li t0, ((PAGE_GLOBAL | PAGE_VALID | PAGE_DIRTY | CACHE_CACHABLE_COW) >> 6) 49 or t0, t0, t2 [all …]
|
| /OK3568_Linux_fs/kernel/arch/mips/alchemy/common/ |
| H A D | sleeper.S | 56 lw t0, 0(t1) 57 jalr t0 93 la t0, 1f 95 cache 0x14, 0(t0) 96 cache 0x14, 32(t0) 97 cache 0x14, 64(t0) 98 cache 0x14, 96(t0) 119 la t0, 1f 121 cache 0x14, 0(t0) 122 cache 0x14, 32(t0) [all …]
|
| /OK3568_Linux_fs/u-boot/arch/mips/cpu/ |
| H A D | start.S | 42 mfc0 t0, CP0_WATCHHI,\sel 43 bgez t0, wr_done 56 li t0, -16 58 and sp, t1, t0 # force 16 byte alignment 61 and sp, sp, t0 # force 16 byte alignment 67 and sp, sp, t0 # force 16 byte alignment 72 move t0, k0 74 PTR_S zero, 0(t0) 75 blt t0, t1, 1b 76 PTR_ADDIU t0, PTRSIZE [all …]
|
| H A D | cm_init.S | 17 mfc0 t0, CP0_CONFIG, 1 18 bgez t0, 2f 19 mfc0 t0, CP0_CONFIG, 2 20 bgez t0, 2f 23 mfc0 t0, CP0_CONFIG, 3 24 and t0, t0, MIPS_CONF3_CMGCR 25 beqz t0, 2f 28 1: MFC0 t0, CP0_CMGCRBASE 29 PTR_SLL t0, t0, 4 33 beq t0, t1, 2f [all …]
|
| /OK3568_Linux_fs/kernel/arch/csky/abiv2/ |
| H A D | strcmp.S | 18 ldw t0, (a3, 0) 21 cmpne t0, t1 24 tstnbz t0 28 ldw t0, (a3, 4) 30 cmpne t0, t1 32 tstnbz t0 35 ldw t0, (a3, 8) 37 cmpne t0, t1 39 tstnbz t0 42 ldw t0, (a3, 12) [all …]
|
| H A D | strcpy.S | 10 andi t0, a1, 3 11 bnez t0, 11f 87 xtrb0 t0, a2 88 st.b t0, (a3) 89 bez t0, 10f 90 xtrb1 t0, a2 91 st.b t0, (a3, 1) 92 bez t0, 10f 93 xtrb2 t0, a2 94 st.b t0, (a3, 2) [all …]
|
| /OK3568_Linux_fs/kernel/arch/mips/net/ |
| H A D | bpf_jit_asm.S | 49 slti t0, offset, 0; \ 50 bgtz t0, bpf_slow_path_##TYPE##_neg; \ 56 slt t0, $r_s0, offset; \ 57 bgtz t0, bpf_slow_path_##TYPE; \ 70 wsbh t0, $r_A 71 rotr $r_A, t0, 16 73 sll t0, $r_A, 24 76 or t0, t0, t1 79 or t0, t0, t2 81 or $r_A, t0, t1 [all …]
|
| /OK3568_Linux_fs/kernel/arch/mips/cavium-octeon/ |
| H A D | octeon-memcpy.S | 105 #undef t0 109 #define t0 $8 macro 185 EXC( LOAD t0, UNIT(0)(src), l_exc) 190 EXC( STORE t0, UNIT(0)(dst), s_exc_p16u) 194 EXC( LOAD t0, UNIT(4)(src), l_exc_copy) 198 EXC( STORE t0, UNIT(4)(dst), s_exc_p12u) 204 EXC( LOAD t0, UNIT(-8)(src), l_exc_copy_rewind16) 208 EXC( STORE t0, UNIT(-8)(dst), s_exc_p8u) 212 EXC( LOAD t0, UNIT(-4)(src), l_exc_copy_rewind16) 216 EXC( STORE t0, UNIT(-4)(dst), s_exc_p4u) [all …]
|
| /OK3568_Linux_fs/kernel/arch/mips/include/asm/mach-malta/ |
| H A D | kernel-entry-init.h | 52 li t0, ((MIPS_SEGCFG_MK << MIPS_SEGCFG_AM_SHIFT) | \ 58 or t0, t2 59 mtc0 t0, CP0_SEGCTL0 62 li t0, ((MIPS_SEGCFG_MUSUK << MIPS_SEGCFG_AM_SHIFT) | \ 69 ins t0, t1, 16, 3 70 mtc0 t0, CP0_SEGCTL1 73 li t0, ((MIPS_SEGCFG_MUSUK << MIPS_SEGCFG_AM_SHIFT) | \ 79 or t0, t2 80 mtc0 t0, CP0_SEGCTL2 83 mfc0 t0, $16, 5 [all …]
|
| /OK3568_Linux_fs/kernel/arch/mips/lib/ |
| H A D | csum_partial.S | 25 #undef t0 29 #define t0 $8 macro 121 lbu t0, (src) 124 sll t0, t0, 8 126 ADDC(sum, t0) 134 lhu t0, (src) 136 ADDC(sum, t0) 148 LOAD32 t0, 0x00(src) 150 ADDC(sum, t0) 159 ld t0, 0x00(src) [all …]
|
| /OK3568_Linux_fs/u-boot/arch/mips/mach-ath79/ar933x/ |
| H A D | lowlevel_init.S | 82 li t0, CKSEG1ADDR(AR71XX_RESET_BASE) 83 lw t1, AR933X_RESET_REG_RESET_MODULE(t0) 85 sw t1, AR933X_RESET_REG_RESET_MODULE(t0) 87 lw t1, AR933X_RESET_REG_RESET_MODULE(t0) 90 sw t1, AR933X_RESET_REG_RESET_MODULE(t0) 101 lw t5, AR933X_RESET_REG_BOOTSTRAP(t0) 107 sw t1, AR933X_RESET_REG_BOOTSTRAP(t0) 111 li t0, CKSEG1ADDR(AR933X_RTC_BASE) 113 sw t1, AR933X_RTC_REG_FORCE_WAKE(t0) 119 sw t1, AR933X_RTC_REG_RESET(t0) [all …]
|