1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public 3*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive 4*4882a593Smuzhiyun * for more details. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Copyright (C) 2005 Embedded Alley Solutions, Inc 7*4882a593Smuzhiyun * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) 8*4882a593Smuzhiyun * Copyright (C) 2009 Jiajie Chen (chenjiajie@cse.buaa.edu.cn) 9*4882a593Smuzhiyun * Copyright (C) 2012 Huacai Chen (chenhc@lemote.com) 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun #ifndef __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H 12*4882a593Smuzhiyun #define __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #include <asm/cpu.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* 17*4882a593Smuzhiyun * Override macros used in arch/mips/kernel/head.S. 18*4882a593Smuzhiyun */ 19*4882a593Smuzhiyun .macro kernel_entry_setup 20*4882a593Smuzhiyun .set push 21*4882a593Smuzhiyun .set mips64 22*4882a593Smuzhiyun /* Set LPA on LOONGSON3 config3 */ 23*4882a593Smuzhiyun mfc0 t0, CP0_CONFIG3 24*4882a593Smuzhiyun or t0, (0x1 << 7) 25*4882a593Smuzhiyun mtc0 t0, CP0_CONFIG3 26*4882a593Smuzhiyun /* Set ELPA on LOONGSON3 pagegrain */ 27*4882a593Smuzhiyun mfc0 t0, CP0_PAGEGRAIN 28*4882a593Smuzhiyun or t0, (0x1 << 29) 29*4882a593Smuzhiyun mtc0 t0, CP0_PAGEGRAIN 30*4882a593Smuzhiyun /* Enable STFill Buffer */ 31*4882a593Smuzhiyun mfc0 t0, CP0_PRID 32*4882a593Smuzhiyun /* Loongson-3A R4+ */ 33*4882a593Smuzhiyun andi t1, t0, PRID_IMP_MASK 34*4882a593Smuzhiyun li t2, PRID_IMP_LOONGSON_64G 35*4882a593Smuzhiyun beq t1, t2, 1f 36*4882a593Smuzhiyun nop 37*4882a593Smuzhiyun /* Loongson-3A R2/R3 */ 38*4882a593Smuzhiyun andi t0, (PRID_IMP_MASK | PRID_REV_MASK) 39*4882a593Smuzhiyun slti t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0) 40*4882a593Smuzhiyun bnez t0, 2f 41*4882a593Smuzhiyun nop 42*4882a593Smuzhiyun 1: 43*4882a593Smuzhiyun mfc0 t0, CP0_CONFIG6 44*4882a593Smuzhiyun or t0, 0x100 45*4882a593Smuzhiyun mtc0 t0, CP0_CONFIG6 46*4882a593Smuzhiyun 2: 47*4882a593Smuzhiyun _ehb 48*4882a593Smuzhiyun .set pop 49*4882a593Smuzhiyun .endm 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* 52*4882a593Smuzhiyun * Do SMP slave processor setup. 53*4882a593Smuzhiyun */ 54*4882a593Smuzhiyun .macro smp_slave_setup 55*4882a593Smuzhiyun .set push 56*4882a593Smuzhiyun .set mips64 57*4882a593Smuzhiyun /* Set LPA on LOONGSON3 config3 */ 58*4882a593Smuzhiyun mfc0 t0, CP0_CONFIG3 59*4882a593Smuzhiyun or t0, (0x1 << 7) 60*4882a593Smuzhiyun mtc0 t0, CP0_CONFIG3 61*4882a593Smuzhiyun /* Set ELPA on LOONGSON3 pagegrain */ 62*4882a593Smuzhiyun mfc0 t0, CP0_PAGEGRAIN 63*4882a593Smuzhiyun or t0, (0x1 << 29) 64*4882a593Smuzhiyun mtc0 t0, CP0_PAGEGRAIN 65*4882a593Smuzhiyun /* Enable STFill Buffer */ 66*4882a593Smuzhiyun mfc0 t0, CP0_PRID 67*4882a593Smuzhiyun /* Loongson-3A R4+ */ 68*4882a593Smuzhiyun andi t1, t0, PRID_IMP_MASK 69*4882a593Smuzhiyun li t2, PRID_IMP_LOONGSON_64G 70*4882a593Smuzhiyun beq t1, t2, 1f 71*4882a593Smuzhiyun nop 72*4882a593Smuzhiyun /* Loongson-3A R2/R3 */ 73*4882a593Smuzhiyun andi t0, (PRID_IMP_MASK | PRID_REV_MASK) 74*4882a593Smuzhiyun slti t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0) 75*4882a593Smuzhiyun bnez t0, 2f 76*4882a593Smuzhiyun nop 77*4882a593Smuzhiyun 1: 78*4882a593Smuzhiyun mfc0 t0, CP0_CONFIG6 79*4882a593Smuzhiyun or t0, 0x100 80*4882a593Smuzhiyun mtc0 t0, CP0_CONFIG6 81*4882a593Smuzhiyun 2: 82*4882a593Smuzhiyun _ehb 83*4882a593Smuzhiyun .set pop 84*4882a593Smuzhiyun .endm 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun #endif /* __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H */ 87