Searched refs:dv_reg (Results 1 – 11 of 11) sorted by relevance
94 dv_reg TXIDVER;95 dv_reg TXCONTROL;96 dv_reg TXTEARDOWN;98 dv_reg RXIDVER;99 dv_reg RXCONTROL;100 dv_reg RXTEARDOWN;102 dv_reg TXINTSTATRAW;103 dv_reg TXINTSTATMASKED;104 dv_reg TXINTMASKSET;105 dv_reg TXINTMASKCLEAR;[all …]
543 dv_reg dly = 0xff; in davinci_eth_ch_teardown()544 dv_reg cnt; in davinci_eth_ch_teardown()
23 typedef volatile unsigned int dv_reg; typedef335 dv_reg revid;336 dv_reg rsvd0[71];337 dv_reg ptcmd;338 dv_reg rsvd1;339 dv_reg ptstat;340 dv_reg rsvd2[437];343 dv_reg mdstat[PSC_PSC0_MODULE_ID_CNT];344 dv_reg rsvd3[112];345 dv_reg mdctl[PSC_PSC0_MODULE_ID_CNT];[all …]
115 dv_reg mmcctl;116 dv_reg mmcclk;117 dv_reg mmcst0;118 dv_reg mmcst1;119 dv_reg mmcim;120 dv_reg mmctor;121 dv_reg mmctod;122 dv_reg mmcblen;123 dv_reg mmcnblk;124 dv_reg mmcnblc;[all …]
31 dv_reg revision;32 dv_reg control;33 dv_reg status;34 dv_reg emulation;35 dv_reg mode;36 dv_reg autoreq;37 dv_reg srpfixtime;38 dv_reg teardown;39 dv_reg intsrc;40 dv_reg intsrc_set;[all …]
19 dv_reg *mux; /* Address of mux register */
94 dv_reg gcr0; /* 0x00 */95 dv_reg gcr1; /* 0x04 */96 dv_reg int0; /* 0x08 */97 dv_reg lvl; /* 0x0c */98 dv_reg flg; /* 0x10 */99 dv_reg pc0; /* 0x14 */100 dv_reg pc1; /* 0x18 */101 dv_reg pc2; /* 0x1c */102 dv_reg pc3; /* 0x20 */103 dv_reg pc4; /* 0x24 */[all …]
31 typedef volatile unsigned int dv_reg; typedef
37 typedef volatile unsigned int dv_reg; typedef
53 const dv_reg *mux = pins[i].mux; in davinci_configure_pin_mux()
22 typedef volatile unsigned int dv_reg; typedef