1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Based on: 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * ---------------------------------------------------------------------------- 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * dm644x_emac.h 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * TI DaVinci (DM644X) EMAC peripheral driver header for DV-EVM 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * Copyright (C) 2005 Texas Instruments. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * ---------------------------------------------------------------------------- 15*4882a593Smuzhiyun * 16*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * Modifications: 19*4882a593Smuzhiyun * ver. 1.0: Sep 2005, TI PSP Team - Created EMAC version for uBoot. 20*4882a593Smuzhiyun */ 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #ifndef _AM3517_EMAC_H_ 23*4882a593Smuzhiyun #define _AM3517_EMAC_H_ 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define EMAC_BASE_ADDR 0x5C010000 26*4882a593Smuzhiyun #define EMAC_WRAPPER_BASE_ADDR 0x5C000000 27*4882a593Smuzhiyun #define EMAC_WRAPPER_RAM_ADDR 0x5C020000 28*4882a593Smuzhiyun #define EMAC_MDIO_BASE_ADDR 0x5C030000 29*4882a593Smuzhiyun #define EMAC_HW_RAM_ADDR 0x01E20000 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define EMAC_MDIO_BUS_FREQ 166000000 /* 166 MHZ check */ 32*4882a593Smuzhiyun #define EMAC_MDIO_CLOCK_FREQ 1000000 /* 2.0 MHz */ 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* SOFTRESET macro definition interferes with emac_regs structure definition */ 35*4882a593Smuzhiyun #undef SOFTRESET 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun typedef volatile unsigned int dv_reg; 38*4882a593Smuzhiyun typedef volatile unsigned int *dv_reg_p; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun #define DAVINCI_EMAC_VERSION2 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #endif /* _AM3517_EMAC_H_ */ 43