1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2010 Texas Instruments 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Based on: 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * ---------------------------------------------------------------------------- 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * dm644x_emac.h 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * TI DaVinci (DM644X) EMAC peripheral driver header for DV-EVM 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * Copyright (C) 2005 Texas Instruments. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * ---------------------------------------------------------------------------- 15*4882a593Smuzhiyun * 16*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun */ 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #ifndef _EMAC_DEFS_H_ 21*4882a593Smuzhiyun #define _EMAC_DEFS_H_ 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #ifdef CONFIG_TI816X 24*4882a593Smuzhiyun #define EMAC_BASE_ADDR (0x4A100000) 25*4882a593Smuzhiyun #define EMAC_WRAPPER_BASE_ADDR (0x4A100900) 26*4882a593Smuzhiyun #define EMAC_WRAPPER_RAM_ADDR (0x4A102000) 27*4882a593Smuzhiyun #define EMAC_MDIO_BASE_ADDR (0x4A100800) 28*4882a593Smuzhiyun #define EMAC_MDIO_BUS_FREQ (250000000UL) 29*4882a593Smuzhiyun #define EMAC_MDIO_CLOCK_FREQ (2000000UL) 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun typedef volatile unsigned int dv_reg; 32*4882a593Smuzhiyun typedef volatile unsigned int *dv_reg_p; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define DAVINCI_EMAC_VERSION2 35*4882a593Smuzhiyun #define DAVINCI_EMAC_GIG_ENABLE 36*4882a593Smuzhiyun #endif 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #endif /* _EMAC_DEFS_H_ */ 39