1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * da8xx-usb.h -- TI's DA8xx platform specific usb wrapper definitions. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Author: Ajay Kumar Gupta <ajay.gupta@ti.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Based on drivers/usb/musb/davinci.h 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Copyright (C) 2009 Texas Instruments Incorporated 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 11*4882a593Smuzhiyun */ 12*4882a593Smuzhiyun #ifndef __DA8XX_MUSB_H__ 13*4882a593Smuzhiyun #define __DA8XX_MUSB_H__ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #include <asm/arch/hardware.h> 16*4882a593Smuzhiyun #include <asm/arch/gpio.h> 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* Base address of da8xx usb0 wrapper */ 19*4882a593Smuzhiyun #define DA8XX_USB_OTG_BASE 0x01E00000 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun /* Base address of da8xx musb core */ 22*4882a593Smuzhiyun #define DA8XX_USB_OTG_CORE_BASE (DA8XX_USB_OTG_BASE + 0x400) 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* Timeout for DA8xx usb module */ 25*4882a593Smuzhiyun #define DA8XX_USB_OTG_TIMEOUT 0x3FFFFFF 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /* 28*4882a593Smuzhiyun * DA8xx platform USB wrapper register overlay. 29*4882a593Smuzhiyun */ 30*4882a593Smuzhiyun struct da8xx_usb_regs { 31*4882a593Smuzhiyun dv_reg revision; 32*4882a593Smuzhiyun dv_reg control; 33*4882a593Smuzhiyun dv_reg status; 34*4882a593Smuzhiyun dv_reg emulation; 35*4882a593Smuzhiyun dv_reg mode; 36*4882a593Smuzhiyun dv_reg autoreq; 37*4882a593Smuzhiyun dv_reg srpfixtime; 38*4882a593Smuzhiyun dv_reg teardown; 39*4882a593Smuzhiyun dv_reg intsrc; 40*4882a593Smuzhiyun dv_reg intsrc_set; 41*4882a593Smuzhiyun dv_reg intsrc_clr; 42*4882a593Smuzhiyun dv_reg intmsk; 43*4882a593Smuzhiyun dv_reg intmsk_set; 44*4882a593Smuzhiyun dv_reg intmsk_clr; 45*4882a593Smuzhiyun dv_reg intsrcmsk; 46*4882a593Smuzhiyun dv_reg eoi; 47*4882a593Smuzhiyun dv_reg intvector; 48*4882a593Smuzhiyun dv_reg grndis_size[4]; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #define da8xx_usb_regs ((struct da8xx_usb_regs *)DA8XX_USB_OTG_BASE) 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun /* DA8XX interrupt bits definitions */ 54*4882a593Smuzhiyun #define DA8XX_USB_TX_ENDPTS_MASK 0x1f /* ep0 + 4 tx */ 55*4882a593Smuzhiyun #define DA8XX_USB_RX_ENDPTS_MASK 0x1e /* 4 rx */ 56*4882a593Smuzhiyun #define DA8XX_USB_TXINT_SHIFT 0 57*4882a593Smuzhiyun #define DA8XX_USB_RXINT_SHIFT 8 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #define DA8XX_USB_USBINT_MASK 0x01ff0000 /* 8 Mentor, DRVVBUS */ 60*4882a593Smuzhiyun #define DA8XX_USB_TXINT_MASK \ 61*4882a593Smuzhiyun (DA8XX_USB_TX_ENDPTS_MASK << DA8XX_USB_TXINT_SHIFT) 62*4882a593Smuzhiyun #define DA8XX_USB_RXINT_MASK \ 63*4882a593Smuzhiyun (DA8XX_USB_RX_ENDPTS_MASK << DA8XX_USB_RXINT_SHIFT) 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun /* DA8xx CFGCHIP2 (USB 2.0 PHY Control) register bits */ 66*4882a593Smuzhiyun #define CFGCHIP2_PHYCLKGD (1 << 17) 67*4882a593Smuzhiyun #define CFGCHIP2_VBUSSENSE (1 << 16) 68*4882a593Smuzhiyun #define CFGCHIP2_RESET (1 << 15) 69*4882a593Smuzhiyun #define CFGCHIP2_OTGMODE (3 << 13) 70*4882a593Smuzhiyun #define CFGCHIP2_NO_OVERRIDE (0 << 13) 71*4882a593Smuzhiyun #define CFGCHIP2_FORCE_HOST (1 << 13) 72*4882a593Smuzhiyun #define CFGCHIP2_FORCE_DEVICE (2 << 13) 73*4882a593Smuzhiyun #define CFGCHIP2_FORCE_HOST_VBUS_LOW (3 << 13) 74*4882a593Smuzhiyun #define CFGCHIP2_USB1PHYCLKMUX (1 << 12) 75*4882a593Smuzhiyun #define CFGCHIP2_USB2PHYCLKMUX (1 << 11) 76*4882a593Smuzhiyun #define CFGCHIP2_PHYPWRDN (1 << 10) 77*4882a593Smuzhiyun #define CFGCHIP2_OTGPWRDN (1 << 9) 78*4882a593Smuzhiyun #define CFGCHIP2_DATPOL (1 << 8) 79*4882a593Smuzhiyun #define CFGCHIP2_USB1SUSPENDM (1 << 7) 80*4882a593Smuzhiyun #define CFGCHIP2_PHY_PLLON (1 << 6) /* override PLL suspend */ 81*4882a593Smuzhiyun #define CFGCHIP2_SESENDEN (1 << 5) /* Vsess_end comparator */ 82*4882a593Smuzhiyun #define CFGCHIP2_VBDTCTEN (1 << 4) /* Vbus comparator */ 83*4882a593Smuzhiyun #define CFGCHIP2_REFFREQ (0xf << 0) 84*4882a593Smuzhiyun #define CFGCHIP2_REFFREQ_12MHZ (1 << 0) 85*4882a593Smuzhiyun #define CFGCHIP2_REFFREQ_24MHZ (2 << 0) 86*4882a593Smuzhiyun #define CFGCHIP2_REFFREQ_48MHZ (3 << 0) 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun #define DA8XX_USB_VBUS_GPIO (1 << 15) 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun int usb_phy_on(void); 91*4882a593Smuzhiyun void usb_phy_off(void); 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun #endif /* __DA8XX_MUSB_H__ */ 94