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Searched refs:dram_type (Results 1 – 25 of 28) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/gpu/drm/ast/
H A Dast_main.c296 ast->dram_type = AST_DRAM_1Gx16; in ast_get_dram_info()
312 ast->dram_type = AST_DRAM_1Gx16; in ast_get_dram_info()
316 ast->dram_type = AST_DRAM_2Gx16; in ast_get_dram_info()
319 ast->dram_type = AST_DRAM_4Gx16; in ast_get_dram_info()
322 ast->dram_type = AST_DRAM_8Gx16; in ast_get_dram_info()
328 ast->dram_type = AST_DRAM_512Mx16; in ast_get_dram_info()
332 ast->dram_type = AST_DRAM_1Gx16; in ast_get_dram_info()
335 ast->dram_type = AST_DRAM_2Gx16; in ast_get_dram_info()
338 ast->dram_type = AST_DRAM_4Gx16; in ast_get_dram_info()
345 ast->dram_type = AST_DRAM_512Mx16; in ast_get_dram_info()
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H A Dast_post.c317 if (ast->dram_type == AST_DRAM_1Gx16) in ast_init_dram_reg()
319 else if (ast->dram_type == AST_DRAM_1Gx32) in ast_init_dram_reg()
400 u32 dram_type; member
1624 param.dram_type = AST_DDR3; in ast_post_chip_2300()
1627 param.dram_type = AST_DDR2; in ast_post_chip_2300()
1662 if (param.dram_type == AST_DDR3) { in ast_post_chip_2300()
H A Dast_drv.h128 uint32_t dram_type; member
/OK3568_Linux_fs/u-boot/drivers/ram/rockchip/
H A Ddmc_fsp.c369 u32 dram_type, os_reg2_val, os_reg3_val; in dmc_fsp_probe() local
385 dram_type = SYS_REG_DEC_DDRTYPE_V3(os_reg2_val, os_reg3_val); in dmc_fsp_probe()
387 if (dram_type == DDR2) in dmc_fsp_probe()
389 else if (dram_type == DDR3) in dmc_fsp_probe()
391 else if (dram_type == DDR4) in dmc_fsp_probe()
393 else if (dram_type == LPDDR2) in dmc_fsp_probe()
395 else if (dram_type == LPDDR3) in dmc_fsp_probe()
397 else if (dram_type == LPDDR4) in dmc_fsp_probe()
399 else if (dram_type == LPDDR4X) in dmc_fsp_probe()
401 else if (dram_type == LPDDR5) in dmc_fsp_probe()
H A Dsdram_common.c118 u64 sdram_get_cs_cap(struct sdram_cap_info *cap_info, u32 cs, u32 dram_type) in sdram_get_cs_cap() argument
123 if (dram_type == DDR4) in sdram_get_cs_cap()
315 int sdram_detect_dbw(struct sdram_cap_info *cap_info, u32 dram_type) in sdram_detect_dbw() argument
320 if (dram_type == DDR3) { in sdram_detect_dbw()
325 } else if (dram_type == LPDDR4) { in sdram_detect_dbw()
327 } else if (dram_type == LPDDR3 || dram_type == LPDDR2) { in sdram_detect_dbw()
498 int sdram_detect_cs1_row(struct sdram_cap_info *cap_info, u32 dram_type) in sdram_detect_cs1_row() argument
506 cs0_cap = sdram_get_cs_cap(cap_info, 0, dram_type); in sdram_detect_cs1_row()
508 if (dram_type == DDR4) { in sdram_detect_cs1_row()
H A Dsdram_px30.c505 u32 dram_type = sdram_params->base.dramtype; in dram_detect_cap() local
507 if (dram_type != DDR4) { in dram_detect_cap()
511 if (dram_type == LPDDR2) in dram_detect_cap()
519 sdram_detect_dbw(cap_info, dram_type); in dram_detect_cap()
541 if (data_training(dram, 1, dram_type) == 0) in dram_detect_cap()
548 if (data_training(dram, 0, dram_type) == 0) in dram_detect_cap()
572 u32 dram_type = sdram_params->base.dramtype; in get_ddr_param() local
575 cs_cap[0] = sdram_get_cs_cap(cap_info, 0, dram_type); in get_ddr_param()
576 cs_cap[1] = sdram_get_cs_cap(cap_info, 1, dram_type); in get_ddr_param()
H A Dsdram_phy_px30.c51 u32 dram_type) in sdram_phy_set_ds_odt() argument
56 if (dram_type == DDR3) { in sdram_phy_set_ds_odt()
65 if (dram_type == LPDDR2) in sdram_phy_set_ds_odt()
H A Dsdram_rv1126.c2308 u32 dram_type = sdram_params->base.dramtype; in dram_all_config() local
2321 cs_cap[0] = sdram_get_cs_cap(cap_info, 0, dram_type); in dram_all_config()
2322 cs_cap[1] = sdram_get_cs_cap(cap_info, 1, dram_type); in dram_all_config()
2372 u32 dram_type = sdram_params->base.dramtype; in ddr_set_atags() local
2382 cs_cap[0] = sdram_get_cs_cap(cap_info, 0, dram_type); in ddr_set_atags()
2383 cs_cap[1] = sdram_get_cs_cap(cap_info, 1, dram_type); in ddr_set_atags()
2646 u32 dram_type = sdram_params->base.dramtype; in dram_detect_cap() local
2651 if (dram_type != LPDDR4 && dram_type != LPDDR4X) { in dram_detect_cap()
2652 if (dram_type != DDR4) { in dram_detect_cap()
2653 if (dram_type == DDR3) in dram_detect_cap()
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H A Dsdram_rk3328.c421 u32 dram_type = sdram_params->base.dramtype; in dram_detect_cap() local
423 if (dram_type != DDR4) { in dram_detect_cap()
432 sdram_detect_dbw(cap_info, dram_type); in dram_detect_cap()
454 if (data_training(dram, 1, dram_type) == 0) in dram_detect_cap()
H A Dsdram_pctl_px30.c140 u32 dram_type) in pctl_remodify_sdram_params() argument
/OK3568_Linux_fs/kernel/drivers/devfreq/event/
H A Drockchip-dfi.c119 u32 dram_type; member
372 if (info->dram_type == LPDDR5) { in rockchip_dfi_start_hardware_counter()
384 if (info->dram_type == LPDDR3 || info->dram_type == LPDDR2) in rockchip_dfi_start_hardware_counter()
386 else if (info->dram_type == LPDDR4 || info->dram_type == LPDDR4X) in rockchip_dfi_start_hardware_counter()
388 else if (info->dram_type == DDR4) in rockchip_dfi_start_hardware_counter()
390 else if (info->dram_type == LPDDR5) in rockchip_dfi_start_hardware_counter()
442 if (info->dram_type == LPDDR4 || info->dram_type == LPDDR4X) in rockchip_dfi_get_busier_ch()
444 else if (info->dram_type == LPDDR5) in rockchip_dfi_get_busier_ch()
539 data->dram_type = READ_DRAMTYPE_INFO_V3(val_2, val_3); in rk3588_dfi_init()
541 data->dram_type = READ_DRAMTYPE_INFO(val_2); in rk3588_dfi_init()
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/OK3568_Linux_fs/kernel/drivers/memory/tegra/
H A Dtegra210-emc-cc-r21021.c619 u32 value, dram_type; in tegra210_emc_r21021_set_clock() local
631 dram_type = value >> EMC_FBIO_CFG5_DRAM_TYPE_SHIFT; in tegra210_emc_r21021_set_clock()
638 dram_type == DRAM_TYPE_LPDDR4) in tegra210_emc_r21021_set_clock()
641 if (dram_type == DRAM_TYPE_DDR3) in tegra210_emc_r21021_set_clock()
645 (dram_type == DRAM_TYPE_LPDDR2)) in tegra210_emc_r21021_set_clock()
677 emc_dbg(emc, INFO, "DRAM type = %d\n", dram_type); in tegra210_emc_r21021_set_clock()
863 if (src_clk_period > 50000 && dram_type == DRAM_TYPE_LPDDR4) in tegra210_emc_r21021_set_clock()
874 if (dram_type == DRAM_TYPE_LPDDR4) in tegra210_emc_r21021_set_clock()
876 else if (dram_type == DRAM_TYPE_LPDDR2 || is_lpddr3) in tegra210_emc_r21021_set_clock()
879 else if (dram_type == DRAM_TYPE_DDR3) in tegra210_emc_r21021_set_clock()
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H A Dtegra124-emc.c472 enum emc_dram_type dram_type; member
599 if (emc->dram_type == DRAM_TYPE_DDR3) in tegra_emc_prepare_timing_change()
694 if (emc->dram_type == DRAM_TYPE_DDR3 && in tegra_emc_prepare_timing_change()
721 if (emc->dram_type == DRAM_TYPE_DDR3 && dll_change == DLL_CHANGE_OFF) in tegra_emc_prepare_timing_change()
727 if (emc->dram_type == DRAM_TYPE_DDR3) in tegra_emc_prepare_timing_change()
736 if (emc->dram_type == DRAM_TYPE_DDR3) in tegra_emc_prepare_timing_change()
744 if (emc->dram_type == DRAM_TYPE_DDR3) { in tegra_emc_prepare_timing_change()
819 if (emc->dram_type == DRAM_TYPE_LPDDR3 && in tegra_emc_complete_timing_change()
827 if (emc->dram_type == DRAM_TYPE_DDR3 && in tegra_emc_complete_timing_change()
871 emc->dram_type = readl(emc->regs + EMC_FBIO_CFG5); in emc_init()
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H A Dtegra30-emc.c486 enum emc_dram_type dram_type; in emc_prepare_timing_change() local
531 dram_type = fbio_cfg5 & EMC_FBIO_CFG5_DRAM_TYPE_MASK; in emc_prepare_timing_change()
607 if (dram_type == DRAM_TYPE_DDR3 && dll_change == DLL_CHANGE_ON) { in emc_prepare_timing_change()
660 if (dram_type == DRAM_TYPE_DDR3) { in emc_prepare_timing_change()
690 if (dram_type == DRAM_TYPE_DDR3) in emc_prepare_timing_change()
695 if (dram_type == DRAM_TYPE_DDR3) { in emc_prepare_timing_change()
1011 enum emc_dram_type dram_type; in emc_setup_hw() local
1014 dram_type = fbio_cfg5 & EMC_FBIO_CFG5_DRAM_TYPE_MASK; in emc_setup_hw()
1022 switch (dram_type) { in emc_setup_hw()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/display/
H A Dintel_bw.c25 enum intel_dram_type dram_type; member
44 qi->dram_type = INTEL_DRAM_DDR4; in icl_pcode_read_mem_global_info()
47 qi->dram_type = INTEL_DRAM_LPDDR4; in icl_pcode_read_mem_global_info()
50 qi->dram_type = INTEL_DRAM_DDR3; in icl_pcode_read_mem_global_info()
53 qi->dram_type = INTEL_DRAM_LPDDR3; in icl_pcode_read_mem_global_info()
62 qi->dram_type = INTEL_DRAM_DDR4; in icl_pcode_read_mem_global_info()
65 qi->dram_type = INTEL_DRAM_DDR3; in icl_pcode_read_mem_global_info()
68 qi->dram_type = INTEL_DRAM_LPDDR3; in icl_pcode_read_mem_global_info()
71 qi->dram_type = INTEL_DRAM_LPDDR4; in icl_pcode_read_mem_global_info()
79 qi->dram_type = INTEL_DRAM_LPDDR3; /* Conservative default */ in icl_pcode_read_mem_global_info()
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/OK3568_Linux_fs/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun9i.c99 u32 dram_type; member
462 if (para->dram_type == DRAM_TYPE_DDR3) { in mctl_channel_init()
575 if (para->dram_type == DRAM_TYPE_DDR3) { in mctl_channel_init()
595 writel(MCTL_MSTR_DEVICETYPE(para->dram_type) | in mctl_channel_init()
596 MCTL_MSTR_BURSTLENGTH(para->dram_type) | in mctl_channel_init()
601 if (para->dram_type == DRAM_TYPE_DDR3) { in mctl_channel_init()
632 if (para->dram_type != DRAM_TYPE_DDR3) in mctl_channel_init()
666 if (para->dram_type == DRAM_TYPE_DDR3) { in mctl_channel_init()
720 if (para->dram_type == DRAM_TYPE_DDR3) in mctl_channel_init()
752 if (para->dram_type == DRAM_TYPE_DDR3) in mctl_channel_init()
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H A Ddram_sun8i_a83t.c28 u8 dram_type; member
38 MCTL_CR_CHANNEL(1) | MCTL_CR_DRAM_TYPE(para->dram_type) | in mctl_set_cr()
134 if (para->dram_type == DRAM_TYPE_DDR3) { in auto_set_timing_para()
139 } else if (para->dram_type == DRAM_TYPE_LPDDR3) { in auto_set_timing_para()
324 if (para->dram_type == DRAM_TYPE_LPDDR3) in mctl_channel_init()
338 if (para->dram_type == DRAM_TYPE_DDR3) in mctl_channel_init()
444 para.dram_type = CONFIG_DRAM_TYPE; in sunxi_dram_init()
/OK3568_Linux_fs/kernel/arch/mips/ralink/
H A Dmt7620.c51 static int dram_type; variable
477 if (dram_type == SYSCFG0_DRAM_TYPE_SDRAM) in mt7620_get_dram_rate()
599 switch (dram_type) { in mt7620_dram_init()
625 switch (dram_type) { in mt7628_dram_init()
692 dram_type = cfg0 & DRAM_TYPE_MT7628_MASK; in prom_soc_init()
694 dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & in prom_soc_init()
696 if (dram_type == SYSCFG0_DRAM_TYPE_UNKNOWN) in prom_soc_init()
697 dram_type = SYSCFG0_DRAM_TYPE_SDRAM; in prom_soc_init()
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/
H A Dsdram.c29 u32 dbw, dram_type; in rockchip_sdram_size() local
35 dram_type = (sys_reg >> SYS_REG_DDRTYPE_SHIFT) & SYS_REG_DDRTYPE_MASK; in rockchip_sdram_size()
82 if (dram_type == DDR4) { in rockchip_sdram_size()
/OK3568_Linux_fs/kernel/drivers/edac/
H A Daspeed_edac.c234 u32 nr_pages, dram_type; in init_csrows() local
265 dram_type = (reg04 & ASPEED_MCR_CONF_DRAM_TYPE) ? MEM_DDR4 : MEM_DDR3; in init_csrows()
268 dimm->mtype = dram_type; in init_csrows()
H A Damd64_edac.c757 if (pvt->dram_type == MEM_LRDDR3) { in debug_dump_dramcfg_low()
878 if (pvt->dram_type == MEM_LRDDR4) { in __dump_misc_regs_df()
1071 pvt->dram_type = MEM_LRDDR4; in determine_memory_type()
1073 pvt->dram_type = MEM_RDDR4; in determine_memory_type()
1075 pvt->dram_type = MEM_DDR4; in determine_memory_type()
1084 pvt->dram_type = (pvt->dclr0 & BIT(18)) ? MEM_DDR : MEM_RDDR; in determine_memory_type()
1091 pvt->dram_type = (pvt->dclr0 & BIT(16)) ? MEM_DDR2 : MEM_RDDR2; in determine_memory_type()
1111 pvt->dram_type = MEM_DDR4; in determine_memory_type()
1113 pvt->dram_type = MEM_DDR3; in determine_memory_type()
1115 pvt->dram_type = MEM_LRDDR3; in determine_memory_type()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dsdram_common.h433 int sdram_detect_dbw(struct sdram_cap_info *cap_info, u32 dram_type);
439 int sdram_detect_cs1_row(struct sdram_cap_info *cap_info, u32 dram_type);
444 u64 sdram_get_cs_cap(struct sdram_cap_info *cap_info, u32 cs, u32 dram_type);
H A Dsdram_pctl_px30.h264 u32 dram_type);
/OK3568_Linux_fs/u-boot/arch/x86/include/asm/arch-baytrail/fsp/
H A Dfsp_vpd.h14 uint8_t dram_type; member
/OK3568_Linux_fs/u-boot/arch/x86/cpu/baytrail/
H A Dfsp_configs.c232 mem->dram_type = fdtdec_get_int(blob, node, in update_fsp_configs()

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