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Searched refs:APLL_MODE_SHIFT (Results 1 – 11 of 11) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rk3066.h178 APLL_MODE_SHIFT = 0, enumerator
179 APLL_MODE_MASK = 3 << APLL_MODE_SHIFT,
H A Dcru_rk3036.h110 APLL_MODE_SHIFT = 0, enumerator
111 APLL_MODE_MASK = 1 << APLL_MODE_SHIFT,
H A Dcru_rk3288.h252 APLL_MODE_SHIFT = 0, enumerator
253 APLL_MODE_MASK = CRU_MODE_MASK << APLL_MODE_SHIFT,
H A Dcru_px30.h172 APLL_MODE_SHIFT = 0, enumerator
173 APLL_MODE_MASK = 3 << APLL_MODE_SHIFT,
H A Dcru_rk3188.h188 APLL_MODE_SHIFT = 0, enumerator
H A Dcru_rk3308.h143 APLL_MODE_SHIFT = 0, enumerator
144 APLL_MODE_MASK = 3 << APLL_MODE_SHIFT,
/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk3188.c218 rk_clrsetreg(&cru->cru_mode_con, APLL_MODE_MASK << APLL_MODE_SHIFT, in rkclk_configure_cpu()
219 APLL_MODE_SLOW << APLL_MODE_SHIFT); in rkclk_configure_cpu()
238 rk_clrsetreg(&cru->cru_mode_con, APLL_MODE_MASK << APLL_MODE_SHIFT, in rkclk_configure_cpu()
239 APLL_MODE_NORMAL << APLL_MODE_SHIFT); in rkclk_configure_cpu()
253 0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT, in rkclk_pll_get_rate()
H A Dclk_rk3066.c221 APLL_MODE_SLOW << APLL_MODE_SHIFT); in rkclk_configure_cpu()
241 APLL_MODE_NORMAL << APLL_MODE_SHIFT); in rkclk_configure_cpu()
255 0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT, in rkclk_pll_get_rate()
262 switch ((con >> shift) & APLL_MODE_MASK >> APLL_MODE_SHIFT) { in rkclk_pll_get_rate()
H A Dclk_rk3036.c113 APLL_MODE_SLOW << APLL_MODE_SHIFT); in rkclk_init()
197 APLL_MODE_NORM << APLL_MODE_SHIFT); in rkclk_init()
209 0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, 0xff, in rkclk_pll_get_rate()
H A Dclk_rk3288.c277 0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT, in rkclk_pll_get_rate()
677 APLL_MODE_SLOW << APLL_MODE_SHIFT); in rk3288_clk_configure_cpu()
711 APLL_MODE_NORMAL << APLL_MODE_SHIFT); in rk3288_clk_configure_cpu()
H A Dclk_px30.c94 APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,