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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dstm32mp15-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 adc1_in6_pins_a: adc1-in6-0 {
15 adc12_ain_pins_a: adc12-ain-0 {
24 adc12_ain_pins_b: adc12-ain-1 {
31 adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
38 cec_pins_a: cec-0 {
41 bias-disable;
42 drive-open-drain;
[all …]
H A Dstm32f7-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
7 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
8 #include <dt-bindings/mfd/stm32f7-rcc.h>
12 pinctrl: pin-controller {
13 #address-cells = <1>;
14 #size-cells = <1>;
16 interrupt-parent = <&exti>;
18 pins-are-numbered;
21 gpio-controller;
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H A Dstm32h743-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
47 pin-controller {
48 #address-cells = <1>;
49 #size-cells = <1>;
50 compatible = "st,stm32h743-pinctrl";
52 interrupt-parent = <&exti>;
54 pins-are-numbered;
57 gpio-controller;
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H A Dstm32f4-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
44 #include <dt-bindings/mfd/stm32f4-rcc.h>
48 pinctrl: pin-controller {
49 #address-cells = <1>;
50 #size-cells = <1>;
52 interrupt-parent = <&exti>;
54 pins-are-numbered;
57 gpio-controller;
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H A Dqcom-apq8064-sony-xperia-yuga.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-apq8064-v2.0.dtsi"
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/mfd/qcom-rpm.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 compatible = "sony,xperia-yuga", "qcom,apq8064";
17 stdout-path = "serial0:115200n8";
20 gpio-keys {
21 compatible = "gpio-keys";
[all …]
H A Dqcom-apq8060-dragonboard.dts23 #include <dt-bindings/input/input.h>
24 #include <dt-bindings/gpio/gpio.h>
25 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
26 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
27 #include "qcom-msm8660.dtsi"
31 compatible = "qcom,apq8060-dragonboard", "qcom,msm8660";
38 stdout-path = "serial0:115200n8";
42 compatible = "simple-bus";
45 vph: regulator-fixed {
46 compatible = "regulator-fixed";
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dstm32mp157-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
10 pinctrl: pin-controller@50002000 {
11 #address-cells = <1>;
12 #size-cells = <1>;
13 compatible = "st,stm32mp157-pinctrl";
15 interrupt-parent = <&exti>;
17 pins-are-numbered;
20 gpio-controller;
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,pmic-gpio.txt6 - compatible:
10 "qcom,pm8005-gpio"
11 "qcom,pm8018-gpio"
12 "qcom,pm8038-gpio"
13 "qcom,pm8058-gpio"
14 "qcom,pm8916-gpio"
15 "qcom,pm8917-gpio"
16 "qcom,pm8921-gpio"
17 "qcom,pm8941-gpio"
18 "qcom,pm8950-gpio"
[all …]
H A Dpincfg-node.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
21 bias-disable:
25 bias-high-impedance:
27 description: high impedance mode ("third-state", "floating")
29 bias-bus-hold:
33 bias-pull-up:
[all …]
H A Dpinctrl-sx150x.txt3 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
4 ../interrupt-controller/interrupts.txt for generic information regarding
8 - compatible: should be one of :
19 - reg: The I2C slave address for this device.
21 - #gpio-cells: Should be 2. The first cell is the GPIO number and the
25 - gpio-controller: Marks the device as a GPIO controller.
28 - interrupts: Interrupt specifier for the controllers interrupt.
30 - interrupt-controller: Marks the device as a interrupt controller.
32 - semtech,probe-reset: Will trigger a reset of the GPIO expander on probe,
38 Required properties for pin configuration sub-nodes:
[all …]
H A Dst,stm32-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre TORGUE <alexandre.torgue@st.com>
17 on-chip controllers onto these pads.
22 - st,stm32f429-pinctrl
23 - st,stm32f469-pinctrl
24 - st,stm32f746-pinctrl
25 - st,stm32f769-pinctrl
[all …]
H A Dcirrus,madera.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
30 Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
33 pinctrl-0:
38 pinctrl-names:
43 pin-settings:
50 '-pins$':
53 - $ref: "pincfg-node.yaml#"
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mfd/
H A Dst,stmfx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectonics Multi-Function eXpander (STMFX) bindings
9 description: ST Multi-Function eXpander (STMFX) is a slave controller using I2C for
15 - Amelie Delaunay <amelie.delaunay@st.com>
19 const: st,stmfx-0300
27 drive-open-drain: true
29 vdd-supply:
37 const: st,stmfx-0300-pinctrl
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/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/pinctrl/
H A Dst,stm32-pinctrl.txt5 also provides ability to multiplex and configure the output of various on-chip
10 - compatible: value should be one of the following:
11 (a) "st,stm32f429-pinctrl"
12 (b) "st,stm32f746-pinctrl"
13 - #address-cells: The value of this property must be 1
14 - #size-cells : The value of this property must be 1
15 - ranges : defines mapping between pin controller node (parent) to
16 gpio-bank node (children).
17 - pins-are-numbered: Specify the subnodes are using numbered pinmux to
22 - gpio-controller : Indicates this device is a GPIO controller
[all …]
H A Dpinctrl-bindings.txt4 such as pull-up/down, tri-state, drive-strength etc are designated as pin
15 need to reconfigure pins at run-time, for example to tri-state pins when the
47 pinctrl-0: List of phandles, each pointing at a pin configuration
65 pinctrl-1: List of phandles, each pointing at a pin configuration
68 pinctrl-n: List of phandles, each pointing at a pin configuration
70 pinctrl-names: The list of names to assign states. List entry 0 defines the
78 pinctrl-names = "active", "idle";
79 pinctrl-0 = <&state_0_node_a>;
80 pinctrl-1 = <&state_1_node_a &state_1_node_b>;
85 pinctrl-0 = <&state_0_node_a>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/nvidia/
H A Dtegra186-p3310.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
27 stdout-path = "serial0:115200n8";
38 phy-reset-gpios = <&gpio TEGRA186_MAIN_GPIO(M, 4)
40 phy-handle = <&phy>;
41 phy-mode = "rgmii";
44 #address-cells = <1>;
45 #size-cells = <0>;
48 compatible = "ethernet-phy-ieee802.3-c22";
50 interrupt-parent = <&gpio>;
[all …]
H A Dtegra194-p3668-0000.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
8 compatible = "nvidia,p3668-0000", "nvidia,tegra194";
28 stdout-path = "serial0:115200n8";
35 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(R, 1) GPIO_ACTIVE_LOW>;
36 phy-handle = <&phy>;
37 phy-mode = "rgmii-id";
40 #address-cells = <1>;
41 #size-cells = <0>;
44 compatible = "ethernet-phy-ieee802.3-c22";
[all …]
H A Dtegra194-p2888.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
27 stdout-path = "serial0:115200n8";
34 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 5) GPIO_ACTIVE_LOW>;
35 phy-handle = <&phy>;
36 phy-mode = "rgmii-id";
39 #address-cells = <1>;
40 #size-cells = <0>;
43 compatible = "ethernet-phy-ieee802.3-c22";
45 interrupt-parent = <&gpio>;
[all …]
/OK3568_Linux_fs/kernel/drivers/pinctrl/
H A Dpinconf-generic.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
22 #include <linux/pinctrl/pinconf-generic.h>
26 #include "pinctrl-utils.h"
33 PCONFDUMP(PIN_CONFIG_BIAS_PULL_DOWN, "input bias pull down", "ohms", true),
35 "input bias pull to pin specific state", "ohms", true),
36 PCONFDUMP(PIN_CONFIG_BIAS_PULL_UP, "input bias pull up", "ohms", true),
37 PCONFDUMP(PIN_CONFIG_DRIVE_OPEN_DRAIN, "output drive open drain", NULL, false),
38 PCONFDUMP(PIN_CONFIG_DRIVE_OPEN_SOURCE, "output drive open source", NULL, false),
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/watchdog/
H A Daspeed-wdt.txt4 - compatible: must be one of:
5 - "aspeed,ast2400-wdt"
6 - "aspeed,ast2500-wdt"
7 - "aspeed,ast2600-wdt"
9 - reg: physical base address of the controller and length of memory mapped
14 - aspeed,reset-type = "cpu|soc|system|none"
16 Reset behavior - Whenever a timeout occurs the watchdog can be programmed
23 If 'aspeed,reset-type=' is not specified the default is to enable system
28 - cpu: Reset CPU on watchdog timeout
30 - soc: Reset 'System on Chip' on watchdog timeout
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/qcom/
H A Dsdm845-db845c.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h>
27 stdout-path = "serial0:115200n8";
30 dc12v: dc12v-regulator {
31 compatible = "regulator-fixed";
[all …]
/OK3568_Linux_fs/kernel/drivers/watchdog/
H A Daspeed_wdt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
35 { .compatible = "aspeed,ast2400-wdt", .data = &ast2400_config },
36 { .compatible = "aspeed,ast2500-wdt", .data = &ast2500_config },
37 { .compatible = "aspeed,ast2600-wdt", .data = &ast2500_config },
65 * * Drive mode: push-pull vs open-drain
76 * The AST2500 exposes the drive mode and polarity options, but not in a
78 * and bit 30 represents push-pull or open-drain. With respect to write, magic
79 * values need to be written to the top byte to change the state of the drive
81 * effect on the state of the drive mode or polarity bits. However, the pulse
106 wdt->ctrl |= WDT_CTRL_ENABLE; in aspeed_wdt_enable()
[all …]
/OK3568_Linux_fs/kernel/include/linux/pinctrl/
H A Dpinconf-generic.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
21 * enum pin_config_param - possible pin configuration parameters
28 * transition from say pull-up to pull-down implies that you disable
29 * pull-up in the process, this setting disables all biasing.
31 * mode, also know as "third-state" (tristate) or "high-Z" or "floating".
33 * if for example some other pin is going to drive the signal connected
37 * impedance to GROUND). If the argument is != 0 pull-down is enabled,
38 * if it is 0, pull-down is total, i.e. the pin is connected to GROUND.
[all …]
/OK3568_Linux_fs/kernel/drivers/acpi/acpica/
H A Dutresdecode.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: utresdecode - Resource descriptor keyword strings
28 "0 - Good Configuration",
29 "1 - Acceptable Configuration",
30 "2 - Suboptimal Configuration",
31 "3 - ***Invalid Configuration***",
264 "Bias Pull-up",
265 "Bias Pull-down",
270 "Drive Open Drain",
271 "Drive Open Source",
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-tegra/
H A Dpinmux.h2 * (C) Copyright 2010-2014
5 * SPDX-License-Identifier: GPL-2.0+
77 /* Defines a pin group cfg's low-power mode select */
83 PMUX_LPMD_NONE = -1,
92 PMUX_SCHMT_NONE = -1,
97 /* Defines whether a pin group cfg's high-speed mode is enabled or not */
101 PMUX_HSM_NONE = -1,
107 * pull up/down settings and tristate settings. Having set up one of these
114 u32 pull:2; /* pull up/down/normal PMUX_PULL_...*/ member
123 u32 od:2; /* open-drain or push-pull driver */
[all …]

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