1*4882a593SmuzhiyunAspeed Watchdog Timer 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun - compatible: must be one of: 5*4882a593Smuzhiyun - "aspeed,ast2400-wdt" 6*4882a593Smuzhiyun - "aspeed,ast2500-wdt" 7*4882a593Smuzhiyun - "aspeed,ast2600-wdt" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun - reg: physical base address of the controller and length of memory mapped 10*4882a593Smuzhiyun region 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunOptional properties: 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun - aspeed,reset-type = "cpu|soc|system|none" 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun Reset behavior - Whenever a timeout occurs the watchdog can be programmed 17*4882a593Smuzhiyun to generate one of three different, mutually exclusive, types of resets. 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun Type "none" can be specified to indicate that no resets are to be done. 20*4882a593Smuzhiyun This is useful in situations where another watchdog engine on chip is 21*4882a593Smuzhiyun to perform the reset. 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun If 'aspeed,reset-type=' is not specified the default is to enable system 24*4882a593Smuzhiyun reset. 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun Reset types: 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun - cpu: Reset CPU on watchdog timeout 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun - soc: Reset 'System on Chip' on watchdog timeout 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun - system: Reset system on watchdog timeout 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun - none: No reset is performed on timeout. Assumes another watchdog 35*4882a593Smuzhiyun engine is responsible for this. 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun - aspeed,alt-boot: If property is present then boot from alternate block. 38*4882a593Smuzhiyun - aspeed,external-signal: If property is present then signal is sent to 39*4882a593Smuzhiyun external reset counter (only WDT1 and WDT2). If not 40*4882a593Smuzhiyun specified no external signal is sent. 41*4882a593Smuzhiyun - aspeed,ext-pulse-duration: External signal pulse duration in microseconds 42*4882a593Smuzhiyun 43*4882a593SmuzhiyunOptional properties for AST2500-compatible watchdogs: 44*4882a593Smuzhiyun - aspeed,ext-push-pull: If aspeed,external-signal is present, set the pin's 45*4882a593Smuzhiyun drive type to push-pull. The default is open-drain. 46*4882a593Smuzhiyun - aspeed,ext-active-high: If aspeed,external-signal is present and and the pin 47*4882a593Smuzhiyun is configured as push-pull, then set the pulse 48*4882a593Smuzhiyun polarity to active-high. The default is active-low. 49*4882a593Smuzhiyun 50*4882a593SmuzhiyunExample: 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun wdt1: watchdog@1e785000 { 53*4882a593Smuzhiyun compatible = "aspeed,ast2400-wdt"; 54*4882a593Smuzhiyun reg = <0x1e785000 0x1c>; 55*4882a593Smuzhiyun aspeed,reset-type = "system"; 56*4882a593Smuzhiyun aspeed,external-signal; 57*4882a593Smuzhiyun }; 58