1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun#include "tegra194.dtsi" 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun#include <dt-bindings/mfd/max77620.h> 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/ { 7*4882a593Smuzhiyun model = "NVIDIA Jetson AGX Xavier"; 8*4882a593Smuzhiyun compatible = "nvidia,p2888", "nvidia,tegra194"; 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun aliases { 11*4882a593Smuzhiyun ethernet0 = "/bus@0/ethernet@2490000"; 12*4882a593Smuzhiyun i2c0 = "/bpmp/i2c"; 13*4882a593Smuzhiyun i2c1 = "/bus@0/i2c@3160000"; 14*4882a593Smuzhiyun i2c2 = "/bus@0/i2c@c240000"; 15*4882a593Smuzhiyun i2c3 = "/bus@0/i2c@3180000"; 16*4882a593Smuzhiyun i2c4 = "/bus@0/i2c@3190000"; 17*4882a593Smuzhiyun i2c5 = "/bus@0/i2c@31c0000"; 18*4882a593Smuzhiyun i2c6 = "/bus@0/i2c@c250000"; 19*4882a593Smuzhiyun i2c7 = "/bus@0/i2c@31e0000"; 20*4882a593Smuzhiyun mmc0 = "/bus@0/mmc@3460000"; 21*4882a593Smuzhiyun mmc1 = "/bus@0/mmc@3400000"; 22*4882a593Smuzhiyun serial0 = &tcu; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun chosen { 26*4882a593Smuzhiyun bootargs = "console=ttyS0,115200n8"; 27*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun bus@0 { 31*4882a593Smuzhiyun ethernet@2490000 { 32*4882a593Smuzhiyun status = "okay"; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 5) GPIO_ACTIVE_LOW>; 35*4882a593Smuzhiyun phy-handle = <&phy>; 36*4882a593Smuzhiyun phy-mode = "rgmii-id"; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun mdio { 39*4882a593Smuzhiyun #address-cells = <1>; 40*4882a593Smuzhiyun #size-cells = <0>; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun phy: phy@0 { 43*4882a593Smuzhiyun compatible = "ethernet-phy-ieee802.3-c22"; 44*4882a593Smuzhiyun reg = <0x0>; 45*4882a593Smuzhiyun interrupt-parent = <&gpio>; 46*4882a593Smuzhiyun interrupts = <TEGRA194_MAIN_GPIO(G, 4) IRQ_TYPE_LEVEL_LOW>; 47*4882a593Smuzhiyun #phy-cells = <0>; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun memory-controller@2c00000 { 53*4882a593Smuzhiyun status = "okay"; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun serial@3110000 { 57*4882a593Smuzhiyun status = "okay"; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun i2c@3160000 { 61*4882a593Smuzhiyun status = "okay"; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun eeprom@50 { 64*4882a593Smuzhiyun compatible = "atmel,24c02"; 65*4882a593Smuzhiyun reg = <0x50>; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun label = "module"; 68*4882a593Smuzhiyun vcc-supply = <&vdd_1v8ls>; 69*4882a593Smuzhiyun address-width = <8>; 70*4882a593Smuzhiyun pagesize = <8>; 71*4882a593Smuzhiyun size = <256>; 72*4882a593Smuzhiyun read-only; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun /* SDMMC1 (SD/MMC) */ 77*4882a593Smuzhiyun mmc@3400000 { 78*4882a593Smuzhiyun cd-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 7) GPIO_ACTIVE_LOW>; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun /* SDMMC4 (eMMC) */ 82*4882a593Smuzhiyun mmc@3460000 { 83*4882a593Smuzhiyun status = "okay"; 84*4882a593Smuzhiyun bus-width = <8>; 85*4882a593Smuzhiyun non-removable; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun vqmmc-supply = <&vdd_1v8ls>; 88*4882a593Smuzhiyun vmmc-supply = <&vdd_emmc_3v3>; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun padctl@3520000 { 92*4882a593Smuzhiyun avdd-usb-supply = <&vdd_usb_3v3>; 93*4882a593Smuzhiyun vclamp-usb-supply = <&vdd_1v8ao>; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun ports { 96*4882a593Smuzhiyun usb2-1 { 97*4882a593Smuzhiyun vbus-supply = <&vdd_5v0_sys>; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun usb2-3 { 101*4882a593Smuzhiyun vbus-supply = <&vdd_5v_sata>; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun usb3-0 { 105*4882a593Smuzhiyun vbus-supply = <&vdd_5v0_sys>; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun usb3-3 { 109*4882a593Smuzhiyun vbus-supply = <&vdd_5v0_sys>; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun }; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun rtc@c2a0000 { 115*4882a593Smuzhiyun status = "okay"; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun pmc@c360000 { 119*4882a593Smuzhiyun nvidia,invert-interrupt; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun bpmp { 124*4882a593Smuzhiyun i2c { 125*4882a593Smuzhiyun status = "okay"; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun pmic: pmic@3c { 128*4882a593Smuzhiyun compatible = "maxim,max20024"; 129*4882a593Smuzhiyun reg = <0x3c>; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun interrupt-parent = <&pmc>; 132*4882a593Smuzhiyun interrupts = <24 IRQ_TYPE_LEVEL_LOW>; 133*4882a593Smuzhiyun #interrupt-cells = <2>; 134*4882a593Smuzhiyun interrupt-controller; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun #gpio-cells = <2>; 137*4882a593Smuzhiyun gpio-controller; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun pinctrl-names = "default"; 140*4882a593Smuzhiyun pinctrl-0 = <&max20024_default>; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun max20024_default: pinmux { 143*4882a593Smuzhiyun gpio0 { 144*4882a593Smuzhiyun pins = "gpio0"; 145*4882a593Smuzhiyun function = "gpio"; 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun gpio1 { 149*4882a593Smuzhiyun pins = "gpio1"; 150*4882a593Smuzhiyun function = "fps-out"; 151*4882a593Smuzhiyun maxim,active-fps-source = <MAX77620_FPS_SRC_DEF>; 152*4882a593Smuzhiyun }; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun gpio2 { 155*4882a593Smuzhiyun pins = "gpio2"; 156*4882a593Smuzhiyun function = "fps-out"; 157*4882a593Smuzhiyun maxim,active-fps-source = <MAX77620_FPS_SRC_DEF>; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun gpio3 { 161*4882a593Smuzhiyun pins = "gpio3"; 162*4882a593Smuzhiyun function = "fps-out"; 163*4882a593Smuzhiyun maxim,active-fps-source = <MAX77620_FPS_SRC_DEF>; 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun gpio4 { 167*4882a593Smuzhiyun pins = "gpio4"; 168*4882a593Smuzhiyun function = "32k-out1"; 169*4882a593Smuzhiyun drive-push-pull = <1>; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun gpio6 { 173*4882a593Smuzhiyun pins = "gpio6"; 174*4882a593Smuzhiyun function = "gpio"; 175*4882a593Smuzhiyun drive-push-pull = <1>; 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun gpio7 { 179*4882a593Smuzhiyun pins = "gpio7"; 180*4882a593Smuzhiyun function = "gpio"; 181*4882a593Smuzhiyun drive-push-pull = <0>; 182*4882a593Smuzhiyun }; 183*4882a593Smuzhiyun }; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun fps { 186*4882a593Smuzhiyun fps0 { 187*4882a593Smuzhiyun maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 188*4882a593Smuzhiyun maxim,shutdown-fps-time-period-us = <640>; 189*4882a593Smuzhiyun }; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun fps1 { 192*4882a593Smuzhiyun maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; 193*4882a593Smuzhiyun maxim,shutdown-fps-time-period-us = <640>; 194*4882a593Smuzhiyun maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun fps2 { 198*4882a593Smuzhiyun maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 199*4882a593Smuzhiyun maxim,shutdown-fps-time-period-us = <640>; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun }; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun regulators { 204*4882a593Smuzhiyun in-sd0-supply = <&vdd_5v0_sys>; 205*4882a593Smuzhiyun in-sd1-supply = <&vdd_5v0_sys>; 206*4882a593Smuzhiyun in-sd2-supply = <&vdd_5v0_sys>; 207*4882a593Smuzhiyun in-sd3-supply = <&vdd_5v0_sys>; 208*4882a593Smuzhiyun in-sd4-supply = <&vdd_5v0_sys>; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun in-ldo0-1-supply = <&vdd_5v0_sys>; 211*4882a593Smuzhiyun in-ldo2-supply = <&vdd_5v0_sys>; 212*4882a593Smuzhiyun in-ldo3-5-supply = <&vdd_5v0_sys>; 213*4882a593Smuzhiyun in-ldo4-6-supply = <&vdd_5v0_sys>; 214*4882a593Smuzhiyun in-ldo7-8-supply = <&vdd_1v8ls>; 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun vdd_1v0: sd0 { 217*4882a593Smuzhiyun regulator-name = "VDDIO_SYS_1V0"; 218*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 219*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 220*4882a593Smuzhiyun regulator-always-on; 221*4882a593Smuzhiyun regulator-boot-on; 222*4882a593Smuzhiyun }; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun vdd_1v8hs: sd1 { 225*4882a593Smuzhiyun regulator-name = "VDDIO_SYS_1V8HS"; 226*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 227*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 228*4882a593Smuzhiyun regulator-always-on; 229*4882a593Smuzhiyun regulator-boot-on; 230*4882a593Smuzhiyun }; 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun vdd_1v8ls: sd2 { 233*4882a593Smuzhiyun regulator-name = "VDDIO_SYS_1V8LS"; 234*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 235*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 236*4882a593Smuzhiyun regulator-always-on; 237*4882a593Smuzhiyun regulator-boot-on; 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun vdd_1v8ao: sd3 { 241*4882a593Smuzhiyun regulator-name = "VDDIO_AO_1V8"; 242*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 243*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 244*4882a593Smuzhiyun regulator-always-on; 245*4882a593Smuzhiyun regulator-boot-on; 246*4882a593Smuzhiyun }; 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun sd4 { 249*4882a593Smuzhiyun regulator-name = "VDD_DDR_1V1"; 250*4882a593Smuzhiyun regulator-min-microvolt = <1100000>; 251*4882a593Smuzhiyun regulator-max-microvolt = <1100000>; 252*4882a593Smuzhiyun regulator-always-on; 253*4882a593Smuzhiyun regulator-boot-on; 254*4882a593Smuzhiyun }; 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun ldo0 { 257*4882a593Smuzhiyun regulator-name = "VDD_RTC"; 258*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 259*4882a593Smuzhiyun regulator-max-microvolt = <800000>; 260*4882a593Smuzhiyun regulator-always-on; 261*4882a593Smuzhiyun regulator-boot-on; 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun ldo2 { 265*4882a593Smuzhiyun regulator-name = "VDDIO_AO_3V3"; 266*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 267*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 268*4882a593Smuzhiyun regulator-always-on; 269*4882a593Smuzhiyun regulator-boot-on; 270*4882a593Smuzhiyun }; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun vdd_emmc_3v3: ldo3 { 273*4882a593Smuzhiyun regulator-name = "VDD_EMMC_3V3"; 274*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 275*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 276*4882a593Smuzhiyun }; 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun vdd_usb_3v3: ldo5 { 279*4882a593Smuzhiyun regulator-name = "VDD_USB_3V3"; 280*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 281*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 282*4882a593Smuzhiyun }; 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun ldo6 { 285*4882a593Smuzhiyun regulator-name = "VDD_SDIO_3V3"; 286*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 287*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 288*4882a593Smuzhiyun }; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun ldo7 { 291*4882a593Smuzhiyun regulator-name = "AVDD_CSI_1V2"; 292*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 293*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun }; 296*4882a593Smuzhiyun }; 297*4882a593Smuzhiyun 298*4882a593Smuzhiyun temperature-sensor@4c { 299*4882a593Smuzhiyun compatible = "ti,tmp451"; 300*4882a593Smuzhiyun reg = <0x4c>; 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun interrupt-parent = <&gpio>; 303*4882a593Smuzhiyun interrupts = <TEGRA194_MAIN_GPIO(H, 2) 304*4882a593Smuzhiyun IRQ_TYPE_LEVEL_LOW>; 305*4882a593Smuzhiyun vcc-supply = <&vdd_1v8ls>; 306*4882a593Smuzhiyun 307*4882a593Smuzhiyun #thermal-sensor-cells = <1>; 308*4882a593Smuzhiyun }; 309*4882a593Smuzhiyun }; 310*4882a593Smuzhiyun }; 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun vdd_5v0_sys: regulator@0 { 313*4882a593Smuzhiyun compatible = "regulator-fixed"; 314*4882a593Smuzhiyun regulator-name = "VIN_SYS_5V0"; 315*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 316*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 317*4882a593Smuzhiyun regulator-always-on; 318*4882a593Smuzhiyun regulator-boot-on; 319*4882a593Smuzhiyun }; 320*4882a593Smuzhiyun 321*4882a593Smuzhiyun vdd_hdmi: regulator@1 { 322*4882a593Smuzhiyun compatible = "regulator-fixed"; 323*4882a593Smuzhiyun regulator-name = "VDD_5V0_HDMI_CON"; 324*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 325*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 326*4882a593Smuzhiyun gpio = <&gpio TEGRA194_MAIN_GPIO(A, 3) GPIO_ACTIVE_HIGH>; 327*4882a593Smuzhiyun enable-active-high; 328*4882a593Smuzhiyun }; 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun vdd_3v3_pcie: regulator@2 { 331*4882a593Smuzhiyun compatible = "regulator-fixed"; 332*4882a593Smuzhiyun regulator-name = "PEX_3V3"; 333*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 334*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 335*4882a593Smuzhiyun gpio = <&gpio TEGRA194_MAIN_GPIO(Z, 2) GPIO_ACTIVE_HIGH>; 336*4882a593Smuzhiyun regulator-boot-on; 337*4882a593Smuzhiyun enable-active-high; 338*4882a593Smuzhiyun }; 339*4882a593Smuzhiyun 340*4882a593Smuzhiyun vdd_12v_pcie: regulator@3 { 341*4882a593Smuzhiyun compatible = "regulator-fixed"; 342*4882a593Smuzhiyun regulator-name = "VDD_12V"; 343*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 344*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 345*4882a593Smuzhiyun gpio = <&gpio TEGRA194_MAIN_GPIO(A, 1) GPIO_ACTIVE_HIGH>; 346*4882a593Smuzhiyun regulator-boot-on; 347*4882a593Smuzhiyun }; 348*4882a593Smuzhiyun 349*4882a593Smuzhiyun vdd_5v_sata: regulator@4 { 350*4882a593Smuzhiyun compatible = "regulator-fixed"; 351*4882a593Smuzhiyun regulator-name = "VDD_5V_SATA"; 352*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 353*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 354*4882a593Smuzhiyun gpio = <&gpio TEGRA194_MAIN_GPIO(Z, 1) GPIO_ACTIVE_HIGH>; 355*4882a593Smuzhiyun enable-active-high; 356*4882a593Smuzhiyun }; 357*4882a593Smuzhiyun}; 358