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/OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
15 Choose this option if you have a Rockchip soc chipset.
19 IP found on the SoC.
31 the upper ff900000.vop is different at different SOC platform.
53 enable VOP on Rockchip SoC, you should select this option.
60 enable VOP2 on Rockchip SoC, you should select this option.
63 bool "Rockchip specific extensions for Analogix DP driver"
65 This selects support for Rockchip SoC specific extensions
67 on RK3288 or RK3399 based SoC, you should select this option.
72 This selects support for Rockchip SoC specific extensions
[all …]
/OK3568_Linux_fs/u-boot/drivers/video/drm/
H A DKconfig7 Rockchip SoCs provide video output capabilities for High-Definition
8 Multimedia Interface (HDMI), Low-voltage Differential Signalling
11 This driver supports the on-chip video output device, and targets the
37 Driver for Maxim MAX96755F GMSL2 Serializer with MIPI-DSI Input.
40 bool "Rohm BU18RL82-based panels"
47 bool "Maxim MAX96752F-based panels"
65 bool "Rockchip specific extensions for Synopsys DW HDMI"
68 This selects support for Rockchip SoC specific extensions
73 bool "Rockchip specific extensions for Synopsys DW HDMI QP"
76 This selects support for Rockchip SoC specific extensions
[all …]
/OK3568_Linux_fs/kernel/drivers/pci/controller/dwc/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
31 Enables support for the PCIe controller in the DRA7xx SoC to work in
34 host-specific features PCI_DRA7XX_HOST must be selected and in order
35 to enable device-specific features PCI_DRA7XX_EP must be selected.
46 Enables support for the PCIe controller in the DRA7xx SoC to work in
49 host-specific features PCI_DRA7XX_HOST must be selected and in order
50 to enable device-specific features PCI_DRA7XX_EP must be selected.
57 bool "Platform bus based DesignWare PCIe Controller - Host mode"
66 host-specific features PCIE_DW_PLAT_HOST must be selected and in
67 order to enable device-specific features PCI_DW_PLAT_EP must be
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-omap2/
H A Dcm.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc.
6 * Copyright (C) 2007-2009 Nokia Corporation
25 #include "prcm-common.h"
46 * struct cm_ll_data - fn ptrs to per-SoC CM function implementations
47 * @split_idlest_reg: ptr to the SoC CM-specific split_idlest_reg impl
48 * @wait_module_ready: ptr to the SoC CM-specific wait_module_ready impl
49 * @wait_module_idle: ptr to the SoC CM-specific wait_module_idle impl
50 * @module_enable: ptr to the SoC CM-specific module_enable impl
51 * @module_disable: ptr to the SoC CM-specific module_disable impl
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/stmicro/stmmac/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "STMicroelectronics Multi-Gigabit Ethernet driver"
45 This selects the full function, default is Y, full-featured version
54 This selects the platform specific bus support for the stmmac driver.
65 tristate "Support for snps,dwc-qos-ethernet.txt DT binding."
70 Support for chips using the snps,dwc-qos-ethernet.txt DT binding.
77 platform specific code to function or is using platform
87 This selects the Anarion SoC glue layer support for the stmmac driver.
97 This selects the IPQ806x SoC glue layer support for the stmmac
99 acceleration features available on this SoC. Network devices
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/
H A Dmarvell,mvebu-pinctrl.txt1 * Marvell SoC pinctrl core driver for mpp
3 The pinctrl driver enables Marvell SoCs to configure the multi-purpose pins
4 (mpp) to a specific function. For each SoC family there is a SoC specific
7 Please refer to pinctrl-bindings.txt in this directory for details of the
11 A Marvell SoC pin configuration node is a node of a group of pins which can
12 be used for a specific device or function. Each node requires one or more
16 - compatible: "marvell,<soc>-pinctrl"
17 Please refer to each marvell,<soc>-pinctrl.txt binding doc for supported SoCs.
20 - marvell,pins: string array of mpp pins or group of pins to be muxed.
21 - marvell,function: string representing a function to mux to for all
[all …]
H A Dfsl,imx-pinctrl.txt10 Please refer to pinctrl-bindings.txt in this directory for details of the
15 used for a specific device or function. This node represents both mux and config
18 such as pull-up, open drain, drive strength, etc.
21 - compatible: "fsl,<soc>-iomuxc"
22 Please refer to each fsl,<soc>-pinctrl.txt binding doc for supported SoCs.
25 - fsl,pins: each entry consists of 6 integers and represents the mux and config
28 imx*-pinfunc.h under device tree source folder. The last integer CONFIG is
29 the pad setting value like pull-up on this pin. And that's why fsl,pins entry
41 Please refer to each fsl,<soc>-pinctrl,txt binding doc for SoC specific part
45 Some requirements for using fsl,imx-pinctrl binding:
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/OK3568_Linux_fs/kernel/drivers/pinctrl/nomadik/
H A Dpinctrl-abx500.h1 /* SPDX-License-Identifier: GPL-2.0 */
30 * struct abx500_function - ABx500 pinctrl mux function
42 * struct abx500_pingroup - describes a ABx500 pin group
43 * @name: the name of this specific pin group
45 * from the driver-local pin enumeration space
69 #define UNUSED -1
81 * function between the ABx500 SOC family when using
105 * struct abx500_gpio_irq_cluster - indicates GPIOs which are interrupt
112 * read-in values into the cluster information table
122 * struct abx500_pinrange - map pin numbers to GPIO offsets
[all …]
/OK3568_Linux_fs/kernel/drivers/thermal/samsung/
H A Dexynos_tmu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * exynos_tmu.c - Samsung Exynos TMU (Thermal Management Unit)
24 #include <dt-bindings/thermal/thermal_exynos.h>
44 /* Exynos3250 specific registers */
47 /* Exynos4210 specific registers */
51 /* Exynos5250, Exynos4412, Exynos3250 specific registers */
74 /* Exynos5260 specific */
80 /* Exynos4412 specific */
84 /* Exynos5433 specific registers */
107 /* Exynos7 specific registers */
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mmc/
H A Dbluefield-dw-mshc.txt1 * Mellanox Bluefield SoC specific extensions to the Synopsys Designware
4 Read synopsys-dw-mshc.txt for more details
7 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
9 by synopsys-dw-mshc.txt and the properties used by the Mellanox Bluefield SoC
10 specific extensions to the Synopsys Designware Mobile Storage Host Controller.
15 - "mellanox,bluefield-dw-mshc": for controllers with Mellanox Bluefield SoC
16 specific extensions.
20 /* Mellanox Bluefield SoC MMC */
22 compatible = "mellanox,bluefield-dw-mshc";
25 fifo-depth = <0x100>;
[all …]
H A Dexynos-dw-mshc.txt1 * Samsung Exynos specific extensions to the Synopsys Designware Mobile
5 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
7 by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific
13 - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210
14 specific extensions.
15 - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412
16 specific extensions.
17 - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
18 specific extensions.
19 - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420
[all …]
H A Dsamsung-sdhci.txt8 Required SoC Specific Properties:
9 - compatible: should be one of the following
10 - "samsung,s3c6410-sdhci": For controllers compatible with s3c6410 sdhci
12 - "samsung,exynos4210-sdhci": For controllers compatible with Exynos4 sdhci
15 Required Board Specific Properties:
16 - pinctrl-0: Should specify pin control groups used for this controller.
17 - pinctrl-names: Should contain only one value - "default".
21 compatible = "samsung,exynos4210-sdhci";
24 bus-width = <4>;
25 cd-gpios = <&gpk2 2 0>;
[all …]
/OK3568_Linux_fs/kernel/drivers/mmc/host/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
85 implements a hardware byte swapper using a 32-bit datum.
114 disabled, it will steal the MMC cards away - rendering them
126 identified by ACPI Compatibility ID PNP0D40 or specific
152 (SDHCI). This hardware is found e.g. in Xilinx' Zynq SoC.
218 tristate "SDHCI OF support for the MCHP Sparx5 SoC"
223 found in the MCHP Sparx5 SoC.
225 If you have a Sparx5 SoC with this interface, say Y or M here.
241 tristate "SDHCI support on the Cavium Networks CNS3xxx SoC"
245 This selects the SDHCI support for CNS3xxx System-on-Chip devices.
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/
H A Dusage-model.rst1 .. SPDX-License-Identifier: GPL-2.0
44 ----------
56 In 2005, when PowerPC Linux began a major cleanup and to merge 32-bit
57 and 64-bit support, the decision was made to require DT support on all
61 blob without requiring a real Open Firmware implementation. U-Boot,
66 existing non-DT aware firmware.
74 -------------
79 -------------------
88 per-machine hard coded selections.
101 ---------------------------
[all …]
/OK3568_Linux_fs/u-boot/drivers/mmc/
H A DKconfig11 also to your specific host controller driver.
25 Secure Digital I/O (SDIO) cards. Both removable (SD, micro-SD, etc.)
26 and non-removable (e.g. eMMC chip) devices are supported. These
27 appear as block devices in U-Boot and can support filesystems such
36 Secure Digital I/O (SDIO) cards. Both removable (SD, micro-SD, etc.)
37 and non-removable (e.g. eMMC chip) devices are supported. These
38 appear as block devices in U-Boot and can support filesystems such
49 you are reading this help text, you most likely have no idea :-)
88 bool "Exynos specific extensions for Synopsys DW Memory Card Interface"
93 This selects support for Samsung Exynos SoC specific extensions to the
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pci/
H A Drcar-pci.txt1 * Renesas R-Car PCIe interface
4 compatible: "renesas,pcie-r8a7742" for the R8A7742 SoC;
5 "renesas,pcie-r8a7743" for the R8A7743 SoC;
6 "renesas,pcie-r8a7744" for the R8A7744 SoC;
7 "renesas,pcie-r8a774a1" for the R8A774A1 SoC;
8 "renesas,pcie-r8a774b1" for the R8A774B1 SoC;
9 "renesas,pcie-r8a774c0" for the R8A774C0 SoC;
10 "renesas,pcie-r8a7779" for the R8A7779 SoC;
11 "renesas,pcie-r8a7790" for the R8A7790 SoC;
12 "renesas,pcie-r8a7791" for the R8A7791 SoC;
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/can/
H A Drcar_can.txt1 Renesas R-Car CAN controller Device Tree Bindings
2 -------------------------------------------------
5 - compatible: "renesas,can-r8a7742" if CAN controller is a part of R8A7742 SoC.
6 "renesas,can-r8a7743" if CAN controller is a part of R8A7743 SoC.
7 "renesas,can-r8a7744" if CAN controller is a part of R8A7744 SoC.
8 "renesas,can-r8a7745" if CAN controller is a part of R8A7745 SoC.
9 "renesas,can-r8a77470" if CAN controller is a part of R8A77470 SoC.
10 "renesas,can-r8a774a1" if CAN controller is a part of R8A774A1 SoC.
11 "renesas,can-r8a774b1" if CAN controller is a part of R8A774B1 SoC.
12 "renesas,can-r8a774c0" if CAN controller is a part of R8A774C0 SoC.
[all …]
/OK3568_Linux_fs/kernel/Documentation/arm/spear/
H A Doverview.rst6 ------------
11 The ST Microelectronics SPEAr range of ARM9/CortexA9 System-on-Chip CPUs are
19 - SPEAr3XX (3XX SOC series, based on ARM9)
20 - SPEAr300 (SOC)
21 - SPEAr300 Evaluation Board
22 - SPEAr310 (SOC)
23 - SPEAr310 Evaluation Board
24 - SPEAr320 (SOC)
25 - SPEAr320 Evaluation Board
26 - SPEAr6XX (6XX SOC series, based on ARM9)
[all …]
/OK3568_Linux_fs/kernel/sound/soc/qcom/
H A Dlpass.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2010-2011,2013-2015,2020 The Linux Foundation. All rights reserved.
5 * lpass.h - Definitions for the QTi LPASS
15 #include <dt-bindings/sound/qcom,lpass.h>
16 #include "lpass-hdmi.h"
27 return -EINVAL; \
58 /* AHB-I/X bus clocks inside the low-power audio subsystem (LPASS) */
76 /* low-power audio interface (LPAIF) registers */
80 /* regmap backed by the low-power audio interface (LPAIF) registers */
84 /* interrupts from the low-power audio interface (LPAIF) */
[all …]
/OK3568_Linux_fs/u-boot/
H A Dconfig.mk2 # (C) Copyright 2000-2013
5 # SPDX-License-Identifier: GPL-2.0+
37 SOC := $(CONFIG_SYS_SOC:"%"=%)
41 # so calculate CPUDIR before including ARCH/SOC/CPU config.mk files.
43 # CPU-specific code.
47 sinclude $(srctree)/$(CPUDIR)/config.mk # include CPU specific rules
49 ifdef SOC
50 sinclude $(srctree)/$(CPUDIR)/$(SOC)/config.mk # include SoC specific rules
60 sinclude $(srctree)/board/$(BOARDDIR)/config.mk # include board specific rules
64 PLATFORM_CPPFLAGS += -finstrument-functions -DFTRACE
[all …]
/OK3568_Linux_fs/kernel/drivers/pinctrl/mvebu/
H A Dpinctrl-mvebu.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 * struct mvebu_mpp_ctrl_data - private data for the mpp ctrl operations
29 * struct mvebu_mpp_ctrl - describe a mpp control
39 * internal function, inside the SoC. Each muxable unit can be switched
44 * specific mode. The optional mpp_gpio_req/_dir functions can be used
62 * struct mvebu_mpp_ctrl_setting - describe a mpp ctrl setting
64 * @name: ctrl setting name, e.g. uart2, spi0 - unique per mpp_mode
69 * A ctrl_setting describes a specific internal mux function that a mpp pin
71 * register for common mpp pin configuration registers on MVEBU. SoC specific
[all …]
/OK3568_Linux_fs/kernel/Documentation/sound/soc/
H A Doverview.rst2 ALSA SoC Layer Overview
6 provide better ALSA support for embedded system-on-chip processors (e.g.
8 subsystem there was some support in the kernel for SoC audio, however it
9 had some limitations:-
11 * Codec drivers were often tightly coupled to the underlying SoC
12 CPU. This is not ideal and leads to code duplication - for example,
13 Linux had different wm8731 drivers for 4 different SoC platforms.
18 machine specific code to re-route audio, enable amps, etc., after such an
31 features :-
36 * Easy I2S/PCM audio interface setup between codec and SoC. Each SoC
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/sifive/
H A Dsifive-blocks-ip-versioning.txt1 DT compatible string versioning for SiFive open-source IP blocks
4 strings for open-source SiFive IP blocks. HDL for these IP blocks
7 https://github.com/sifive/sifive-blocks
9 IP block-specific DT compatible strings are contained within the HDL,
10 in the form "sifive,<ip-block-name><integer version number>".
14 https://github.com/sifive/sifive-blocks/blob/v1.0/src/main/scala/devices/uart/UART.scala#L43
17 auto-discovery, the maintainers of these IP blocks intend to increment
25 upstream sifive-blocks commits. It is expected that most drivers will
26 match on these IP block-specific compatible strings.
28 DT data authors, when writing data for a particular SoC, should
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/powerpc/fsl/
H A Dmpic.txt14 - compatible
22 - reg
24 Value type: <prop-encoded-array>
29 - interrupt-controller
35 - #interrupt-cells
39 specifiers do not contain the interrupt-type or type-specific
42 - #address-cells
47 - pic-no-reset
53 configuration registers to a sane state-- masked or
60 - big-endian
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/
H A Ds5p-mfc.txt10 - compatible : value should be either one among the following
11 (a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs
12 (b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs
13 (c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC
14 (d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC
15 (e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC
16 (f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC
18 - reg : Physical base address of the IP registers and length of memory
21 - interrupts : MFC interrupt number to the CPU.
22 - clocks : from common clock binding: handle to mfc clock.
[all …]

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