1*4882a593Smuzhiyun* Marvell SoC pinctrl core driver for mpp 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe pinctrl driver enables Marvell SoCs to configure the multi-purpose pins 4*4882a593Smuzhiyun(mpp) to a specific function. For each SoC family there is a SoC specific 5*4882a593Smuzhiyundriver using this core driver. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunPlease refer to pinctrl-bindings.txt in this directory for details of the 8*4882a593Smuzhiyuncommon pinctrl bindings used by client devices, including the meaning of the 9*4882a593Smuzhiyunphrase "pin configuration node". 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunA Marvell SoC pin configuration node is a node of a group of pins which can 12*4882a593Smuzhiyunbe used for a specific device or function. Each node requires one or more 13*4882a593Smuzhiyunmpp pins or group of pins and a mpp function common to all pins. 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunRequired properties for pinctrl driver: 16*4882a593Smuzhiyun- compatible: "marvell,<soc>-pinctrl" 17*4882a593Smuzhiyun Please refer to each marvell,<soc>-pinctrl.txt binding doc for supported SoCs. 18*4882a593Smuzhiyun 19*4882a593SmuzhiyunRequired properties for pin configuration node: 20*4882a593Smuzhiyun- marvell,pins: string array of mpp pins or group of pins to be muxed. 21*4882a593Smuzhiyun- marvell,function: string representing a function to mux to for all 22*4882a593Smuzhiyun marvell,pins given in this pin configuration node. The function has to be 23*4882a593Smuzhiyun common for all marvell,pins. Please refer to marvell,<soc>-pinctrl.txt for 24*4882a593Smuzhiyun valid pin/pin group names and available function names for each SoC. 25*4882a593Smuzhiyun 26*4882a593SmuzhiyunExamples: 27*4882a593Smuzhiyun 28*4882a593Smuzhiyunuart1: serial@12100 { 29*4882a593Smuzhiyun compatible = "ns16550a"; 30*4882a593Smuzhiyun reg = <0x12100 0x100>; 31*4882a593Smuzhiyun reg-shift = <2>; 32*4882a593Smuzhiyun interrupts = <7>; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun pinctrl-0 = <&pmx_uart1_sw>; 35*4882a593Smuzhiyun pinctrl-names = "default"; 36*4882a593Smuzhiyun}; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyunpinctrl: pinctrl@d0200 { 39*4882a593Smuzhiyun compatible = "marvell,dove-pinctrl"; 40*4882a593Smuzhiyun reg = <0xd0200 0x14>, <0xd0440 0x04>, <0xd802c 0x08>; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun pmx_uart1_sw: pmx-uart1-sw { 43*4882a593Smuzhiyun marvell,pins = "mpp_uart1"; 44*4882a593Smuzhiyun marvell,function = "uart1"; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun}; 47