Lines Matching +full:soc +full:- +full:specific

1 * Samsung Exynos specific extensions to the Synopsys Designware Mobile
5 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
7 by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific
13 - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210
14 specific extensions.
15 - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412
16 specific extensions.
17 - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
18 specific extensions.
19 - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420
20 specific extensions.
21 - "samsung,exynos7-dw-mshc": for controllers with Samsung Exynos7
22 specific extensions.
23 - "samsung,exynos7-dw-mshc-smu": for controllers with Samsung Exynos7
24 specific extensions having an SMU.
26 * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
27 unit (ciu) clock. This property is applicable only for Exynos5 SoC's and
28 ignored for Exynos4 SoC's. The valid range of divider value is 0 to 7.
30 * samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value
35 * samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock phase shift value
39 * samsung,dw-mshc-hs400-timing: Specifies the value of CIU TX and RX clock phase
42 Notes for the sdr-timing and ddr-timing values:
45 - First Cell: CIU clock phase shift value for tx mode.
46 - Second Cell: CIU clock phase shift value for rx mode.
49 - valid value for tx phase shift and rx phase shift is 0 to 7.
50 - when CIU clock divider value is set to 3, all possible 8 phase shift
52 - if CIU clock divider value is 0 (that is divide by 1), both tx and rx
55 * samsung,read-strobe-delay: RCLK (Data strobe) delay to control HS400 mode
58 Required properties for a slot (Deprecated - Recommend to use one slot per host):
62 rest of the gpios (depending on the bus-width property) are the data lines in
65 (Deprecated - Refer to Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt)
69 The MSHC controller node can be split into two portions, SoC specific and
70 board specific portions as listed below.
73 compatible = "samsung,exynos5250-dw-mshc";
76 #address-cells = <1>;
77 #size-cells = <0>;
81 cap-mmc-highspeed;
82 cap-sd-highspeed;
83 broken-cd;
84 fifo-depth = <0x80>;
85 card-detect-delay = <200>;
86 samsung,dw-mshc-ciu-div = <3>;
87 samsung,dw-mshc-sdr-timing = <2 3>;
88 samsung,dw-mshc-ddr-timing = <1 2>;
89 samsung,dw-mshc-hs400-timing = <0 2>;
90 samsung,read-strobe-delay = <90>;
91 bus-width = <8>;